Hi Oliver,
Thanks for the comments.
> On 03/07/2016 09:32 AM, Ramesh Shanmugasundaram wrote:
>
> > + /* Ensure channel starts in FD mode */
> > + if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD)) {
> > + netdev_err(ndev, "enable can fd mode for channel %d\n",
> c
On 03/08/2016 10:48 AM, James Morris wrote:
On 03/08/2016 06:54 AM, Andy Lutomirski wrote:
This makes sense, but I still think the design is poor. If the hacker
gets code execution, then they can trivially brute force the ADI bits.
ADI in this scenario is intended to prevent the attacker fr
On Tue, 08 Mar 2016, Dan Allen wrote:
> One of the key goals of the Asciidoctor project is to be able to directly
> produce a wide variety of outputs from the same source (without DocBook).
> We've added flexibility and best practices into the syntax and matured the
> converter mechanism to bridge
Em Tue, 08 Mar 2016 11:49:35 +0200
Jani Nikula escreveu:
> On Tue, 08 Mar 2016, Dan Allen wrote:
> > One of the key goals of the Asciidoctor project is to be able to directly
> > produce a wide variety of outputs from the same source (without DocBook).
> > We've added flexibility and best practi
Hi Ramesh,
On 08.03.2016 09:57, Ramesh Shanmugasundaram wrote:
As you mentioned further down, when a user does this
"ip link set can0 up type can bitrate 100"
the intention is to put the controller in CAN 2.0 mode. Even if we use a status
flag or copy the data bitrate equal to the nomin
Hi Oliver,
Thanks for the comments.
> On 08.03.2016 09:57, Ramesh Shanmugasundaram wrote:
>
> >
> > As you mentioned further down, when a user does this
> >
> > "ip link set can0 up type can bitrate 100"
> >
> > the intention is to put the controller in CAN 2.0 mode. Even if we use a
> statu
Em Tue, 08 Mar 2016 05:09:40 -0700
Dan Allen escreveu:
> Jani wrote:
>
> > there was no support for chunked, or split
> > to chapters, HTML, and the single page result was simply way too big.
> >
>
> That's not entirely true. First, you can pre-split at the source level
> using includes and g
Em Tue, 08 Mar 2016 05:13:13 -0700
Dan Allen escreveu:
> On Tue, Mar 8, 2016 at 4:29 AM, Mauro Carvalho Chehab <
> mche...@osg.samsung.com> wrote:
>
> > pandoc did a really crap job on the conversion. To convert this
> > into something useful, we'll need to spend a lot of time, as it lost
> >
FAT has long supported its own default file name encoding
config setting, separate from CONFIG_NLS_DEFAULT.
However, if UTF-8 encoded file names are desired FAT
character set should not be set to utf8 since this would
make file names case sensitive even if case insensitive
matching is requested.
I
On Tue, 08 Mar 2016, Dan Allen wrote:
> That's not entirely true. First, you can pre-split at the source level
> using includes and generate output for each of the masters. That's what I
> tend to do and it works really well since these are logical split points.
I need to look into this again. Is
Hello Johannes,
On 1 March 2016 at 11:15, João Paulo Rechi Vita wrote:
> On 1 March 2016 at 08:43, Johannes Berg wrote:
>>
>> I'm fine with Jouni's change, preserving the original behaviour of
>> requiring TYPE_ALL or the correct type, but I'm tempted to simply
>> remove the type check entirely.
On 03/07/2016 01:43 PM, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
> enabled before data is stored in memory otherwise the ECC will fail
> on reads.
> Use DT_MACHINE to select Arria10 L2 cache function.
>
>
On 03/07/2016 01:43 PM, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> Add the device tree entries needed to support the Altera L2
> cache EDAC on the Arria10 chip.
>
> Signed-off-by: Thor Thayer
> ---
> v2 Match register value (l2-ecc@ffd06010)
> ---
> arch/arm/boot/dts/socfpg
Em Tue, 8 Mar 2016 10:39:22 -0300
Mauro Carvalho Chehab escreveu:
> Em Tue, 08 Mar 2016 05:13:13 -0700
> Dan Allen escreveu:
>
> > On Tue, Mar 8, 2016 at 4:29 AM, Mauro Carvalho Chehab <
> > mche...@osg.samsung.com> wrote:
> >
> > > pandoc did a really crap job on the conversion. To co
Hi Boris,
On 03/07/2016 01:43 PM, ttha...@opensource.altera.com wrote:
From: Thor Thayer
In preparation for the Arria10 peripheral ECCs, the IRQ
status needs to be determined because the IRQs are shared.
The IRQ status register is read to determine if the IRQ
was for this ECC peripheral. Cyclo
Hi Dinh,
On 03/08/2016 08:50 AM, Dinh Nguyen wrote:
On 03/07/2016 01:43 PM, ttha...@opensource.altera.com wrote:
From: Thor Thayer
Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer
---
v2 Match register value (l2-ecc@ffd
On 03/08/2016 01:48 PM, Ramesh Shanmugasundaram wrote:
>> In fact you provided a CAN driver which is "CAN-FD-only".
>
> Yes. That's the status of current submission.
>
>> We did not had that before but there's a solution for this kind of setup.
>>
>> There is a similar case with CAN_CTRLMODE_FD_
"Maciej S. Szmigiero" writes:
> FAT has long supported its own default file name encoding
> config setting, separate from CONFIG_NLS_DEFAULT.
>
> However, if UTF-8 encoded file names are desired FAT
> character set should not be set to utf8 since this would
> make file names case sensitive even i
From: Khalid Aziz
Date: Mon, 7 Mar 2016 14:06:43 -0700
> Good questions. Isn't set of valid VAs already constrained by VA_BITS
> (set to 44 in arch/sparc/include/asm/processor_64.h)? As I see it we
> are already not using the top 4 bits. Please correct me if I am wrong.
Another limiting constrai
On 03/08/2016 12:57 PM, David Miller wrote:
From: Khalid Aziz
Date: Mon, 7 Mar 2016 14:06:43 -0700
Good questions. Isn't set of valid VAs already constrained by VA_BITS
(set to 44 in arch/sparc/include/asm/processor_64.h)? As I see it we
are already not using the top 4 bits. Please correct me
From: Khalid Aziz
Date: Tue, 8 Mar 2016 13:16:11 -0700
> On 03/08/2016 12:57 PM, David Miller wrote:
>> From: Khalid Aziz
>> Date: Mon, 7 Mar 2016 14:06:43 -0700
>>
>>> Good questions. Isn't set of valid VAs already constrained by VA_BITS
>>> (set to 44 in arch/sparc/include/asm/processor_64.h)?
On 03/08/2016 01:27 PM, David Miller wrote:
From: Khalid Aziz
Date: Tue, 8 Mar 2016 13:16:11 -0700
On 03/08/2016 12:57 PM, David Miller wrote:
From: Khalid Aziz
Date: Mon, 7 Mar 2016 14:06:43 -0700
Good questions. Isn't set of valid VAs already constrained by VA_BITS
(set to 44 in arch/spa
Hello Laxman,
Thanks for working on this. Impressed how simplified these drivers are
becoming. I really liked you added the so waited devm_ helpers. Very
minor comments as follows (now that you will send a new version anyway).
On Fri, Mar 04, 2016 at 07:10:10PM +0530, Laxman Dewangan wrote:
> Ma
Hello Laxman,
Minor as follows.
Can you please run ./scripts/checkpatch.pl --strict on this and remove
the warnings, errors, checks?
On Fri, Mar 04, 2016 at 07:10:08PM +0530, Laxman Dewangan wrote:
> Add resource managed version of thermal_zone_of_sensor_register() and
> thermal_zone_of_sensor_
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