Hi
On 5 February 2016 at 00:46, Guenter Roeck wrote:
> On 02/04/2016 08:37 AM, Timur Tabi wrote:
>>
>> Will Deacon wrote:
+static int sbsa_gwdt_keepalive(struct watchdog_device *wdd)
>+{
>+struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
>+
>+/*
>+* Writi
On 5 February 2016 at 00:25, Mathieu Poirier wrote:
> On 3 February 2016 at 10:18, wrote:
>> From: Fu Wei
>>
>> According to Server Base System Architecture (SBSA) specification,
>> the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0)
>> is for alerting the system by interru
On 5 February 2016 at 00:43, Timur Tabi wrote:
> Mathieu Poirier wrote:
>>>
>>> >+#ifdef CONFIG_ARM_SBSA_WATCHDOG_PANIC
>>> >+ irq = platform_get_irq(pdev, 0);
>>> >+ if (irq < 0) {
>>> >+ dev_err(dev, "unable to get ws0 interrupt.\n");
>>> >+ return irq;
>>
Hi Guenter,
On 4 February 2016 at 13:17, Guenter Roeck wrote:
> On 02/03/2016 03:00 PM, Fu Wei wrote:
>>
>> On 4 February 2016 at 02:45, Timur Tabi wrote:
>>>
>>> Fu Wei wrote:
As you know I have made the pre-timeout support patch, If people like
it, i am happy to go on upstr
Chunyan Zhang writes:
> From: Mathieu Poirier
>
> Some architecture like ARM assign masterIDs statically at the HW design
> phase, making masterID manipulation in the generic STM core irrelevant.
>
> This patch adds a new 'mstatic' flag to struct stm_data that tells the
> core that this specific
Chunyan Zhang writes:
> There is already an interface of set_options, but no get_options yet.
> Before setting any options, one would may want to see the current
> status of that option by means of get_options interface. This
> interface has been used in CoreSight STM driver.
>
> Signed-off-by: C
Chunyan Zhang writes:
> +#ifndef CONFIG_64BIT
> +static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
> +{
> + asm volatile("strd %1, %0"
> + : "+Qo" (*(volatile u64 __force *)addr)
> + : "r" (val));
> +}
Is it really ok to do this for all !
Thomas Petazzoni wrote:
if panic is enabled :
>|WOR---WS0WOR---WS1
>|--timeout--(panic)--timeout-reset
I'm quite certainly missing something completely obvious here, but how
can you get the WS1 interrupt*after* raising a panic? Aren't all
interrupts dis
Hello,
On Fri, 5 Feb 2016 17:51:52 +0800, Fu Wei wrote:
> OK, my thought is
>
> if panic is enabled :
> |WOR---WS0WOR---WS1
> |--timeout--(panic)--timeout-reset
I'm quite certainly missing something completely obvious here, but how
can you get the WS1 int
Hello,
On Fri, 5 Feb 2016 07:08:23 -0600, Timur Tabi wrote:
> > I'm quite certainly missing something completely obvious here, but how
> > can you get the WS1 interrupt*after* raising a panic? Aren't all
> > interrupts disabled and the system fully halted once you get a panic(),
> > especially w
On Friday 05 February 2016 15:06:20 Alexander Shishkin wrote:
> Chunyan Zhang writes:
>
> > +#ifndef CONFIG_64BIT
> > +static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
> > +{
> > + asm volatile("strd %1, %0"
> > + : "+Qo" (*(volatile u64 __force *)addr)
>
On 02/05/2016 01:51 AM, Fu Wei wrote:
Hi Guenter,
On 4 February 2016 at 13:17, Guenter Roeck wrote:
On 02/03/2016 03:00 PM, Fu Wei wrote:
On 4 February 2016 at 02:45, Timur Tabi wrote:
Fu Wei wrote:
As you know I have made the pre-timeout support patch, If people like
it, i am happy to
On Thu, 4 Feb 2016, Josh Poimboeuf wrote:
> On Wed, Feb 03, 2016 at 08:37:52PM -0500, Jessica Yu wrote:
> > +++ Jessica Yu [03/02/16 20:11 -0500]:
> > >Livepatch needs to utilize the symbol information contained in the
> > >mod_arch_specific struct in order to be able to call the s390
> > >apply_r
Hi,
I think a quick clarification of the ARM hardware STM architecture may be of
value here.
The ARM hardware STM, when implemented as recommend in a hardware design, the
master IDs are not under driver control, but have a hardwire association with
source devices in the system. The master IDs
On 5 February 2016 at 05:52, Alexander Shishkin
wrote:
> Chunyan Zhang writes:
>
>> From: Mathieu Poirier
>>
>> Some architecture like ARM assign masterIDs statically at the HW design
>> phase, making masterID manipulation in the generic STM core irrelevant.
>>
>> This patch adds a new 'mstatic'
On 5 February 2016 at 22:42, Guenter Roeck wrote:
> On 02/05/2016 01:51 AM, Fu Wei wrote:
>>
>> Hi Guenter,
>>
>> On 4 February 2016 at 13:17, Guenter Roeck wrote:
>>>
>>> On 02/03/2016 03:00 PM, Fu Wei wrote:
On 4 February 2016 at 02:45, Timur Tabi wrote:
>
>
> Fu Wei
A number of rtc devices, such as the NXP pcf2123 include a facility
to adjust the clock in order to compensate for temperature or a
crystal, capacitor, etc, that results in the rtc clock not running
at exactly 32.768 kHz.
Data sheets I have seen refer to this as a clock offset, and measure it
in p
clock offset may be set and read in decimal parts per billion
attribute is /sys/class/rtc/rtcN/offset
The attribute is only visible for rtcs that have set_offset implemented.
Signed-off-by: Joshua Clayton
---
Documentation/rtc.txt | 6 ++
drivers/rtc/rtc-sysfs.c | 35 +
pcf2123 has an offset register, which can be used to make minor
adjustments to the clock rate to compensate for temperature or
a crystal that is not exactly right.
Signed-off-by: Joshua Clayton
---
drivers/rtc/rtc-pcf2123.c | 57 +++
1 file changed, 57
From: Alan Tull
New bindings document for FPGA Region to support programming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated
From: Alan Tull
Add documentation for new FPGA bridge class's sysfs interface.
Signed-off-by: Alan Tull
--
v15: Document added in v15 of patch set
v16: No change to this patch in v16 of patch set
---
Documentation/ABI/testing/sysfs-class-fpga-bridge | 11 +++
1 file changed, 11 inser
From: Alan Tull
FPGA Regions support programming FPGA under control of the Device
Tree.
Signed-off-by: Alan Tull
---
v9: initial version (this patch added during rest of patchset's v9)
v10: request deferral if fpga mgr or bridges not available yet
cleanup as fpga manager core goes into th
From: Alan Tull
This framework adds API functions for enabling/
disabling FPGA bridges under kernel control.
This allows the Linux kernel to disable FPGA bridges
during FPGA reprogramming and to enable FPGA bridges
when FPGA reprogramming is done. This framework is
be manufacturer-agnostic, all
From: Alan Tull
Supports Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.
The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on. Thi
From: Alan Tull
v16 Refactors the FPGA Area and FPGA Bus into single thing called an
FPGA Region and eliminates using simple-bus. I'm using the word
"region" as it's a term is used in the literature of both the major
FPGA manufacturors.
Changes for v16:
* Refactor the FPGA Area and FPGA Bus int
From: Alan Tull
Add bindings documentation for Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: separate into 2 documents for the 2 drivers
v12: bump version to line up with
Hey Alan-
First off, thanks for all of your (and others') work on this.
On Fri, Feb 05, 2016 at 03:29:58PM -0600, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> New bindings document for FPGA Region to support programming
> FPGA's under Device Tree control
>
> Signed-off-by: Alan Tul
On 02/05/2016 10:21 AM, Fu Wei wrote:
On 5 February 2016 at 22:42, Guenter Roeck wrote:
On 02/05/2016 01:51 AM, Fu Wei wrote:
Hi Guenter,
On 4 February 2016 at 13:17, Guenter Roeck wrote:
On 02/03/2016 03:00 PM, Fu Wei wrote:
On 4 February 2016 at 02:45, Timur Tabi wrote:
Fu Wei wr
This patch set adds a new drm driver for HiSilicon Kirin hi6220 SoC.
Current testing and support board is Hikey board which is one of Linaro
96boards. It is an arm64 open source board. For more information about
this board, please access https://www.96boards.org.
Hardware Detail
---
Add crtc funcs and helper funcs for ADE.
v4: None.
v3:
- Make ade as the master driver.
- Use port to connect with encoder.
- A few cleanup.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
---
drivers/gpu/drm/hisilicon/kirin/Makefile| 3 +-
drivers/gpu/drm/hisilicon/kirin/k
Add kirin DRM master driver for hi6220 SoC which used in HiKey board.
Add dumb buffer feature.
Add prime dmabuf feature.
v4: None.
v3:
- Move and rename all the files to kirin sub-directory.
So that we could separate different seires SoCs' driver.
- Replace drm_platform_init, load, unload implem
Add ADE display controller binding doc.
Add DesignWare DSI Host Controller v1.20a binding doc.
v4:
- Describe more specific of clocks and ports.
- Fix indentation.
v3:
- Make ade as the drm master node.
- Use assigned-clocks to set clock rate.
- Use ports to connect display relavant nodes.
v2:
- M
Add plane funcs and helper funcs for ADE.
v4: None.
v3:
- A few cleanup.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
---
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 535 +++-
1 file changed, 534 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/
Add cma Fbdev, Fbdev is legency and optional, you can enable/disable it by
configuring DRM_FBDEV_EMULATION.
Add hotplug.
v4: None.
v3: None.
v2:
- Use CONFIG_DRM_FBDEV_EMULATION instead of CONFIG_DRM_HISI_FBDEV.
Signed-off-by: Xinliang Liu
---
drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 3
Add vblank irq handle.
v4: None.
v3:
- Remove hisi_get_crtc_from_index func.
- A few cleanup.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
---
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 62 +
drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 14 +
Add DesignWare dsi host driver for hi6220 SoC.
v4: None.
v3: None.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
---
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 50
1 file changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm
Add DesignWare MIPI DSI Host Controller v1.02 encoder driver
for hi6220 SoC.
v4: None.
v3:
- Rename file name to dw_drm_dsi.c
- Make encoder type as DRM_MODE_ENCODER_DSI.
- A few cleanup.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy G
Add ade, dsi and adv7533 DT nodes for hikey board.
Signed-off-by: Xinliang Liu
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 44 +
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 53 ++
2 files changed, 97 insertions(+)
diff --git a/arch/arm64
Add support for external HDMI bridge.
v4: None.
v3:
- Fix a typo: s/exteranl/external.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
---
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 52
1 file changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/hi
Add maintainer and reviewer for hisilicon DRM driver.
v4:
- Add Chen Feng as Designated reviewer.
v3: First version.
Signed-off-by: Xinliang Liu
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30aca4aa5467..730ebc571edf 100644
---
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