On 31 March 2016 at 07:20, Alexander Shishkin
wrote:
> Mathieu Poirier writes:
>
>> On 21 March 2016 at 01:47, Alexander Shishkin
>> wrote:
>>> Chunyan Zhang writes:
>>>
From: Mathieu Poirier
Some architecture like ARM assign masterIDs at the HW design
phase. Those are the
Mathieu Poirier writes:
> On 21 March 2016 at 01:47, Alexander Shishkin
> wrote:
>> Chunyan Zhang writes:
>>
>>> From: Mathieu Poirier
>>>
>>> Some architecture like ARM assign masterIDs at the HW design
>>> phase. Those are therefore unreachable to users, making masterID
>>> management in th
On 21 March 2016 at 01:47, Alexander Shishkin
wrote:
> Chunyan Zhang writes:
>
>> From: Mathieu Poirier
>>
>> Some architecture like ARM assign masterIDs at the HW design
>> phase. Those are therefore unreachable to users, making masterID
>> management in the generic STM core irrelevant.
>>
>>
Chunyan Zhang writes:
> From: Mathieu Poirier
>
> Some architecture like ARM assign masterIDs at the HW design
> phase. Those are therefore unreachable to users, making masterID
> management in the generic STM core irrelevant.
>
> In this kind of configuration channels are shared between master
