On Tue, 10 Dec 2024 14:53:36 +0100
Valentin Schneider wrote:
> On 09/12/24 15:42, Petr Tesarik wrote:
> > On Mon, 9 Dec 2024 13:12:49 +0100
> > Peter Zijlstra wrote:
> >
> >> On Mon, Dec 09, 2024 at 01:04:43PM +0100, Valentin Schneider wrote:
> >>
> >> > > But I wonder what exactly was the o
On 09/12/24 15:42, Petr Tesarik wrote:
> On Mon, 9 Dec 2024 13:12:49 +0100
> Peter Zijlstra wrote:
>
>> On Mon, Dec 09, 2024 at 01:04:43PM +0100, Valentin Schneider wrote:
>>
>> > > But I wonder what exactly was the original scenario encountered by
>> > > Valentin. I mean, if TLB entry invalidatio
On Mon, 9 Dec 2024 13:12:49 +0100
Peter Zijlstra wrote:
> On Mon, Dec 09, 2024 at 01:04:43PM +0100, Valentin Schneider wrote:
>
> > > But I wonder what exactly was the original scenario encountered by
> > > Valentin. I mean, if TLB entry invalidations were necessary to sync
> > > changes to kern
On Mon, 09 Dec 2024 13:04:43 +0100
Valentin Schneider wrote:
> On 05/12/24 18:31, Petr Tesarik wrote:
> > On Thu, 21 Nov 2024 16:30:16 +0100
> > Peter Zijlstra wrote:
> >
> >> On Thu, Nov 21, 2024 at 07:07:44AM -0800, Dave Hansen wrote:
> >> > On 11/21/24 03:12, Peter Zijlstra wrote:
> >>
On Mon, Dec 09, 2024 at 01:04:43PM +0100, Valentin Schneider wrote:
> > But I wonder what exactly was the original scenario encountered by
> > Valentin. I mean, if TLB entry invalidations were necessary to sync
> > changes to kernel text after flipping a static branch, then it might be
> > less ov
On 05/12/24 18:31, Petr Tesarik wrote:
> On Thu, 21 Nov 2024 16:30:16 +0100
> Peter Zijlstra wrote:
>
>> On Thu, Nov 21, 2024 at 07:07:44AM -0800, Dave Hansen wrote:
>> > On 11/21/24 03:12, Peter Zijlstra wrote:
>> > >> I see e.g. ds_clear_cea() clears PTEs that can have the _PAGE_GLOBAL
>> > >>
On Thu, 21 Nov 2024 16:30:16 +0100
Peter Zijlstra wrote:
> On Thu, Nov 21, 2024 at 07:07:44AM -0800, Dave Hansen wrote:
> > On 11/21/24 03:12, Peter Zijlstra wrote:
> > >> I see e.g. ds_clear_cea() clears PTEs that can have the _PAGE_GLOBAL
> > >> flag,
> > >> and it correctly uses the non-def
On Tue, Nov 19, 2024 at 04:35:00PM +0100, Valentin Schneider wrote:
> @@ -418,9 +419,20 @@ static inline void cpu_tlbstate_update_lam(unsigned long
> lam, u64 untag_mask)
> #endif
> #endif /* !MODULE */
>
> +#define __NATIVE_TLB_FLUSH_GLOBAL(suffix, cr4) \
> + native_write_c
On Thu, Nov 21, 2024 at 07:07:44AM -0800, Dave Hansen wrote:
> On 11/21/24 03:12, Peter Zijlstra wrote:
> >> I see e.g. ds_clear_cea() clears PTEs that can have the _PAGE_GLOBAL flag,
> >> and it correctly uses the non-deferrable flush_tlb_kernel_range().
> >
> > I always forget what we use global
On 11/21/24 03:12, Peter Zijlstra wrote:
>> I see e.g. ds_clear_cea() clears PTEs that can have the _PAGE_GLOBAL flag,
>> and it correctly uses the non-deferrable flush_tlb_kernel_range().
>
> I always forget what we use global pages for, dhansen might know, but
> let me try and have a look.
>
>
On Wed, Nov 20, 2024 at 06:24:56PM +0100, Valentin Schneider wrote:
> > Oh gawd, just having looked at xen_write_cr3() this might not be
> > entirely trivial to mark noinstr :/
>
> ... I hadn't even seen that.
>
> AIUI the CR3 RMW is not "enough" if we have PGE enabled, because then
> global pag
On 20/11/24 16:32, Peter Zijlstra wrote:
> On Wed, Nov 20, 2024 at 04:22:16PM +0100, Peter Zijlstra wrote:
>> On Tue, Nov 19, 2024 at 04:35:00PM +0100, Valentin Schneider wrote:
>>
>> > +void noinstr __flush_tlb_all_noinstr(void)
>> > +{
>> > + /*
>> > + * This is for invocation in early entry
On Tue, Nov 19, 2024 at 04:35:00PM +0100, Valentin Schneider wrote:
> +void noinstr __flush_tlb_all_noinstr(void)
> +{
> + /*
> + * This is for invocation in early entry code that cannot be
> + * instrumented. A RMW to CR4 works for most cases, but relies on
> + * being able to
On Wed, Nov 20, 2024 at 04:22:16PM +0100, Peter Zijlstra wrote:
> On Tue, Nov 19, 2024 at 04:35:00PM +0100, Valentin Schneider wrote:
>
> > +void noinstr __flush_tlb_all_noinstr(void)
> > +{
> > + /*
> > +* This is for invocation in early entry code that cannot be
> > +* instrumented. A
Kernel TLB invalidation IPIs are a common source of interference on
NOHZ_FULL CPUs. Given NOHZ_FULL CPUs executing in userspace are not
accessing any kernel addresses, these invalidations do not need to happen
immediately, and can be deferred until the next user->kernel transition.
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