Re: [PATCHv3 2/7] EDAC, altera: Add panic flag check to A10 IRQ

2016-06-17 Thread Thor Thayer
On 06/17/2016 12:02 PM, Borislav Petkov wrote: On Fri, Jun 17, 2016 at 12:05:41PM -0500, Thor Thayer wrote: That is a good question. We have 2 important uses for OCRAM 1) to hold our power-down/sleep and resume functions and 2) to hold our FPGA contents during sleep. If either of these is corr

Re: [PATCHv3 2/7] EDAC, altera: Add panic flag check to A10 IRQ

2016-06-17 Thread Borislav Petkov
On Fri, Jun 17, 2016 at 12:05:41PM -0500, Thor Thayer wrote: > That is a good question. We have 2 important uses for OCRAM 1) to hold our > power-down/sleep and resume functions and 2) to hold our FPGA contents > during sleep. If either of these is corrupted, it is better to panic than to > load so

Re: [PATCHv3 2/7] EDAC, altera: Add panic flag check to A10 IRQ

2016-06-17 Thread Thor Thayer
Hi Boris, On 06/17/2016 11:51 AM, Borislav Petkov wrote: On Mon, Jun 13, 2016 at 04:19:07PM -0500, ttha...@opensource.altera.com wrote: From: Thor Thayer In preparation for additional memory module ECCs, the IRQ function will check a panic flag before doing a kernel panic on double bit errors

Re: [PATCHv3 2/7] EDAC, altera: Add panic flag check to A10 IRQ

2016-06-17 Thread Borislav Petkov
On Mon, Jun 13, 2016 at 04:19:07PM -0500, ttha...@opensource.altera.com wrote: > From: Thor Thayer > > In preparation for additional memory module ECCs, the > IRQ function will check a panic flag before doing a > kernel panic on double bit errors. ECCs on buffers > will not cause a kernel panic o

[PATCHv3 2/7] EDAC, altera: Add panic flag check to A10 IRQ

2016-06-13 Thread tthayer
From: Thor Thayer In preparation for additional memory module ECCs, the IRQ function will check a panic flag before doing a kernel panic on double bit errors. ECCs on buffers will not cause a kernel panic on DBERRs. Signed-off-by: Thor Thayer --- v2 New patch. Add panic flag to IRQ function. v