Hi Dinh,
On 03/08/2016 08:50 AM, Dinh Nguyen wrote:
On 03/07/2016 01:43 PM, ttha...@opensource.altera.com wrote:
From: Thor Thayer
Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer
---
v2 Match register value (l2-ecc@ffd
On 03/07/2016 01:43 PM, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> Add the device tree entries needed to support the Altera L2
> cache EDAC on the Arria10 chip.
>
> Signed-off-by: Thor Thayer
> ---
> v2 Match register value (l2-ecc@ffd06010)
> ---
> arch/arm/boot/dts/socfpg
From: Thor Thayer
Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer
---
v2 Match register value (l2-ecc@ffd06010)
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git
