Re: [PATCH v2] Documentation/arm64: HugeTLB page implementation

2018-10-10 Thread Catalin Marinas
On Tue, Oct 09, 2018 at 12:50:49PM +0100, Will Deacon wrote: > On Tue, Oct 09, 2018 at 11:02:01AM +0100, Punit Agrawal wrote: > > Randy Dunlap writes: > > > > > On 10/8/18 3:03 AM, Punit Agrawal wrote: > > >> Arm v8 architecture supports multiple page sizes - 4k, 16k and > > >> 64k. Based on the

Re: [PATCH v2] Documentation/arm64: HugeTLB page implementation

2018-10-09 Thread Will Deacon
On Tue, Oct 09, 2018 at 11:02:01AM +0100, Punit Agrawal wrote: > Randy Dunlap writes: > > > On 10/8/18 3:03 AM, Punit Agrawal wrote: > >> Arm v8 architecture supports multiple page sizes - 4k, 16k and > >> 64k. Based on the active page size, the Linux port supports > >> corresponding hugepage siz

Re: [PATCH v2] Documentation/arm64: HugeTLB page implementation

2018-10-09 Thread Punit Agrawal
Randy Dunlap writes: > On 10/8/18 3:03 AM, Punit Agrawal wrote: >> Arm v8 architecture supports multiple page sizes - 4k, 16k and >> 64k. Based on the active page size, the Linux port supports >> corresponding hugepage sizes at PMD and PUD(4k only) levels. >> >> In addition, the architecture als

Re: [PATCH v2] Documentation/arm64: HugeTLB page implementation

2018-10-08 Thread Randy Dunlap
On 10/8/18 3:03 AM, Punit Agrawal wrote: > Arm v8 architecture supports multiple page sizes - 4k, 16k and > 64k. Based on the active page size, the Linux port supports > corresponding hugepage sizes at PMD and PUD(4k only) levels. > > In addition, the architecture also supports caching larger size

[PATCH v2] Documentation/arm64: HugeTLB page implementation

2018-10-08 Thread Punit Agrawal
Arm v8 architecture supports multiple page sizes - 4k, 16k and 64k. Based on the active page size, the Linux port supports corresponding hugepage sizes at PMD and PUD(4k only) levels. In addition, the architecture also supports caching larger sized ranges (composed of multiple entries) at the PTE