> I hope this is applicable for v2.
Yes, Srinivas is doing the right thing.
thanks,
-Len
> > Acked-by: Len Brown
On Sunday, June 30, 2019 7:14:08 PM CEST Srinivas Pandruvada wrote:
> The Intel(R) Speed select technologies contains four features.
>
> Performance profile:An non architectural mechanism that allows multiple
> optimized performance profiles per system via static and/or dynamic
> adjustment of cor
On Tue, Jul 2, 2019 at 5:42 PM Len Brown wrote:
>
> Acked-by: Len Brown
>
Thanks!
I hope this is applicable for v2.
> On Sat, Jun 29, 2019 at 10:31 AM Andy Shevchenko
> wrote:
> >
> > On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
> > wrote:
> > >
> > > The Intel(R) Speed select technolo
Acked-by: Len Brown
On Sat, Jun 29, 2019 at 10:31 AM Andy Shevchenko
wrote:
>
> On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
> wrote:
> >
> > The Intel(R) Speed select technologies contains four features.
> >
> > Performance profile:An non architectural mechanism that allows multiple
> >
On Mon, 2019-07-01 at 14:32 +0300, Andy Shevchenko wrote:
> On Sun, Jun 30, 2019 at 8:14 PM Srinivas Pandruvada
> wrote:
> >
> > The Intel(R) Speed select technologies contains four features.
> >
> > Performance profile:An non architectural mechanism that allows
> > multiple
> > optimized perfor
On Sun, Jun 30, 2019 at 8:14 PM Srinivas Pandruvada
wrote:
>
> The Intel(R) Speed select technologies contains four features.
>
> Performance profile:An non architectural mechanism that allows multiple
> optimized performance profiles per system via static and/or dynamic
> adjustment of core count
The Intel(R) Speed select technologies contains four features.
Performance profile:An non architectural mechanism that allows multiple
optimized performance profiles per system via static and/or dynamic
adjustment of core count, workload, Tjmax, and TDP, etc. aka ISS
in the documentation.
Base Fr
On Sat, 2019-06-29 at 19:00 +0300, Andy Shevchenko wrote:
> On Sat, Jun 29, 2019 at 5:53 PM Srinivas Pandruvada
> wrote:
> > On Sat, 2019-06-29 at 17:31 +0300, Andy Shevchenko wrote:
> > > On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
> > > wrote:
> > > > +++ b/tools/power/x86/intel_speed_s
On Sat, 2019-06-29 at 19:03 +0300, Andy Shevchenko wrote:
> On Sat, Jun 29, 2019 at 5:53 PM Srinivas Pandruvada
> wrote:
> > On Sat, 2019-06-29 at 17:31 +0300, Andy Shevchenko wrote:
> > > On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
> > > wrote:
> > > I need an Ack from tools/power mainta
On Sat, Jun 29, 2019 at 5:53 PM Srinivas Pandruvada
wrote:
> On Sat, 2019-06-29 at 17:31 +0300, Andy Shevchenko wrote:
> > On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
> > wrote:
> > I need an Ack from tools/power maintainer(s) for this.
> > Also see below.
> MAINTAINER file doesn't call
On Sat, Jun 29, 2019 at 5:53 PM Srinivas Pandruvada
wrote:
> On Sat, 2019-06-29 at 17:31 +0300, Andy Shevchenko wrote:
> > On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
> > wrote:
> > > +++ b/tools/power/x86/intel_speed_select/Makefile
> >
> > My experience with some tools are not good in
On Sat, 2019-06-29 at 17:31 +0300, Andy Shevchenko wrote:
> On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
> wrote:
> >
> > The Intel(R) Speed select technologies contains four features.
> >
> > Performance profile:An non architectural mechanism that allows
> > multiple
> > optimized perfor
On Thu, Jun 27, 2019 at 1:39 AM Srinivas Pandruvada
wrote:
>
> The Intel(R) Speed select technologies contains four features.
>
> Performance profile:An non architectural mechanism that allows multiple
> optimized performance profiles per system via static and/or dynamic
> adjustment of core count
The Intel(R) Speed select technologies contains four features.
Performance profile:An non architectural mechanism that allows multiple
optimized performance profiles per system via static and/or dynamic
adjustment of core count, workload, Tjmax, and TDP, etc. aka ISS
in the documentation.
Base Fr
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