From: Hanna Hawa
Add specific compatible string for Marvell usage due errata of
accessing 64bit registers of ARM SMMU, in AP806.
AP806 SOC use the generic ARM-MMU500, and there's no specific
implementation of Marvell, this compatible is used for errata only.
Signed-off-by: Hanna Hawa
---
Docu
From: Hanna Hawa
Due to erratum #582743, the Marvell Armada-AP806 can't access 64bit
to ARM SMMUv2 registers.
This patch split the writeq/readq to two accesses of writel/readl.
Note that separate writes/reads to 2 is not problem regards to atomicity,
because the driver use the readq/writeq while
From: Hanna Hawa
This series add support for IOMMU for AP806, including workaround
for accessing ARM SMMU 64bit registers.
AP-806 can't access SMMU registers with 64bit width, this patches split
the readq/writeq for 32bit access, due to erratanum #582743.
Hanna Hawa (4):
iommu/arm-smmu: introd
From: Hanna Hawa
This patch introduce the smmu_writeq_relaxed/smmu_readq_relaxed
helpers, as preparation to add specific Marvell work-around for
accessing 64bit width registers of ARM SMMU.
Signed-off-by: Hanna Hawa
---
drivers/iommu/arm-smmu.c | 36 +++-
1 file
From: Hanna Hawa
Add SMMU node for Marvell Armada-AP806 SOC.
Signed-off-by: Hanna Hawa
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
b/arch/arm64/boot/dts/marvell/armada-ap
