On Thu, Aug 22, 2019 at 08:07:01AM -0700, Moritz Fischer wrote:
> Hi Hao,
>
> On Mon, Aug 12, 2019 at 10:49:58AM +0800, Wu Hao wrote:
> > This patch takes advantage of driver core which helps to create
> > and remove sysfs attribute files, so there is no need to regis
On Tue, Aug 20, 2019 at 08:24:06PM -0700, Moritz Fischer wrote:
> Hi,
>
> On Mon, Aug 12, 2019 at 10:49:56AM +0800, Wu Hao wrote:
> > This patch makes init callback of sub features optional. With
> > this change, people don't need to prepare any empty init callback.
>
On Mon, Aug 19, 2019 at 10:51:24PM +0200, Greg KH wrote:
> On Mon, Aug 19, 2019 at 01:31:33PM +0800, Wu Hao wrote:
> > On Mon, Aug 12, 2019 at 10:49:55AM +0800, Wu Hao wrote:
> > > Hi Greg,
> > >
> > > This is v5 patchset which adds more features to FPGA DFL.
On Mon, Aug 12, 2019 at 10:49:55AM +0800, Wu Hao wrote:
> Hi Greg,
>
> This is v5 patchset which adds more features to FPGA DFL. Marjor changes
> against v4 are sysfs related code rework to address comments on v4.
>
> Please help to take a look. Thanks!
Hi Greg,
Did you get
On Wed, Aug 14, 2019 at 11:34:15AM -0500, Scott Wood wrote:
> On Wed, 2019-07-24 at 22:22 +0800, Wu Hao wrote:
> > On Wed, Jul 24, 2019 at 11:35:32AM +0200, Greg KH wrote:
> > > On Tue, Jul 23, 2019 at 12:51:24PM +0800, Wu Hao wrote:
> > > >
> > >
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: switch to device_add/remove_groups for sysfs.
v3: update kernel version and date in sysfs doc
v4: rebase, remove dev_dbg in init/uinit callback.
v5: reorganize sysfs entries:
remove &quo
Documentation patch (patch #12).
Main changes from v1:
- remove DRV/MODULE_VERSION modifications. (patch #1, #3, #4, #6)
- remove argsz from new ioctls. (patch #2)
- replace sysfs_create/remove_* with device_add/remove_* for sysfs entries.
(patch #5, #8, #11)
Wu Hao (9):
fpga: dfl: make
interface
is exposed to userspace application for this purpose too.
Signed-off-by: Ananda Ravuri
Signed-off-by: Russ Weight
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: rebased, and switched to use device_add/remove_groups for sysfs
This patch takes advantage of driver core which helps to create
and remove sysfs attribute files, so there is no need to register
sysfs entries manually in dfl-afu platform river code.
Signed-off-by: Wu Hao
---
drivers/fpga/dfl-afu-main.c | 69 +++--
1
As these two functions are used by other private features within the
same driver module but different driver files. e.g. in error reporting
private feature, it requires to clear errors when port is in reset.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked-by: Alan
This patch adds virtualization support description for DFL based
FPGA devices (based on PCIe SRIOV), and introductions to new
interfaces added by new dfl private feature drivers.
[m...@kernel.org: Fixed up to make it work with new reStructuredText docs]
Signed-off-by: Xu Yilun
Signed-off-by: Wu
This patch makes init callback of sub features optional. With
this change, people don't need to prepare any empty init callback.
Signed-off-by: Wu Hao
---
drivers/fpga/dfl.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/
STP (SignalTap) is one of the private features under the port for
debugging. This patch adds private feature driver support for it
to allow userspace applications to mmap related mmio region and
provide STP service.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked
This patch takes advantage of driver core which helps to create
and remove sysfs attribute files, so there is no need to register
sysfs entries manually in dfl-fme platform river code.
Signed-off-by: Wu Hao
---
drivers/fpga/dfl-fme-main.c | 29 ++---
1 file changed, 2
Error reporting is one important private feature, it reports error
detected on port and accelerated function unit (AFU). It introduces
several sysfs interfaces to allow userspace to check and clear
errors detected by hardware.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
On Wed, Aug 07, 2019 at 10:45:22AM +0800, Wu Hao wrote:
> On Mon, Aug 05, 2019 at 05:56:26PM +0200, Greg KH wrote:
> > On Sun, Aug 04, 2019 at 06:20:21PM +0800, Wu Hao wrote:
> > > +static int fme_global_err_init(struct platform_device *pdev,
> > > +
On Mon, Aug 05, 2019 at 05:56:26PM +0200, Greg KH wrote:
> On Sun, Aug 04, 2019 at 06:20:21PM +0800, Wu Hao wrote:
> > +static int fme_global_err_init(struct platform_device *pdev,
> > + struct dfl_feature *feature)
> > +{
> > + struct devic
On Mon, Aug 05, 2019 at 05:54:37PM +0200, Greg KH wrote:
> On Sun, Aug 04, 2019 at 06:20:17PM +0800, Wu Hao wrote:
> > Error reporting is one important private feature, it reports error
> > detected on port and accelerated function unit (AFU). It introduces
> > several sysf
On Mon, Aug 05, 2019 at 05:52:40PM +0200, Greg KH wrote:
> On Sun, Aug 04, 2019 at 06:20:16PM +0800, Wu Hao wrote:
> > As these two functions are used by other private features. e.g.
> > in error reporting private feature, it requires to check port status
> > and reset po
On Mon, Aug 05, 2019 at 05:51:13PM +0200, Greg KH wrote:
> On Sun, Aug 04, 2019 at 06:20:14PM +0800, Wu Hao wrote:
> > This patch introduces userclock sysfs interfaces for AFU, user
> > could use these interfaces for clock setting to AFU.
> >
> > Please note that, th
This patch adds id_table for each dfl private feature driver,
it allows to reuse same private feature driver to match and support
multiple dfl private features.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2
Error reporting is one important private feature, it reports error
detected on port and accelerated function unit (AFU). It introduces
several sysfs interfaces to allow userspace to check and clear
errors detected by hardware.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
This patch adds virtualization support description for DFL based
FPGA devices (based on PCIe SRIOV), and introductions to new
interfaces added by new dfl private feature drivers.
[m...@kernel.org: Fixed up to make it work with new reStructuredText docs]
Signed-off-by: Xu Yilun
Signed-off-by: Wu
to PF, this ioctl adds port platform device
back to re-enable related userspace interfaces on PF.
Signed-off-by: Zhang Yi Z
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Acked-by: Moritz Fischer
Signed-off-by: Moritz Fischer
---
v2: remove argsz from ioctls.
v4:
interface
is exposed to userspace application for this purpose too.
Signed-off-by: Ananda Ravuri
Signed-off-by: Russ Weight
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: rebased, and switched to use device_add/remove_groups for sysfs
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: switch to device_add/remove_groups for sysfs.
v3: update kernel version and date in sysfs doc
v4: rebase, remove dev_dbg in init/uinit callback.
---
Documentation/ABI/testing/sysfs-platform-dfl
This patch adds 3 read-only sysfs interfaces for FPGA Management Engine
(FME) block for capabilities including cache_size, fabric_version and
socket_id.
Signed-off-by: Luwei Kang
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: rebased
STP (SignalTap) is one of the private features under the port for
debugging. This patch adds private feature driver support for it
to allow userspace applications to mmap related mmio region and
provide STP service.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked
As these two functions are used by other private features. e.g.
in error reporting private feature, it requires to check port status
and reset port for error clearing.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
This patch makes uinit callback of sub features optional. With
this change, people don't need to prepare any empty uinit callback.
Signed-off-by: Wu Hao
---
drivers/fpga/dfl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
d-off-by: Ananda Ravuri
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: rebased, and remove DRV/MODULE_VERSION modifications
v3: update kernel version and date in sysfs doc
v4: improve description in sysfs doc avoid misunderstanding.
s
, #4, #6)
- remove argsz from new ioctls. (patch #2)
- replace sysfs_create/remove_* with device_add/remove_* for sysfs entries.
(patch #5, #8, #11)
Wu Hao (12):
fpga: dfl: fme: add DFL_FPGA_FME_PORT_RELEASE/ASSIGN ioctl support.
fpga: dfl: pci: enable SRIOV support.
fpga: dfl: afu
This patch enables the standard sriov support. It allows user to
enable SRIOV (and VFs), then user could pass through accelerators
(VFs) into virtual machine or use VFs directly in host.
Signed-off-by: Zhang Yi Z
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Acked-by
On Wed, Jul 24, 2019 at 11:35:32AM +0200, Greg KH wrote:
> On Tue, Jul 23, 2019 at 12:51:24PM +0800, Wu Hao wrote:
> > In early partial reconfiguration private feature, it only
> > supports 32bit data width when writing data to hardware for
> > PR. 512bit data width PR su
On Wed, Jul 24, 2019 at 11:33:57AM +0200, Greg KH wrote:
> On Tue, Jul 23, 2019 at 12:51:25PM +0800, Wu Hao wrote:
> > +/**
> > + * dfl_fpga_cdev_config_port - configure a port feature dev
> > + * @cdev: parent container device.
> > + * @port_id: id of the port featu
On Wed, Jul 24, 2019 at 11:37:44AM +0200, Greg KH wrote:
> On Tue, Jul 23, 2019 at 12:51:26PM +0800, Wu Hao wrote:
> > This patch enables the standard sriov support. It allows user to
> > enable SRIOV (and VFs), then user could pass through accelerators
> > (VFs) into virtu
On Wed, Jul 24, 2019 at 11:41:10AM +0200, Greg KH wrote:
> On Tue, Jul 23, 2019 at 12:51:27PM +0800, Wu Hao wrote:
> > This patch introduces more sysfs interfaces for Accelerated
> > Function Unit (AFU). These interfaces allow users to read
> > current AFU Power State (APx), r
On Wed, Jul 24, 2019 at 12:11:09PM +0200, Greg KH wrote:
> On Tue, Jul 23, 2019 at 12:51:32PM +0800, Wu Hao wrote:
> > STP (SignalTap) is one of the private features under the port for
> > debugging. This patch adds private feature driver support for it
> > to allow userspace
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: switch to device_add/remove_groups for sysfs.
v3: update kernel version and date in sysfs doc
---
Documentation/ABI/testing/sysfs-platform-dfl-fme | 75 +
drivers/fpga/Makefile
userspace interfaces on PF.
Signed-off-by: Zhang Yi Z
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Acked-by: Moritz Fischer
Signed-off-by: Moritz Fischer
---
v2: remove argsz from ioctls.
---
drivers/fpga/dfl-fme-main.c | 30
drivers/fpga/dfl.c| 107
As these two functions are used by other private features. e.g.
in error reporting private feature, it requires to check port status
and reset port for error clearing.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
d-off-by: Ananda Ravuri
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: rebased, and remove DRV/MODULE_VERSION modifications
v3: update kernel version and date in sysfs doc
---
Documentation/ABI/testing/sysfs-platform-dfl-port
Error reporting is one important private feature, it reports error
detected on port and accelerated function unit (AFU). It introduces
several sysfs interfaces to allow userspace to check and clear
errors detected by hardware.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
STP (SignalTap) is one of the private features under the port for
debugging. This patch adds private feature driver support for it
to allow userspace applications to mmap related mmio region and
provide STP service.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked
in integrated
solution that AVX512 is always supported. This revision 2
hardware doesn't support 32bit PR.
Signed-off-by: Ananda Ravuri
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: remove DRV/MODULE_VERSION modifications
---
dr
This patch adds id_table for each dfl private feature driver,
it allows to reuse same private feature driver to match and support
multiple dfl private features.
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Moritz Fischer
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2
driver core functions, not sysfs ones.
https://lkml.org/lkml/2019/7/4/36
Wu Hao (12):
fpga: dfl: fme: support 512bit data width PR
fpga: dfl: fme: add DFL_FPGA_FME_PORT_RELEASE/ASSIGN ioctl support.
fpga: dfl: pci: enable SRIOV support.
fpga: dfl: afu: add AFU state related sysfs interfaces
interface
is exposed to userspace application for this purpose too.
Signed-off-by: Ananda Ravuri
Signed-off-by: Russ Weight
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: rebased, and switched to use device_add/remove_groups for sysfs
This patch enables the standard sriov support. It allows user to
enable SRIOV (and VFs), then user could pass through accelerators
(VFs) into virtual machine or use VFs directly in host.
Signed-off-by: Zhang Yi Z
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Acked-by
This patch adds 3 read-only sysfs interfaces for FPGA Management Engine
(FME) block for capabilities including cache_size, fabric_version and
socket_id.
Signed-off-by: Luwei Kang
Signed-off-by: Xu Yilun
Signed-off-by: Wu Hao
Acked-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v2: rebased
This patch adds virtualization support description for DFL based
FPGA devices (based on PCIe SRIOV), and introductions to new
interfaces added by new dfl private feature drivers.
[m...@kernel.org: Fixed up to make it work with new reStructuredText docs]
Signed-off-by: Xu Yilun
Signed-off-by: Wu
On Thu, Jul 04, 2019 at 01:04:49PM +0200, Greg KH wrote:
> On Thu, Jul 04, 2019 at 04:58:55PM +0800, Wu Hao wrote:
> > > > Hope things could be more clear now. :)
> > >
> > > That's nice for the vfio stuff, but you are just a "normal" driver here.
On Thu, Jul 04, 2019 at 10:20:13AM +0200, Greg KH wrote:
> On Thu, Jul 04, 2019 at 02:31:06PM +0800, Wu Hao wrote:
> > On Thu, Jul 04, 2019 at 07:39:27AM +0200, Greg KH wrote:
> > > On Thu, Jul 04, 2019 at 07:30:58AM +0800, Wu Hao wrote:
> > > > On Wed, Jul 03, 201
On Thu, Jul 04, 2019 at 10:17:13AM +0200, Greg KH wrote:
> On Thu, Jul 04, 2019 at 02:42:08PM +0800, Wu Hao wrote:
> > On Thu, Jul 04, 2019 at 07:37:19AM +0200, Greg KH wrote:
> > > On Thu, Jul 04, 2019 at 07:38:22AM +0800, Wu Hao wrote:
> > > > On Wed, Jul 03, 201
On Thu, Jul 04, 2019 at 07:37:19AM +0200, Greg KH wrote:
> On Thu, Jul 04, 2019 at 07:38:22AM +0800, Wu Hao wrote:
> > On Wed, Jul 03, 2019 at 07:59:26PM +0200, Greg KH wrote:
> > > On Thu, Jun 27, 2019 at 05:49:41PM -0700, Moritz Fischer wrote:
> > > > From: Wu Ha
On Thu, Jul 04, 2019 at 07:39:27AM +0200, Greg KH wrote:
> On Thu, Jul 04, 2019 at 07:30:58AM +0800, Wu Hao wrote:
> > On Wed, Jul 03, 2019 at 08:07:53PM +0200, Greg KH wrote:
> > > On Thu, Jun 27, 2019 at 05:49:42PM -0700, Moritz Fischer wrote:
> > > > From: Wu Hao
On Wed, Jul 03, 2019 at 07:56:01PM +0200, Greg KH wrote:
> On Thu, Jun 27, 2019 at 05:49:40PM -0700, Moritz Fischer wrote:
> > From: Wu Hao
> >
> > In early partial reconfiguration private feature, it only
> > supports 32bit data width when writing data to hardware fo
On Wed, Jul 03, 2019 at 07:59:26PM +0200, Greg KH wrote:
> On Thu, Jun 27, 2019 at 05:49:41PM -0700, Moritz Fischer wrote:
> > From: Wu Hao
> >
> > This patch adds virtualization support description for DFL based
> > FPGA devices (based on PCIe SRIOV), and introduc
On Wed, Jul 03, 2019 at 08:07:53PM +0200, Greg KH wrote:
> On Thu, Jun 27, 2019 at 05:49:42PM -0700, Moritz Fischer wrote:
> > From: Wu Hao
> >
> > In order to support virtualization usage via PCIe SRIOV, this patch
> > adds two ioctls under FPGA Management Engine (FME
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