* Kishon Vijay Abraham I [180425 12:57]:
> --- a/arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi
> +++ b/arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi
> @@ -49,6 +49,17 @@
> >;
> };
>
> + mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
> + pinctrl-single,pins
Hi,
* Kishon Vijay Abraham I [170519 01:19]:
> This series adds UHS, HS200, DDR mode and ADMA support to
> omap_hsmmc driver used to improve the throughput of MMC/SD in dra7
> SoCs.
Certainly seems way less intrusive than earlier before the
dmaengine changes :)
> *) tuning ratio of MMC in dra7
* Kishon Vijay Abraham I [170112 02:34]:
> Add pcie1 dt node in order for the controller to operate in
> endpoint mode. However since none of the dra7 based boards have
> slots configured to operate in endpoint mode, keep EP mode
> disabled.
Can this be merged separately later on without breaking
* Kishon Vijay Abraham I [170115 22:06]:
> Hi Tony,
>
> On Friday 13 January 2017 10:45 PM, Tony Lindgren wrote:
> > * Kishon Vijay Abraham I [170112 02:35]:
> >> The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
> >> be set to SW_WKUP. Ther
* Kishon Vijay Abraham I [170112 02:35]:
> The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
> be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO
> in RC mode. However in EP mode, the host system is not able to access the
> MEMSPACE and setting the CLKSTCT
