Re: [PATCH v3 1/3] kasan: Archs don't check memmove if not support it.

On Thu, 17 Oct 2019, Andrey Ryabinin wrote: > On 10/8/19 9:11 AM, Nick Hu wrote: > > Skip the memmove checking for those archs who don't support it. > > The patch is fine but the changelog sounds misleading. We don't skip memmove > checking. > If arch don't have memmove than the C implementatio

[PATCH] Documentation: admin-guide: add earlycon documentation for RISC-V

n-guide. Signed-off-by: Paul Walmsley Cc: Geert Uytterhoeven Cc: Christoph Hellwig Cc: Andreas Schwab --- Documentation/admin-guide/kernel-parameters.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-

Re: [PATCH] Documentation: admin-guide: add earlycon documentation for the sifive serial driver

Hi Geert, On Wed, 9 Oct 2019, Geert Uytterhoeven wrote: > On Wed, Oct 9, 2019 at 12:06 PM Andreas Schwab wrote: > > On Okt 09 2019, Geert Uytterhoeven wrote: > > > I believe risc-v is DT-only, so if chosen/stdout-path is set up > > > > If. Currently, it isn't. > > IC. So isn't it better to fi

[PATCH] Documentation: admin-guide: add earlycon documentation for the sifive serial driver

Document earlycon usage for the SiFive serial port driver in the same fashion as for the other serial port IP blocks, since the SiFive serial port driver supports it. Signed-off-by: Paul Walmsley Reported-by: Andreas Schwab Cc: Christoph Hellwig --- Documentation/admin-guide/kernel

Re: [PATCH 1/3] docs: fix some broken references

SC-V Linux kernel documentation > -Documentation/devicetree/bindings/riscv/cpus.txt > +Documentation/devicetree/bindings/riscv/cpus.yaml > [4] https://www.devicetree.org/specifications/ For the RISC-V related change: Acked-by: Paul Walmsley # RISC-V - Paul

Re: [PATCH] riscv-docs: correct the sequence of the magic number 2 since it's little endian

idiocy on my part, due to a very last-minute patch submission, where I missed that the original documented magic number was already in little-endian format. The updated number from Chester is correct. So, Reviewed-by: Paul Walmsley - Paul

Re: [PATCH v4] RISC-V: Add an Image header that boot loader can parse.

On Fri, 28 Jun 2019, Atish Patra wrote: > On Fri, 2019-06-28 at 12:09 -0700, Paul Walmsley wrote: > > On Thu, 6 Jun 2019, Atish Patra wrote: > > > > > Currently, the last stage boot loaders such as U-Boot can accept > > > only > > > uImage which is an

Re: [PATCH v4] RISC-V: Add an Image header that boot loader can parse.

On Thu, 6 Jun 2019, Atish Patra wrote: > Currently, the last stage boot loaders such as U-Boot can accept only > uImage which is an unnecessary additional step in automating boot > process. > > Add an image header that boot loader understands and boot Linux from > flat Image directly. ... > +#