On Wed, Jul 30, 2025 at 07:04:13PM +0100, Lorenzo Stoakes wrote:
> On Wed, Jul 30, 2025 at 01:32:20PM -0400, Steven Rostedt wrote:
> > If the maintainer starts getting too many submissions, then they can update
> > the MAINTAINERS file to say "stop all AI patches to me!". Just like we have
> > an
On Wed, Jul 30, 2025 at 05:59:25PM +0100, Lorenzo Stoakes wrote:
> On Wed, Jul 30, 2025 at 12:36:25PM -0400, Sasha Levin wrote:
> > Some sort of a "traffic light" system:
> > 1. Green: the subsystem is happy to receive patches from any source.
> > 2. Yellow: "If you're unfamiliar with the subs
On Fri, Jul 25, 2025 at 11:37:13AM -0700, dan.j.willi...@intel.com wrote:
> Jakub Kicinski wrote:
> > So a tag would be ideal. But it's a hard nut to crack. Best I can come
> > up with would be:
> > Reproducer: test.case.path # 001122aabb (optimal) commit of the test case
> That's true, more tha
On Fri, Jul 25, 2025 at 08:00:23AM -0700, Jakub Kicinski wrote:
> Does anyone have ideas about crediting test authors or tests for bugs
> discovered? We increasingly see situations where someone adds a test
> then our subsystem CI uncovers a (1 in a 100 runs) bug using that test.
> Using reporte
On Thu, Jul 17, 2025 at 03:23:00PM +0200, Christoph Hellwig wrote:
> On Thu, Jul 17, 2025 at 10:48:02AM +0200, Thomas Weißschuh wrote:
> > If the kernel toolchain is not fit to
> > produce userspace because of a missing libc, the kernel's own nolibc can
> > be used instead.
> Is nolibc enough to
On Sun, Jun 29, 2025 at 10:32:23AM +0100, Marc Zyngier wrote:
> Mark Brown wrote:
> > +++ b/arch/arm64/include/asm/kvm_host.h
> > @@ -495,6 +495,7 @@ enum vcpu_sysreg {
> > SVCR,
> > FPMR,
> > SMIDR_EL1, /* Streaming Mode Identificat
FEAT_LSFE (Large System Float Extension), providing atomic floating point
memory operations, is optional from v9.5. This feature adds no new
architectural state, expose the relevant ID register field to guests so
they can discover it.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/sys_regs.c | 4
: Mark Brown
---
Documentation/arch/arm64/elf_hwcaps.rst | 4
arch/arm64/include/asm/hwcap.h | 1 +
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 2 ++
arch/arm64/kernel/cpuinfo.c | 1 +
5 files changed, 9 insertions(+)
diff --git a
This feature has no traps associated with it so the SIGILL is not reliable.
Signed-off-by: Mark Brown
---
tools/testing/selftests/arm64/abi/hwcap.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c
b/tools/testing/selftests
FEAT_LSFE is optional from v9.5, it adds new instructions for atomic
memory operations with floating point values. We have no immediate use
for it in kernel, provide a hwcap so userspace can discover it and allow
the ID register field to be exposed to KVM guests.
Signed-off-by: Mark Brown
This feature has no traps associated with it so the SIGILL is not reliable.
Signed-off-by: Mark Brown
---
tools/testing/selftests/arm64/abi/hwcap.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c
b/tools/testing/selftests
FEAT_LSFE (Large System Float Extension), providing atomic floating point
memory operations, is optional from v9.5. This feature adds no new
architectural state, expose the relevant ID register field to guests so
they can discover it.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/sys_regs.c | 4
: Mark Brown
---
Documentation/arch/arm64/elf_hwcaps.rst | 4
arch/arm64/include/asm/hwcap.h | 1 +
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 2 ++
arch/arm64/kernel/cpuinfo.c | 1 +
5 files changed, 9 insertions(+)
diff --git a
FEAT_LSFE is optional from v9.5, it adds new instructions for atomic
memory operations with floating point values. We have no immediate use
for it in kernel, provide a hwcap so userspace can discover it and allow
the ID register field to be exposed to KVM guests.
Signed-off-by: Mark Brown
As for SVE we will need to pull parts of dynamically sized registers out of
a block of memory for SME so we will use a similar code pattern for this.
Rename the current struct sve_state_reg_region in preparation for this.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/kvm
extensions adding more
ZT registers. This encoding can readily support such an extension if one is
introduced.
Signed-off-by: Mark Brown
---
arch/arm64/include/uapi/asm/kvm.h | 17 ++
arch/arm64/kvm/guest.c| 114 +-
2 files changed, 129 insertions
the guest floating point state may be
accessed via the V registers.
Any VMM that supports SME must be aware of the need to configure streaming
mode prior to writing the floating point registers that this creates.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/guest.c | 38
Rather than add earlier prototypes of specific ctxt_has_ helpers let's just
pull all their definitions to the top of sysreg-sr.h so they're all
available to all the individual save/restore functions.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/hyp/include/hyp/sysreg
purely software defined.
Expose the register as a system register if the guest supports SME,
context switching it along with the other EL0 TPIDRs.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 15
.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/sys_regs.c | 46 +++
2 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b/arch/arm64/include/asm/kvm_host.h
index
move the
restore of the effective VL for nested guests to a separate restore
function run after loading the floating point register state, along with
the similar handling required for SME.
The selection of which vector length to use is handled by vcpu_sve_pffr().
Signed-off-by: Mark Brown
variable to
the cpu_fp_state which uses the enable bits in SMCR_ELx to flag which
features are enabled.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/fpsimd.h | 1 +
arch/arm64/kernel/fpsimd.c | 10 --
arch/arm64/kvm/fpsimd.c | 1 +
3 files changed, 10 insertions
SVE or SME is finalised and the
other not, avoiding complexity.
SME is supported for normal and protected guests.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 12 +++-
arch/arm64/include/uapi/asm/kvm.h | 1 +
arch/arm64/kvm/arm.c | 10
arch/arm64/kvm
Add coverage of the SME ID registers to set_id_regs, ID_AA64PFR1_EL1.SME
becomes writable and we add ID_AA64SMFR_EL1 and it's subfields.
Signed-off-by: Mark Brown
---
tools/testing/selftests/kvm/arm64/set_id_regs.c | 29 +++--
1 file changed, 27 insertions(+), 2 dele
SME adds a number of new system registers, update get-reg-list to check for
them based on the visibility of SME.
Signed-off-by: Mark Brown
---
tools/testing/selftests/kvm/arm64/get-reg-list.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/tools
-off-by: Mark Brown
---
arch/arm64/kernel/fpsimd.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 77f9dfaffe8b..de2897d6208c 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -1908,6
h are configured via the normal ID register scheme.
Also provide helpers which check if the vCPU is in streaming mode or has
ZA enabled.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 35 ++-
arch/arm64/kvm/sys_regs.c | 2 +-
2 files ch
.
Signed-off-by: Mark Brown
---
Documentation/virt/kvm/api.rst | 117 +
1 file changed, 82 insertions(+), 35 deletions(-)
diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index 9abf93ee5f65..00195e837b5f 100644
--- a/Documentation
specific handling
for the vector lengths already in place.
TPIDR2_EL0 is context switched along with the other TPIDRs as part of the
main guest register context switch.
SME priority support is currently masked from all guests including nested
ones.
Signed-off-by: Mark Brown
---
arch/arm64/kvm
for FPSIMD and SVE.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/handle_exit.c| 14 ++
arch/arm64/kvm/hyp/include/hyp/switch.h | 11 ++-
arch/arm64/kvm/hyp/nvhe/switch.c| 4 +++-
arch/arm64/kvm/hyp/vhe/switch.c | 17 -
4 files changed
happens with a maximum vector length of -1.
Signed-off-by: Mark Brown
---
arch/arm64/kernel/fpsimd.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index de2897d6208c..fbc586813f6a 100644
--- a/arch
PSTATE.ZA to 0 causes ZA and ZT0 to become inaccesible
so no reset is needed.
Any change in PSTATE.SM causes the V, Z, P, FFR and FPMR registers to be
reset to 0 and FPSR to be reset to 0x89f.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 24
arch
Provide versions of the SME state save and restore functions for the
hypervisor to allow it to restore ZA and ZT for guests.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_hyp.h | 3 +++
arch/arm64/kvm/hyp/fpsimd.S | 26 ++
2 files changed, 29 insertions
when priority configuration is not supported
but has no specific traps available.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/include/asm/vncr_mapping.h | 1 +
arch/arm64/kvm/sys_regs.c | 23 ++-
3 files change
registers stub register
access functions are provided that only allow VL configuration. These
will be extended as the SME specific registers, as for SVE.
Since vq_available() is currently only defined for CONFIG_SVE add a stub
for builds where that is disabled.
Signed-off-by: Mark Brown
as part of the general floating point context switch, as is
done for the equivalent SVE registers.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/include/asm/vncr_mapping.h | 1 +
arch/arm64/kvm/sys_regs.c | 37
clean as might be.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 17 +++--
arch/arm64/include/asm/kvm_hyp.h| 2 +-
arch/arm64/include/asm/kvm_pkvm.h | 2 +-
arch/arm64/kvm/fpsimd.c | 2 +-
arch/arm64/kvm
In preparation for SME support move the macros used to access SVE state
after the feature test macros, we will need to test for SME subfeatures to
determine the size of the SME state.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 50 +++
1
the existing KVM_ARM_VCPU_SVE capability, existing
code which does not enable SME will be unaffected and any SME only code
will not need to use SVE constants.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 8 +---
arch/arm64/include/uapi/asm/kvm.h
FFR is always present for SVE but will
be important for SME.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/hyp/fpsimd.S | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/kvm/hyp/fpsimd.S b/arch/arm64/kvm/hyp/fpsimd.S
index e950875e31ce..6e16cbfc5df2 100644
--- a/arch/arm64/kvm/hyp
g the overwhelmingly common case).
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 6 ++
arch/arm64/kvm/hyp/include/hyp/switch.h | 7 ---
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b/arch/arm64/include/asm/kvm_h
this should be negligable in the
context of the state load or access trap. In order to avoid compiler
warnings due to unused variables in !CONFIG_ARM64_SME cases we avoid
storing the vector length in temporary variables.
Signed-off-by: Mark Brown
df
---
arch/arm64/include/asm/fpsimd.h
ossible feature combinations has been rejected. I will post a separate
series which does that restructuring.
Signed-off-by: Mark Brown
---
Changes in v6:
- Rebase onto v6.16-rc3.
- Link to v5:
https://lore.kernel.org/r/20250417-kvm-arm64-sme-v5-0-f469a2d5f...@kernel.org
Changes in v5:
- Rebase
-off-by: Mark Brown
squash ctxtsync
---
arch/arm64/kvm/handle_exit.c | 14 +
arch/arm64/kvm/hyp/nvhe/hyp-main.c | 22 -
arch/arm64/kvm/hyp/nvhe/switch.c | 40 +++---
arch/arm64/kvm/hyp/vhe/switch.c| 29
the guest floating point state may be
accessed via the V registers.
Any VMM that supports SME must be aware of the need to configure streaming
mode prior to writing the floating point registers that this creates.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/guest.c | 38
psimd: Avoid RES0
bits in the SME trap handler" which changes the defines for ESR decode,
but also due to the assistance in testing.
Signed-off-by: Mark Brown
---
Changes in v5:
- Rebase onto v6.15-rc2.
- Add pKVM guest support.
- Always restore SVCR.
- Link to v4:
https://lore.kernel.org
SVE or SME is finalised and the
other not, avoiding complexity.
SME is supported for normal and protected guests.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 9 +--
arch/arm64/include/uapi/asm/kvm.h | 1 +
arch/arm64/kvm/arm.c | 10
arch/arm64/kvm
SME adds a number of new system registers, update get-reg-list to check for
them based on the visibility of SME.
Signed-off-by: Mark Brown
---
tools/testing/selftests/kvm/arm64/get-reg-list.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/tools
need to move the
restore of the effective VL for nested guests to a separate restore
function run after loading the floating point register state, along with
the similar handling required for SME.
The selection of which vector length to use is handled by vcpu_sve_pffr().
Signed-off-by: Mark Brown
as part of the general floating point context switch, as is
done for the equivalent SVE registers.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/include/asm/vncr_mapping.h | 1 +
arch/arm64/kvm/sys_regs.c | 37
variable to
the cpu_fp_state which uses the enable bits in SMCR_ELx to flag which
features are enabled.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/fpsimd.h | 1 +
arch/arm64/kernel/fpsimd.c | 10 --
arch/arm64/kvm/fpsimd.c | 1 +
3 files changed, 10 insertions
registers stub register
access functions are provided that only allow VL configuration. These
will be extended as the SME specific registers, as for SVE.
Since vq_available() is currently only defined for CONFIG_SVE add a stub
for builds where that is disabled.
Signed-off-by: Mark Brown
specific handling
for the vector lengths already in place.
TPIDR2_EL0 is context switched along with the other TPIDRs as part of the
main guest register context switch.
SME priority support is currently masked from all guests including nested
ones.
Signed-off-by: Mark Brown
---
arch/arm64/kvm
Add coverage of the SME ID registers to set_id_regs, ID_AA64PFR1_EL1.SME
becomes writable and we add ID_AA64SMFR_EL1 and it's subfields.
Signed-off-by: Mark Brown
---
tools/testing/selftests/kvm/arm64/set_id_regs.c | 30 +++--
1 file changed, 28 insertions(+), 2 dele
FFR is always present for SVE but will
be important for SME.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/hyp/fpsimd.S | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/kvm/hyp/fpsimd.S b/arch/arm64/kvm/hyp/fpsimd.S
index e950875e31ce..6e16cbfc5df2 100644
--- a/arch/arm64/kvm/hyp
extensions adding more
ZT registers. This encoding can readily support such an extension if one is
introduced.
Signed-off-by: Mark Brown
---
arch/arm64/include/uapi/asm/kvm.h | 17 ++
arch/arm64/kvm/guest.c| 114 +-
2 files changed, 129 insertions
PSTATE.ZA to 0 causes ZA and ZT0 to become inaccesible
so no reset is needed.
Any change in PSTATE.SM causes the V, Z, P, FFR and FPMR registers to be
reset to 0 and FPSR to be reset to 0x89f.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 18 ++
arch/arm64
Provide versions of the SME state save and restore functions for the
hypervisor to allow it to restore ZA and ZT for guests.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_hyp.h | 3 +++
arch/arm64/kvm/hyp/fpsimd.S | 26 ++
2 files changed, 29 insertions
r frequent accesses.
There is also an EL2 register SMPRIMAP_EL2 for virtualisation of
priorities, this is RES0 when priority configuration is not supported
but has no specific traps available.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/include/asm/vncr
.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/sys_regs.c | 46 +++
2 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b/arch/arm64/include/asm/kvm_host.h
index
purely software defined.
Expose the register as a system register if the guest supports SME,
context switching it along with the other EL0 TPIDRs.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 15
clean as might be.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 17 +++--
arch/arm64/include/asm/kvm_hyp.h| 2 +-
arch/arm64/include/asm/kvm_pkvm.h | 2 +-
arch/arm64/kvm/fpsimd.c | 2 +-
arch/arm64/kvm
h are configured via the normal ID register scheme.
Also provide helpers which check if the vCPU is in streaming mode or has
ZA enabled.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 37 +++--
arch/arm64/kvm/sys_regs.c | 2 +-
2
As for SVE we will need to pull parts of dynamically sized registers out of
a block of memory for SME so we will use a similar code pattern for this.
Rename the current struct sve_state_reg_region in preparation for this.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/kvm
.
Signed-off-by: Mark Brown
---
Documentation/virt/kvm/api.rst | 117 +
1 file changed, 82 insertions(+), 35 deletions(-)
diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index 47c7c3f92314..5cc30a93fdd7 100644
--- a/Documentation
the existing KVM_ARM_VCPU_SVE capability, existing
code which does not enable SME will be unaffected and any SME only code
will not need to use SVE constants.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 8 +---
arch/arm64/include/uapi/asm/kvm.h
In preparation for SME support move the macros used to access SVE state
after the feature test macros, we will need to test for SME subfeatures to
determine the size of the SME state.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 46 +++
1
Rather than add earlier prototypes of specific ctxt_has_ helpers let's just
pull all their definitions to the top of sysreg-sr.h so they're all
available to all the individual save/restore functions.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/hyp/include/hyp/sysreg
g the overwhelmingly common case).
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 6 ++
arch/arm64/kvm/hyp/include/hyp/switch.h | 7 ---
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b/arch/arm64/include/asm/kvm_h
happens with a maximum vector length of -1.
Signed-off-by: Mark Brown
---
arch/arm64/kernel/fpsimd.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 83a4f8d3e895..31b3ca061bb2 100644
--- a/arch
-off-by: Mark Brown
---
arch/arm64/kernel/fpsimd.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 266ce7a9f195..83a4f8d3e895 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -1913,6
this should be negligable in the
context of the state load or access trap. In order to avoid compiler
warnings due to unused variables in !CONFIG_ARM64_SME cases we avoid
storing the vector length in temporary variables.
Signed-off-by: Mark Brown
df
---
arch/arm64/include/asm/fpsimd.h
On Mon, Feb 17, 2025 at 09:37:26AM +, Marc Zyngier wrote:
> Mark Brown wrote:
> > On Fri, Feb 14, 2025 at 09:24:03AM +, Marc Zyngier wrote:
> > > Why SVCR? This isn't a register, just an architected accessor to
> > > PSTATE.{ZA,SM}. Userspace already h
On Fri, Feb 14, 2025 at 09:24:03AM +, Marc Zyngier wrote:
> Mark Brown wrote:
> Just to be clear: I do not intend to review a series that doesn't
> cover the full gamut of KVM from day 1. Protected mode is an absolute
> requirement. It is the largest KVM deployment, and A
h are configured via the normal ID register scheme.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 31 +--
arch/arm64/kvm/sys_regs.c | 2 +-
2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b
.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/sys_regs.c | 46 +++
2 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b/arch/arm64/include/asm/kvm_host.h
index
r frequent accesses.
There is also an EL2 register SMPRIMAP_EL2 for virtualisation of
priorities, this is RES0 when priority configuration is not supported
but has no specific traps available.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/include/asm/vncr
Add coverage of the SME ID registers to set_id_regs, ID_AA64PFR1_EL1.SME
becomes writable and we add ID_AA64SMFR_EL1 and it's subfields.
Signed-off-by: Mark Brown
---
tools/testing/selftests/kvm/arm64/set_id_regs.c | 29 +++--
1 file changed, 27 insertions(+), 2 dele
SVE or SME is finalised and the
other not, avoiding complexity.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 5 +-
arch/arm64/include/uapi/asm/kvm.h | 1 +
arch/arm64/kvm/arm.c | 10
arch/arm64/kvm/reset.c| 114
SME adds a number of new system registers, update get-reg-list to check for
them based on the visibility of SME.
Signed-off-by: Mark Brown
---
tools/testing/selftests/kvm/arm64/get-reg-list.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/tools
specific handling
for the vector lengths already in place.
TPIDR2_EL0 is context switched along with the other TPIDRs as part of the
main guest register context switch.
SME priority support is currently masked from all guests including nested
ones.
Signed-off-by: Mark Brown
---
arch/arm64/kvm
streaming mode before
running the guest. This ensures that guests do not receive unexpected
SME exceptions.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/handle_exit.c | 14 ++
arch/arm64/kvm/hyp/nvhe/switch.c | 11 ++-
arch/arm64/kvm/hyp/vhe/switch.c | 21 -
3
need to move the
restore of the effective VL for nested guests to a separate restore
function run after loading the floating point register state, along with
the similar handling required for SME.
The selection of which vector length to use is handled by vcpu_sve_pffr().
Signed-off-by: Mark Brown
extensions adding more
ZT registers. This encoding can readily support such an extension if one is
introduced.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 21 +++
arch/arm64/include/uapi/asm/kvm.h | 17 ++
arch/arm64/kvm/guest.c| 114
the guest floating point state may be
accessed via the V registers.
Any VMM that supports SME must be aware of the need to configure streaming
mode prior to writing the floating point registers that this creates.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 3 +++
arch/arm64
Provide a __sme_restore_state() for the hypervisor to allow it to restore
ZA and ZT for guests.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_hyp.h | 2 ++
arch/arm64/kvm/hyp/fpsimd.S | 16
2 files changed, 18 insertions(+)
diff --git a/arch/arm64/include/asm
purely software defined.
Expose the register as a system register if the guest supports SME,
context switching it along with the other EL0 TPIDRs.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 15
clean as might be.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 17 +++--
arch/arm64/include/asm/kvm_hyp.h| 2 +-
arch/arm64/include/asm/kvm_pkvm.h | 2 +-
arch/arm64/kvm/fpsimd.c | 2 +-
arch/arm64/kvm
registers stub register
access functions are provided that only allow VL configuration. These
will be extended as the SME specific registers, as for SVE.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 11 +
arch/arm64/include/uapi/asm/kvm.h | 9
arch/arm64/kvm
as part of the general floating point context switch, as is
done for the equivalent SVE registers.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/include/asm/vncr_mapping.h | 1 +
arch/arm64/kvm/sys_regs.c | 37
.
Signed-off-by: Mark Brown
---
Documentation/virt/kvm/api.rst | 117 +
1 file changed, 82 insertions(+), 35 deletions(-)
diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index
2b52eb77e29cba146b64489cfb1a267e7bb9b597
As for SVE we will need to pull parts of dynamically sized registers out of
a block of memory for SME so we will use a similar code pattern for this.
Rename the current struct sve_state_reg_region in preparation for this.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/kvm
In preparation for SME support move the macros used to access SVE state
after the feature test macros, we will need to test for SME subfeatures to
determine the size of the SME state.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 46 +++
1
the existing KVM_ARM_VCPU_SVE capability, existing
code which does not enable SME will be unaffected and any SME only code
will not need to use SVE constants.
No functional change.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 6 --
arch/arm64/include/uapi/asm/kvm.h | 6
Rather than add earlier prototypes of specific ctxt_has_ helpers let's just
pull all their definitions to the top of sysreg-sr.h so they're all
available to all the individual save/restore functions.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/hyp/include/hyp/sysreg
FFR is always present for SVE but will
be important for SME.
Signed-off-by: Mark Brown
---
arch/arm64/kvm/hyp/fpsimd.S | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/kvm/hyp/fpsimd.S b/arch/arm64/kvm/hyp/fpsimd.S
index
e950875e31cee4df58d041519b7584356463c91b
g the overwhelmingly common case).
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/kvm_host.h | 6 ++
arch/arm64/kvm/hyp/include/hyp/switch.h | 7 ---
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b/arch/arm64/include/asm/kvm_h
-off-by: Mark Brown
---
arch/arm64/kernel/fpsimd.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index
446a379d87539bb37a9d4eb7466a73d8819afc56..a97af9daea472cc57bafc0564fdfe4e327924db1
100644
--- a/arch/arm64
happens with a maximum vector length of -1.
Signed-off-by: Mark Brown
---
arch/arm64/kernel/fpsimd.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index
a97af9daea472cc57bafc0564fdfe4e327924db1
variable to
the cpu_fp_state which uses the enable bits in SMCR_ELx to flag which
features are enabled.
Signed-off-by: Mark Brown
---
arch/arm64/include/asm/fpsimd.h | 1 +
arch/arm64/kernel/fpsimd.c | 10 --
arch/arm64/kvm/fpsimd.c | 1 +
3 files changed, 10 insertions
1 - 100 of 295 matches
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