On Sun, Jul 30, 2017 at 4:00 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:46AM -0500, Jintack Lim wrote:
>> When HCR.NV bit is set, eret instructions trap to EL2 with EC code 0x1A.
>> Emulate eret instructions by setting pc and pstate.
>
> It may be worth
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:34AM -0500, Jintack Lim wrote:
>> To support the virtual EL2 execution, we need to maintain the EL2
>> special registers such as SPSR_EL2, ELR_EL2 and SP_EL2 in vcpu context.
>>
>&
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
>> Nested virtualizaion is in use only if all three conditions are met:
>> - The architecture supports nested virtualization.
>> - The kernel param
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:30AM -0500, Jintack Lim wrote:
>> Nested virtualizaion is in use only if all three conditions are met:
>> - The architecture supports nested virtualization.
>> - The kernel param
On Sun, Jul 30, 2017 at 3:59 PM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:58:28AM -0500, Jintack Lim wrote:
>> Add a new kernel parameter(kvm-arm.nested) to enable KVM/ARM nested
>> virtualization support. This kernel parameter on arm architecture is
>>
Hi Christoffer,
On Mon, Jul 31, 2017 at 8:59 AM, Christoffer Dall wrote:
> On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote:
>> Forward CPACR_EL1 traps to the virtual EL2 if virtual CPTR_EL2 is
>> configured to trap CPACR_EL1 accesses from EL1.
>>
>> T
Hi Christoffer,
On Mon, Jul 31, 2017 at 9:00 AM, Christoffer Dall wrote:
> Hi Jintack,
>
> On Tue, Jul 18, 2017 at 11:58:26AM -0500, Jintack Lim wrote:
>> Nested virtualization is the ability to run a virtual machine inside another
>> virtual machine. In other words,
On Fri, Jul 28, 2017 at 4:13 PM, Bandan Das wrote:
> Jintack Lim writes:
> ...
>>>
>>> I'll share my experiment setup shortly.
>>
>> I summarized my experiment setup here.
>>
>> https://github.com/columbia/nesting-pub/wiki/Nested-virtualizatio
On Wed, Jul 19, 2017 at 4:49 AM, Christoffer Dall wrote:
> Hi Jintack,
>
> On Tue, Jul 18, 2017 at 10:23:05PM -0400, Jintack Lim wrote:
>> On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim wrote:
>> > Nested virtualization is the ability to run a virtual machine inside
&
On Tue, Jul 18, 2017 at 12:59 PM, Jintack Lim wrote:
> Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the virtual EL2 if the
> virtual HCR_EL2.NV bit is set.
>
> This is for recursive nested virtualization.
>
> Signed-off-by: Jintack Lim
This should be linaro e-mail ad
On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim wrote:
> Nested virtualization is the ability to run a virtual machine inside another
> virtual machine. In other words, it’s about running a hypervisor (the guest
> hypervisor) on top of another hypervisor (the host hypervisor).
>
> Su
completed. Just add this parameter first to
use it when implementing nested virtualization support.
Signed-off-by: Jintack Lim
---
Documentation/admin-guide/kernel-parameters.txt | 4
arch/arm/include/asm/kvm_host.h | 4
arch/arm64/include/asm/kvm_host.h
Add a new ARM64_HAS_NESTED_VIRT feature to indicate that the
CPU has the ARMv8.3 nested virtualization capability.
This will be used to support nested virtualization in KVM.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/include/asm/sysreg.h | 1 +
arch
ster accesses in virtual EL2
Jintack Lim (31):
arm64: Add ARM64_HAS_NESTED_VIRT feature
KVM: arm/arm64: Enable nested virtualization via command-line
KVM: arm/arm64: Check if nested virtualization is in use
KVM: arm64: Add EL2 system registers to vcpu context
KVM: arm64: Add EL2 speci
Nested virtualizaion is in use only if all three conditions are met:
- The architecture supports nested virtualization.
- The kernel parameter is set.
- The userspace uses nested virtualiztion feature.
Signed-off-by: Jintack Lim
---
arch/arm/include/asm/kvm_host.h | 11 +++
arch/arm64
From: Christoffer Dall
Set the initial exception level of the guest to EL2 if nested
virtualization feature is enabled.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_host.h | 2 +-
arch/arm64/include/uapi/asm/kvm.h | 1 +
arch/arm64/kvm/reset.c
From: Christoffer Dall
We were not allowing userspace to set a more privileged mode for the VCPU
than EL1, but now that we support nesting with a virtual EL2 mode, do
allow this!
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/guest.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/ar
patch doesn't set the NV bit yet. It will be set in a later patch
once nested virtualization support is completed.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_host.h | 30 +++-
arch/arm64/include/asm/sysreg.h | 37 +
arch/arm64/kvm/sys_r
From: Christoffer Dall
When running a nested hypervisor we occasionally have to figure out if
the mode we are switching into is the virtual EL2 mode or a regular
EL0/1 mode.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_emulate.h | 6 ++
arch/arm64/include/asm/kvm_emulate
If the guest exception level is EL2, then set up the shadow context of
the virtual EL2 to hardware. Otherwise, set the regular EL0/EL1 context.
Note that the shadow context content will be prepared in subsequent
patches.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/context.c | 74
d-off-by: Jintack Lim
---
arch/arm/include/asm/kvm_emulate.h | 4 ++
arch/arm64/include/asm/kvm_emulate.h | 4 ++
arch/arm64/kvm/Makefile | 2 +-
arch/arm64/kvm/context.c | 54
arch/arm64/kvm/hyp/sysreg-sr.c
With the nested virtualization support, a hypervisor running inside a VM
(i.e. a guest hypervisor) is now deprivilaged and runs in EL1 instead of
EL2. So, the host hypervisor manages the shadow context for the virtual
EL2 execution.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm
From: Christoffer Dall
Some bits of the TCR weren't defined and since we're about to use these
in KVM, add these defines.
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/pgtable-hwdef.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h
To support the virtual EL2 execution, we need to maintain the EL2
special registers such as SPSR_EL2, ELR_EL2 and SP_EL2 in vcpu context.
Note that SP_EL2 is not accessible in EL2, so we don't need a trap
handler for this register.
Signed-off-by: Jintack Lim
---
arch/arm64/includ
From: Christoffer Dall
When running in virtual EL2 mode, we actually run the hardware in EL1
and therefore have to use the EL1 registers to ensure correct operation.
By setting the HCR.TVM and HCR.TVRM we ensure that the virtual EL2 mode
doesn't shoot itself in the foot when setting up what it b
a special care for MPIDR_EL1. Read of
this register returns the value of VMPIDR_EL2, so when a VM has the
virtual EL2, the value of MPIDR_EL1 should come from the virtual
VMPIDR_EL2.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/context.c | 81
Support inject synchronous exceptions to the virtual EL2 as
described in ARM ARM AArch64.TakeException().
This can be easily extended to support to inject asynchronous exceptions
to the virtual EL2, but it will be added in a later patch when appropriate.
Signed-off-by: Jintack Lim
---
arch/arm
These macros and enums can be reused to inject exceptions
for nested virtualization.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_emulate.h | 12
arch/arm64/kvm/inject_fault.c| 12
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a
.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/sysreg.h | 2 ++
arch/arm64/kvm/sys_regs.c | 29 -
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 98c32ef..6373d3d 100644
locally in the shadow array, with no benefit to
software actually running in virtual EL1 at all.
To fix this, simply synchronize the shadow and real EL1 state for these
registers on entry/exit to/from virtual EL2 state.
Signed-off-by: Christoffer Dall
Signed-off-by: Jintack Lim
---
arch/arm64/kvm
n.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/handle_exit.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
index d19e253..6cf6b93 100644
--- a/arch/arm64/kvm/handle_exit.c
+++ b/arch
virtual _EL2 registers.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/esr.h | 1 +
arch/arm64/kvm/handle_exit.c | 16
arch/arm64/kvm/trace.h | 21 +
3 files changed, 38 insertions(+)
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include
For the same reason we trap virtual memory register accesses in virtual
EL2, we trap CPACR_EL1 access too; We allow the virtual EL2 mode to
access EL1 system register state instead of the virtual EL2 one.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/hyp/switch.c | 10 +++---
arch/arm64/kvm
EL2 and above are trapped to EL2. In these cases,
ESR_EL2.EC will be set to 0x18.
Change the existing handler to handle those system instructions as well
as MRS/MSR instructions. Emulation of each system instructions will be
done in separate patches.
Signed-off-by: Jintack Lim
---
arch/arm64
Now that the psci call is done by the smc instruction when nested
virtualization is enabled, it is clear that all hvc instruction from the
VM (including from the virtual EL2) are supposed to handled in the
virtual EL2.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/handle_exit.c | 6 ++
1
Forward exceptions due to WFI or WFE instructions to the virtual EL2 if
they are not coming from the virtual EL2 and virtual HCR_EL2.TWX is set.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_host.h | 1 +
arch/arm64/kvm/handle_exit.c | 13 -
arch/arm64/kvm/nested.c
ARMv8.1 added more EL2 registers: TTBR1_EL2, CONTEXTIDR_EL2, and three
EL2 virtual timer registers. Add the first two registers to vcpu context
and set their handlers. The timer registers and their handlers will be
added in a separate patch.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm
These macros will be used to support the virtual EL2 with VHE.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_emulate.h | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_emulate.h
b/arch/arm64/include/asm/kvm_emulate.h
index
irtual EL2
without trapping to the host hypervisor. So, when returning from the VHE
host mode, set the vcpu mode depending on the physical exception level.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/context.c | 36 ++--
1 file changed, 22 insertions(+), 14 deletion
to EL2.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/context.c | 67 +++-
1 file changed, 66 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/context.c b/arch/arm64/kvm/context.c
index 39bd92d..9947bc8 100644
--- a/arch/arm64/kvm/context.c
Forward traps due to FP/ASIMD register accesses to the virtual EL2 if
virtual CPTR_EL2.TFP is set. Note that if TFP bit is set, then even
accesses to FP/ASIMD register from EL2 as well as NS EL0/1 will trap to
EL2. So, we don't check the VM's exception level.
Signed-off-by: Jintack Lim
since those registers already have EL2 register states.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/hyp/switch.c | 23 +--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index d513da9..fffd0c7 100644
Now that the virtual EL2 can access EL2 register states via EL1
registers, we need to consider it when selecting the register to
emulate.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 46 --
1 file changed, 44 insertions(+), 2 deletions
ccess virtual CPTR_EL2. The downside of using v8.0 format
is to convert the format when copying states between CPTR_EL2 and
CPACR_EL1 to support the virtual EL2 with VHE. The decision is subject
to change depending on the future discussion.
Signed-off-by: Jintack Lim
---
arch/arm64/includ
trap since it's one of the EL12 registers controlled by HCR_EL2.NV
bit. Therefore, add a handler for it and don't treat it as a
non-trap-registers when preparing a shadow context.
Move EL12 system register macros to a common place to reuse them.
Signed-off-by: Jintack Lim
---
ar
Forward traps due to HCR_EL2.NV bit to the virtual EL2 if they are not
coming from the virtual EL2 and the virtual HCR_EL2.NV bit is set.
This is for recursive nested virtualization.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_arm.h| 1 +
arch/arm64/include/asm/kvm_coproc.h
Forward the EL1 virtual memory register traps to the virtual EL2 if they
are not coming from the virtual EL2 and the virtual HCR_EL2.TVM or TRVM
bit is set.
This is for recursive nested virtualization.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 24
1
-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 4fd7090..3559cf7 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -149,6 +149,9 @@ static
Forward CPACR_EL1 traps to the virtual EL2 if virtual CPTR_EL2 is
configured to trap CPACR_EL1 accesses from EL1.
This is for recursive nested virtualization.
Signed-off-by: Jintack Lim
---
arch/arm64/kvm/sys_regs.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/kvm
Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the virtual EL2 if the
virtual HCR_EL2.NV bit is set.
This is for recursive nested virtualization.
Signed-off-by: Jintack Lim
---
arch/arm64/include/asm/kvm_arm.h | 1 +
arch/arm64/kvm/sys_regs.c| 18 ++
2 files changed
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