Hi Bjorn, Suman, and others
Do you have any comments regarding this patch?
BR
Fabien
> -Original Message-
> From: Fabien DESSENNE
> Sent: mercredi 11 septembre 2019 15:57
> To: Ohad Ben-Cohen ; Bjorn Andersson
> ; Suman Anna ; Jonathan Corbet
> ; linux-remotep.
IRQSTATE modes that make use of
spin_lock{_irq, _irqsave}), protect __hwspin_trylock with the atomic
bitop test_and_set_bit().
This bitop is atomic (SMP-safe), does not disable neither preemption
nor interrupts, hence it preserves the RAW and IN_ATOMIC modes
constraints.
Signed-off-by: Fabien
Hi Bjorn,
On 08/08/2019 5:37 PM, Bjorn Andersson wrote:
> On Thu 08 Aug 05:52 PDT 2019, Fabien DESSENNE wrote:
>
>> On 07/08/2019 6:19 PM, Suman Anna wrote:
>>> Hi Fabien,
>>>
>>> On 8/7/19 3:39 AM, Fabien DESSENNE wrote:
>>>> Hi
>>>&
On 07/08/2019 6:19 PM, Suman Anna wrote:
> Hi Fabien,
>
> On 8/7/19 3:39 AM, Fabien DESSENNE wrote:
>> Hi
>>
>> On 06/08/2019 11:30 PM, Suman Anna wrote:
>>> On 8/6/19 1:21 PM, Bjorn Andersson wrote:
>>>> On Tue 06 Aug 10:38 PDT 2019, Suman Anna wr
Hi
On 06/08/2019 11:30 PM, Suman Anna wrote:
> On 8/6/19 1:21 PM, Bjorn Andersson wrote:
>> On Tue 06 Aug 10:38 PDT 2019, Suman Anna wrote:
>>
>>> Hi Fabien,
>>>
>>> On 8/5/19 12:46 PM, Bjorn Andersson wrote:
>>>> On Mon 05 Aug 01:48 PDT 2019
Hi Suman,
Could you please let us know your thoughts or comments?
BR
Fabien
> -Original Message-
> From: Bjorn Andersson
> Sent: lundi 5 août 2019 19:47
> To: Fabien DESSENNE
> Cc: Ohad Ben-Cohen ; Rob Herring ;
> Mark Rutland ; Maxime Coquelin
> ; Alexandr
On 01/08/2019 9:14 PM, Bjorn Andersson wrote:
> On Wed 13 Mar 08:50 PDT 2019, Fabien Dessenne wrote:
>
>> The current implementation does not allow two different devices to use
>> a common hwspinlock. This patch set proposes to have, as an option, some
>> hwspinlocks shar
Hi
I Got Rob's Reviewed-by. Any further comments?
Fabien
On 25/04/2019 11:17 AM, Fabien Dessenne wrote:
> The current implementation does not allow two different devices to use
> a common hwspinlock. This patch set proposes to have, as an option, some
> hwspinlocks shared b
Hi
Gentle reminder
Fabien
On 07/03/2019 4:58 PM, Fabien Dessenne wrote:
> In its current implementation, the hwspinlock framework relies on jiffies
> to handle the timeout of the hwspin_lock_timeout_xxx() API.
> In an atomic context (or more precisely when irq are disabled) jif
with
busy-waiting udelay() calls.
Signed-off-by: Fabien Dessenne
---
Documentation/hwspinlock.txt | 39 +++
drivers/hwspinlock/hwspinlock_core.c | 43 +
include/linux/hwspinlock.h | 61 ++--
3 files chang
Document the hwspin_lock_timeout_raw(), hwspin_trylock_raw() and
hwspin_unlock_raw() API.
Signed-off-by: Fabien Dessenne
---
Documentation/hwspinlock.txt | 42 ++
1 file changed, 42 insertions(+)
diff --git a/Documentation/hwspinlock.txt b/Documentation
;in_atomic' API.
Fabien Dessenne (2):
hwspinlock: document the hwspinlock 'raw' API
hwspinlock: add the 'in_atomic' API
Documentation/hwspinlock.txt | 81
drivers/hwspinlock/hwspinlock_core.c | 43 +--
i
> Tested-by: Fabien Dessenne
Tested-by: Fabien Dessenne
> ---
> crypto/crypto_engine.c | 301
> ++--
> include/crypto/engine.h | 68 ++-
> 2 files changed, 203 insertions(+), 166 deletions(-)
>
> diff --g
(Adding my tested by)
On 10/01/18 15:25, Fabien DESSENNE wrote:
>
> On 03/01/18 21:11, Corentin Labbe wrote:
>> This patch convert the stm32-cryp driver to the new crypto engine API.
>> Signed-off-by: Corentin Labbe
Tested-by: Fabien Dessenne
>> ---
>>dri
(adding my tested by)
On 10/01/18 15:19, Fabien DESSENNE wrote:
> On 03/01/18 21:11, Corentin Labbe wrote:
>> The crypto engine could actually only enqueue hash and ablkcipher request.
>> This patch permit it to enqueue any type of crypto_async_request.
>>
>> Si
(adding my tested my)
On 10/01/18 15:24, Fabien DESSENNE wrote:
>
> On 03/01/18 21:11, Corentin Labbe wrote:
>> This patch convert the stm32-hash driver to the new crypto engine API.
>>
>> Signed-off-by: Corentin Labbe
Tested-by: Fabien Dessenne
>> ---
>>
On 03/01/18 21:11, Corentin Labbe wrote:
> This patch convert the stm32-cryp driver to the new crypto engine API.
> Signed-off-by: Corentin Labbe
> ---
> drivers/crypto/stm32/stm32-cryp.c | 21 -
> 1 file changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/c
On 03/01/18 21:11, Corentin Labbe wrote:
> This patch convert the stm32-hash driver to the new crypto engine API.
>
> Signed-off-by: Corentin Labbe
> ---
> drivers/crypto/stm32/stm32-hash.c | 18 +-
> 1 file changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/cr
On 03/01/18 21:11, Corentin Labbe wrote:
> The crypto engine could actually only enqueue hash and ablkcipher request.
> This patch permit it to enqueue any type of crypto_async_request.
>
> Signed-off-by: Corentin Labbe
> ---
> crypto/crypto_engine.c | 230
> --
Hi Corentin,
Thank you for this new version which I have testes successfully with the
stm32 hash & cryp drivers.
As a general comment on this patchset, I would say that it does not
cover all async requests: typically I need (for the pending stm32 cryp
driver uprade) to use CryptoEngine to pro
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