On 11/09/2018 05:03 PM, Guenter Roeck wrote:
On Thu, Nov 08, 2018 at 03:05:19PM -0600, Eddie James wrote:
From: Eddie James
This series adds a hwmon driver to support the OCC on POWER8 and POWER9
processors. The OCC is an embedded processor that provides realtime power and
thermal
From: Eddie James
The OCC is a device embedded on a POWER processor that collects and
aggregates sensor data from the processor and system. The OCC can
provide the raw sensor data as well as perform thermal and power
management on the system.
This driver provides a hwmon interface to the OCC
From: Eddie James
Document the bindings for I2C-based OCC hwmon device.
Signed-off-by: Eddie James
Acked-by: Rob Herring
---
.../devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings
From: Eddie James
For the P8 OCC, add the procedure to send a command to the OCC over I2C
bus. This involves writing the OCC command registers with serial
communication operations (SCOMs) interpreted by the I2C slave. For the
P9 OCC, add a procedure to use the OCC in-kernel API to send a command
From: Eddie James
The OCC is a device embedded on a POWER processor that collects and
aggregates sensor data from the processor and system. The OCC can
provide the raw sensor data as well as perform thermal and power
management on the system.
This driver provides an atomic communications
From: Eddie James
Document the hwmon interface for the OCC.
Signed-off-by: Eddie James
---
Documentation/hwmon/occ | 112
1 file changed, 112 insertions(+)
create mode 100644 Documentation/hwmon/occ
diff --git a/Documentation/hwmon/occ b
From: Eddie James
Add structures to define all sensor types and versions. Add sysfs show
and store functions for each sensor type. Add a method to construct the
"set user power cap" command and send it to the OCC. Add rate limit to
polling the OCC (in case user-space reads our hwm
From: Eddie James
This series adds a hwmon driver to support the OCC on POWER8 and POWER9
processors. The OCC is an embedded processor that provides realtime power and
thermal monitoring and management.
The series also adds a "bus" driver to handle atomic communication between t
From: Eddie James
Document the bindings for the FSI-attached POWER9 On-Chip Controller.
Signed-off-by: Eddie James
---
Documentation/devicetree/bindings/fsi/ibm,p9-occ.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9
From: Eddie James
Add method to parse the response from the OCC poll command. This only
needs to be done during probe(), since the OCC shouldn't change the
number or format of sensors while it's running. The parsed response
allows quick access to sensor data, as well as information on
From: Eddie James
Setup the sensor attributes for every OCC sensor found by the first poll
response. Register the attributes with hwmon.
Signed-off-by: Eddie James
---
drivers/hwmon/occ/common.c | 337 +
drivers/hwmon/occ/common.h | 16 +++
2 files
From: Eddie James
The OCC provides a variety of additional information about the state of
the host processor, such as throttling, error conditions, and the number
of OCCs detected in the system. This information is essential to service
processor applications such as fan control and host
From: "Edward A. James"
This series adds a hwmon driver to support the OCC on POWER8 and POWER9
processors. The OCC is an embedded processor that provides realtime power and
thermal monitoring and management.
This driver has two different platform drivers as a "base" for the
hwmon interface, as
From: "Edward A. James"
Document the bindings for I2C-based OCC hwmon device.
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/ibm,p8-occ
From: "Edward A. James"
For the P8 OCC, add the procedure to send a command to the OCC over I2C
bus. This involves writing the OCC command registers with serial
communication operations (SCOMs) interpreted by the I2C slave. For the
P9 OCC, add a procedure to use the OCC in-kernel API to send a co
From: "Edward A. James"
Detail the sysfs attributes provided by the occ-hwmon driver.
Signed-off-by: Edward A. James
---
Documentation/ABI/testing/sysfs-driver-occ-hwmon | 85
1 file changed, 85 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-o
From: "Edward A. James"
Add method to parse the response from the OCC poll command. This only
needs to be done during probe(), since the OCC shouldn't change the
number or format of sensors while it's running. The parsed response
allows quick access to sensor data, as well as information on the
n
From: "Edward A. James"
Setup the sensor attributes for every OCC sensor found by the first poll
response. Register the attributes with hwmon. Add hwmon documentation
for the driver.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ/common.c | 450 +++
From: "Edward A. James"
Create device attributes for additional OCC properties that do not
belong as hwmon sensors. These provide additional information as to the
state of the processor and system.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ/common.c | 93 +
From: "Edward A. James"
Add logic to detect a number of error scenarios on the OCC. Export any
errors through an additional non-hwmon device attribute. The error
counting and state verification are required by the OCC hardware
specification.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ
From: "Edward A. James"
Add structures to define all sensor types and versions. Add sysfs show
and store functions for each sensor type. Add a method to construct the
"set user power cap" command and send it to the OCC. Add rate limit to
polling the OCC (in case user-space reads our hwmon entries
From: "Edward A. James"
In order to aid application usage of the error, throttling, and
presence count properties, use sysfs_notify to notify users of change on
these attributes.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ/common.c | 53 --
tion/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..c88d0f5
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,75 @@
+Kernel driver occ-hwmon
+===
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Author: Eddie James
+
+Description
+---
+
+T
class = I2C_CLASS_HWMON,
+ .driver = {
+ .name = "occ-hwmon",
+ .of_match_table = p8_i2c_occ_of_match,
+ },
+ .probe = p8_i2c_occ_probe,
+};
+
+module_i2c_driver(p8_i2c_occ_driver);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("BMC
From: "Edward A. James"
Document the bindings for the FSI-based OCC hwmon device.
Signed-off-by: Edward A. James
---
.../devicetree/bindings/fsi/ibm,p9-occ-hwmon.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fsi/ibm,p9
On 08/17/2017 10:11 AM, Rob Herring wrote:
On Thu, Aug 10, 2017 at 05:19:44PM -0500, Eddie James wrote:
From: "Edward A. James"
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,power-ps.txt| 21 +
1 file changed, 21 insertions(+
On 08/14/2017 05:37 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 02:26:20PM -0500, Eddie James wrote:
On 08/14/2017 01:53 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 10:26:30AM -0500, Eddie James wrote:
From: "Edward A. James"
Signed-off-by: Edward A. James
---
Doc
On 08/14/2017 01:53 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 10:26:30AM -0500, Eddie James wrote:
From: "Edward A. James"
Signed-off-by: Edward A. James
---
Documentation/hwmon/ibm-cffps | 54 +++
1 file changed, 54 insertions(+
From: "Edward A. James"
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,cffps1.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/ibm,cffps1.txt
diff --git a/Documentation/devicetree/bindings/i2
From: "Edward A. James"
This series adds a hwmon pmbus driver for a POWER System power supply. The
core monitoring functionality is provided by pmbus.
Changes since v2:
* Renamed the driver again...
* Remove debugfs bool from pmbus_driver_info.
* Add comment for returning rc when reading STAT
/hwmon/ibm-cffps
new file mode 100644
index 000..e091ff2
--- /dev/null
+++ b/Documentation/hwmon/ibm-cffps
@@ -0,0 +1,54 @@
+Kernel driver ibm-cffps
+===
+
+Supported chips:
+ * IBM Common Form Factor power supply
+
+Author: Eddie James
+
+Description
+---
+
+T
_cffps_of_match,
+ },
+ .probe = ibm_cffps_probe,
+ .remove = pmbus_do_remove,
+ .id_table = ibm_cffps_id,
+};
+
+module_i2c_driver(ibm_cffps_driver);
+
+MODULE_AUTHOR("Eddie James");
+MODULE_DESCRIPTION("PMBus driver for IBM Common Form Factor power supplies");
+M
On 08/10/2017 08:18 PM, Guenter Roeck wrote:
On Thu, Aug 10, 2017 at 05:19:45PM -0500, Eddie James wrote:
From: "Edward A. James"
Add the driver to monitor POWER system power supplies with hwmon over
pmbus.
Signed-off-by: Edward A. James
---
drivers/hwmon/pmbus/Kconf
probe = powerps_probe,
+ .remove = pmbus_do_remove,
+ .id_table = powerps_id,
+};
+
+module_i2c_driver(powerps_driver);
+
+MODULE_AUTHOR("Eddie James");
+MODULE_DESCRIPTION("PMBus driver for POWER system power supplies");
+MODULE_LICENSE("GPL");
--
1.8.3.1
--
To unsu
From: "Edward A. James"
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,power-ps.txt| 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/ibm,power-ps.txt
diff --git a/Documentation/devicetree/bindings/
on/powerps
new file mode 100644
index 000..a4fbe92
--- /dev/null
+++ b/Documentation/hwmon/powerps
@@ -0,0 +1,54 @@
+Kernel driver powerps
+=
+
+Supported chips:
+ * POWER system power supply
+
+Author: Eddie James
+
+Description
+---
+
+This driver supports POWER sy
From: "Edward A. James"
This series adds a hwmon pmbus driver for a POWER System power supply. The
core monitoring functionality is provided by pmbus.
This series depends on the pmbus core extensions for debugfs recently submitted
to the mailing list (latest: https://lkml.org/lkml/2017/8/10/881)
From: "Edward A. James"
This series adds a hwmon driver to support the OCC on POWER8 and POWER9
processors. The OCC is an embedded processor that provides realtime power and
thermal monitoring and management.
This driver has two different platform drivers as a "base" for the
hwmon interface, as
From: "Edward A. James"
For the P8 OCC, add the procedure to send a command to the OCC over I2C
bus. This involves writing the OCC command registers with serial
communication operations (SCOMs) interpreted by the I2C slave. For the
P9 OCC, add a procedure to use the OCC in-kernel API to send a co
From: "Edward A. James"
Create device attributes for additional OCC properties that do not
belong as hwmon sensors. These provide additional information as to the
state of the processor and system.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ/common.c | 83 +
class = I2C_CLASS_HWMON,
+ .driver = {
+ .name = "occ-hwmon",
+ .of_match_table = p8_i2c_occ_of_match,
+ },
+ .probe = p8_i2c_occ_probe,
+};
+
+module_i2c_driver(p8_i2c_occ_driver);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("BMC
From: "Edward A. James"
Setup the sensor attributes for every OCC sensor found by the first poll
response. Register the attributes with hwmon. Add hwmon documentation
for the driver.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ/common.c | 432 +++
tion/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..dcae911
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,74 @@
+Kernel driver occ-hwmon
+===
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Author: Eddie James
+
+Description
+---
+
+T
From: "Edward A. James"
Detail the sysfs attributes provided by the occ-hwmon driver.
Signed-off-by: Edward A. James
---
Documentation/ABI/testing/sysfs-driver-occ-hwmon | 77
1 file changed, 77 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-o
From: "Edward A. James"
Add logic to detect a number of error scenarios on the OCC. Export any
errors through an additional non-hwmon device attribute. The error
counting and state verification are required by the OCC hardware
specification.
Signed-off-by: Edward A. James
---
drivers/hwmon/occ
From: "Edward A. James"
Document the bindings for I2C-based OCC hwmon driver.
Signed-off-by: Edward A. James
---
.../devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/ibm,p8-occ
From: "Edward A. James"
Add method to parse the response from the OCC poll command. This only
needs to be done during probe(), since the OCC shouldn't change the
number or format of sensors while it's running. The parsed response
allows quick access to sensor data, as well as information on the
n
From: "Edward A. James"
Add structures to define all sensor types and versions. Add sysfs show
and store functions for each sensor type. Add a method to construct the
"set user power cap" command and send it to the OCC. Add rate limit to
polling the OCC (in case user-space reads our hwmon entries
On 04/02/2017 06:19 AM, Guenter Roeck wrote:
On 03/14/2017 01:55 PM, Eddie James wrote:
From: "Edward A. James"
Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
Documentation
From: "Edward A. James"
This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.
The driver provides an i
that the driver does not run on these processors. Instead, the
+driver runs on a connected service processor, such as an AST2400. (see the
+BMC - Host Communications section).
+
+Author: Eddie James
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the
&hwmon->occ_info,
+ NULL);
+ if (IS_ERR(hwmon->dev)) {
+ dev_err(dev, "cannot register hwmon device %s: %ld\n",
+ hwmon->hwmon_name, PTR_ERR(
= OCC_P8_I2C_NAME,
+ .of_match_table = occ_of_match,
+ },
+ .probe = p8_occ_probe,
+ .id_table = occ_ids,
+};
+
+module_i2c_driver(p8_occ_driver);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("BMC P8 OCC hwmon driver");
+MODULE_LICENSE("
ct occ_init_data p8_init = {
+ .command_addr = 0x6000,
+ .response_addr = 0x7000,
+ .ops = &p8_ops,
+};
+
+const u32 *p8_get_sensor_hwmon_configs()
+{
+ return p8_sensor_hwmon_configs;
+}
+
+struct occ *p8_occ_init(struct device *dev, void *bus,
+ c
(client, (const char *)buf, sizeof(u32) * 3);
+ if (rc < 0)
+ return rc;
+ else if (rc != sizeof(u32) * 3)
+ return -EIO;
+
+ return 0;
+}
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("I2C OCC SCOM transport");
+MODULE_LICENSE("
that the driver does not run on these processors. Instead, the
+driver runs on a connected service processor, such as an AST2400. (see the
+BMC - Host Communications section).
+
+Author: Eddie James
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the
(client, (const char *)buf, sizeof(u32) * 3);
+ if (rc < 0)
+ return rc;
+ else if (rc != sizeof(u32) * 3)
+ return -EIO;
+
+ return 0;
+}
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("I2C OCC SCOM transport");
+MODULE_LICENSE("
= OCC_P8_I2C_NAME,
+ .of_match_table = occ_of_match,
+ },
+ .probe = p8_occ_probe,
+ .id_table = occ_ids,
+};
+
+module_i2c_driver(p8_occ_driver);
+
+MODULE_AUTHOR("Eddie James ");
+MODULE_DESCRIPTION("BMC P8 OCC hwmon driver");
+MODULE_LICENSE("
= {
+ .parse_sensor = p9_parse_sensor,
+ .alloc_sensor = p9_alloc_sensor,
+ .get_sensor = p9_get_sensor,
+};
+
+static const struct occ_init_data p9_init = {
+ .command_addr = 0xFFFBE000,
+ .response_addr = 0xFFFBF000,
+ .ops = &p9_ops,
+};
+
+const u32 *p9_get_sen
ct occ_init_data p8_init = {
+ .command_addr = 0x6000,
+ .response_addr = 0x7000,
+ .ops = &p8_ops,
+};
+
+const u32 *p8_get_sensor_hwmon_configs()
+{
+ return p8_sensor_hwmon_configs;
+}
+
+struct occ *p8_occ_init(struct device *dev, void *bus,
+ c
NULL);
+ if (IS_ERR(hwmon->dev)) {
+ dev_err(dev, "cannot register hwmon device %s: %ld\n",
+ hwmon->hwmon_name, PTR_ERR(hwmon->dev));
+ return ERR_CAST(hwmon->dev);
+ }
+
+ return hwmon;
From: "Edward A. James"
This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.
The driver provides an i
+M: Eddie James
+L: linux-hw...@vger.kernel.org
Have you subscribed to this list? Would you prefer the mail to come to
the openbmc list?
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
ONENAND FLASH DRIVER
M: Kyungmin Park
L:
On 02/09/2017 11:31 PM, Joel Stanley wrote:
On Wed, Feb 8, 2017 at 9:40 AM, wrote:
From: "Edward A. James"
Add functions to send SCOM operations over I2C bus. The BMC can
communicate with the Power8 host processor over I2C, but needs to use SCOM
operations in order to access the OCC register
+M: Eddie James
+L: linux-hw...@vger.kernel.org
Have you subscribed to this list? Would you prefer the mail to come to
the openbmc list?
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
ONENAND FLASH DRIVER
M: Kyungmin Park
L:
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