[PATCH v3] powerpc: wire up memtest

2018-09-28 Thread Christophe Leroy
Add call to early_memtest() so that kernel compiled with CONFIG_MEMTEST really perform memtest at startup when requested via 'memtest' boot parameter. Tested-by: Daniel Axtens Signed-off-by: Christophe Leroy --- v3: updated kernel parameters documentation to mention PPC v2: move

Re: [PATCH v3 2/2] mm: remove odd HAVE_PTE_SPECIAL

2018-04-11 Thread Christophe LEROY
Le 11/04/2018 à 11:03, Laurent Dufour a écrit : On 11/04/2018 10:58, Christophe LEROY wrote: Le 11/04/2018 à 10:03, Laurent Dufour a écrit : Remove the additional define HAVE_PTE_SPECIAL and rely directly on CONFIG_ARCH_HAS_PTE_SPECIAL. There is no functional change introduced by this

Re: [PATCH v3 2/2] mm: remove odd HAVE_PTE_SPECIAL

2018-04-11 Thread Christophe LEROY
Le 11/04/2018 à 10:41, Laurent Dufour a écrit : On 11/04/2018 10:33, Michal Hocko wrote: On Wed 11-04-18 10:03:36, Laurent Dufour wrote: @@ -881,7 +876,8 @@ struct page *_vm_normal_page(struct vm_area_struct *vma, unsigned long addr, if (is_zero_pfn(pfn)) return NULL;

Re: [PATCH v3 2/2] mm: remove odd HAVE_PTE_SPECIAL

2018-04-11 Thread Christophe LEROY
Le 11/04/2018 à 10:03, Laurent Dufour a écrit : Remove the additional define HAVE_PTE_SPECIAL and rely directly on CONFIG_ARCH_HAS_PTE_SPECIAL. There is no functional change introduced by this patch Signed-off-by: Laurent Dufour --- mm/memory.c | 19 --- 1 file changed, 8

Re: [PATCH v9 00/51] powerpc, mm: Memory Protection Keys

2017-11-10 Thread Christophe LEROY
Hi Le 06/11/2017 à 09:56, Ram Pai a écrit : Memory protection keys enable applications to protect its address space from inadvertent access from or corruption by itself. These patches along with the pte-bit freeing patch series enables the protection key feature on powerpc; 4k and 64k hashpage

Re: [PATCH v9 17/20] crypto: talitos: move to generic async completion

2017-10-17 Thread Christophe LEROY
Le 15/10/2017 à 11:20, Gilad Ben-Yossef a écrit : The talitos driver starts several async crypto ops and waits for their completions. Move it over to generic code doing the same. Signed-off-by: Gilad Ben-Yossef Tested-by: Christophe Leroy --- drivers/crypto/talitos.c | 38

[PATCH v8 03/23] powerpc: Update documentation for noltlbs kernel parameter

2016-02-09 Thread Christophe Leroy
Now the noltlbs kernel parameter is also applicable to PPC8xx Signed-off-by: Christophe Leroy --- v2: no change v3: no change v4: no change v5: no change v6: no change v8: no change Documentation/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a

[PATCH v8 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments

2016-02-09 Thread Christophe Leroy
) Change in v7: * No change (commit error) Change in v8: * Don't include x_block_mapped() from compilation in arch/powerpc/mm/fsl_booke_mmu.c when CONFIG_FSL_BOOKE is not set (reported by kbuild test robot) Christophe Leroy (23): powerpc/8xx: Save r3 all the time in DTLB miss handler powerp

Re: [PATCH v7 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments

2016-02-09 Thread Christophe Leroy
Le 09/02/2016 11:23, Christophe Leroy a écrit : The main purpose of this patchset is to dramatically reduce the time spent in DTLB miss handler. This is achieved by: 1/ Mapping RAM with 8M pages 2/ Mapping IMMR with a fixed 512K page Change in v7: * Don't include x_block_mapped()

[PATCH v7 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments

2016-02-09 Thread Christophe Leroy
) Change in v7: * Don't include x_block_mapped() from compilation in arch/powerpc/mm/fsl_booke_mmu.c when CONFIG_FSL_BOOKE is not set (reported by kbuild test robot) Christophe Leroy (23): powerpc/8xx: Save r3 all the time in DTLB miss handler powerpc/8xx: Map linear kernel RAM with 8M pages po

[PATCH v7 03/23] powerpc: Update documentation for noltlbs kernel parameter

2016-02-09 Thread Christophe Leroy
Now the noltlbs kernel parameter is also applicable to PPC8xx Signed-off-by: Christophe Leroy --- v2: no change v3: no change v4: no change v5: no change v6: no change v7: no change Documentation/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a

[PATCH v6 03/23] powerpc: Update documentation for noltlbs kernel parameter

2016-02-04 Thread Christophe Leroy
Now the noltlbs kernel parameter is also applicable to PPC8xx Signed-off-by: Christophe Leroy --- v2: no change v3: no change v4: no change v5: no change v6: no change Documentation/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/kernel

[PATCH v6 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments

2016-02-04 Thread Christophe Leroy
for mapping IMMR Change in v4: * Fix of a wrong #if notified by kbuild robot in 07/23 Change in v5: * Removed use of pmd_val() as L-value * Adapted to match the new include files layout in Linux 4.5 Change in v6: * Removed remaining use of pmd_val() as L-value Christophe Leroy (23): powerpc/8xx

[PATCH v5 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments

2016-02-03 Thread Christophe Leroy
for mapping IMMR Change in v4: * Fix of a wrong #if notified by kbuild robot in 07/23 Change in v5: * Removed use of pmd_val() as L-value * Adapted to match the new include files layout in Linux 4.5 Christophe Leroy (23): powerpc/8xx: Save r3 all the time in DTLB miss handler powerpc/8xx: Map

[PATCH v5 03/23] powerpc: Update documentation for noltlbs kernel parameter

2016-02-03 Thread Christophe Leroy
Now the noltlbs kernel parameter is also applicable to PPC8xx Signed-off-by: Christophe Leroy --- v2: no change v3: no change v4: no change v5: no change Documentation/kernel-parameters.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/kernel-parameters.txt