There are some typos in boot image header and riscv boot documentation.
Fix the typos.
Signed-off-by: Atish Patra
---
Documentation/riscv/boot-image-header.rst | 4 ++--
arch/riscv/include/asm/image.h| 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a
Linux
- =
+=
+Boot image header in RISC-V Linux
+=
-Author: Atish Patra
-Date : 20 May 2019
+:Author: Atish Patra
+:Date: 20 May 2019
This document only describes the boot image header details for RISC-V Linux.
-The complete booting guide will be availa
On 7/26/19 2:01 PM, Mauro Carvalho Chehab wrote:
Em Fri, 26 Jul 2019 13:18:30 -0700
Atish Patra escreveu:
On 7/26/19 1:14 PM, Mauro Carvalho Chehab wrote:
Em Fri, 26 Jul 2019 12:55:36 -0700
Atish Patra escreveu:
On 7/26/19 4:47 AM, Mauro Carvalho Chehab wrote:
Solves most of the
On 7/26/19 1:14 PM, Mauro Carvalho Chehab wrote:
Em Fri, 26 Jul 2019 12:55:36 -0700
Atish Patra escreveu:
On 7/26/19 4:47 AM, Mauro Carvalho Chehab wrote:
Solves most of the pending broken references upstream, except for two of
them:
$ ./scripts/documentation-file-ref-check
On 7/26/19 4:47 AM, Mauro Carvalho Chehab wrote:
Solves most of the pending broken references upstream, except for two of
them:
$ ./scripts/documentation-file-ref-check
Documentation/riscv/boot-image-header.txt:
Documentation/riscv/booting.txt
MAINTAINERS:
Documentation
On Thu, 2019-07-11 at 12:42 -0700, Paul Walmsley wrote:
> On Fri, 28 Jun 2019, Atish Patra wrote:
>
> > On Fri, 2019-06-28 at 12:09 -0700, Paul Walmsley wrote:
> > > On Thu, 6 Jun 2019, Atish Patra wrote:
> > >
> > > > Currently, the last stage boot
On Fri, 2019-06-28 at 12:09 -0700, Paul Walmsley wrote:
> On Thu, 6 Jun 2019, Atish Patra wrote:
>
> > Currently, the last stage boot loaders such as U-Boot can accept
> > only
> > uImage which is an unnecessary additional step in automating boot
> > process.
>
Signed-off-by: Atish Patra
Reviewed-by: Karsten Merker
Tested-by: Karsten Merker (QEMU+OpenSBI+U-Boot)
Tested-by: Kevin Hilman (OpenSBI + U-Boot + Linux)
---
I have not sent out corresponding U-Boot patch as all the changes are
compatible with current u-boot support. Once, the kernel header fo
On 6/5/19 9:26 AM, Mark Rutland wrote:
On Thu, May 23, 2019 at 11:35:16AM -0700, Atish Patra wrote:
Currently, last stage boot loaders such as U-Boot can accept only
uImage which is an unnecessary additional step in automating boot flows.
Add a PE/COFF compliant image header that boot loaders
Signed-off-by: Atish Patra
Reviewed-by: Karsten Merker
Tested-by: Karsten Merker (QEMU+OpenSBI+U-Boot)
---
I have not sent out corresponding U-Boot patch as all the changes are
compatible with current u-boot support. Once, the kernel header format
is agreed upon, I will update the U-Boot patch.
On 5/23/19 2:09 PM, Ard Biesheuvel wrote:
On Thu, 23 May 2019 at 19:35, Atish Patra wrote:
Currently, last stage boot loaders such as U-Boot can accept only
uImage which is an unnecessary additional step in automating boot flows.
Add a PE/COFF compliant image header that boot loaders can
Linux.
Signed-off-by: Atish Patra
---
I have not sent out corresponding U-Boot patch as all the changes are
compatible with current u-boot support. Once, the kernel header format
is agreed upon, I will update the U-Boot patch.
Changes from v2->v3
1. Modified reserved fields to define a header
On 4/24/18 8:19 PM, Alan Kao wrote:
Hi Atish, Palmer,
On Tue, Apr 24, 2018 at 06:15:49PM -0700, Atish Patra wrote:
On 4/24/18 5:29 PM, Palmer Dabbelt wrote:
On Tue, 24 Apr 2018 15:16:16 PDT (-0700), atish.pa...@wdc.com wrote:
On 4/24/18 12:44 PM, Palmer Dabbelt wrote:
On Tue, 24 Apr 2018 12
On 4/24/18 5:29 PM, Palmer Dabbelt wrote:
On Tue, 24 Apr 2018 15:16:16 PDT (-0700), atish.pa...@wdc.com wrote:
On 4/24/18 12:44 PM, Palmer Dabbelt wrote:
On Tue, 24 Apr 2018 12:27:26 PDT (-0700), atish.pa...@wdc.com wrote:
On 4/24/18 11:07 AM, Atish Patra wrote:
On 4/19/18 4:28 PM, Alan Kao
On 4/24/18 12:44 PM, Palmer Dabbelt wrote:
On Tue, 24 Apr 2018 12:27:26 PDT (-0700), atish.pa...@wdc.com wrote:
On 4/24/18 11:07 AM, Atish Patra wrote:
On 4/19/18 4:28 PM, Alan Kao wrote:
This implements the baseline PMU for RISC-V platforms.
To ease future PMU portings, a guide is also
On 4/24/18 11:07 AM, Atish Patra wrote:
On 4/19/18 4:28 PM, Alan Kao wrote:
This implements the baseline PMU for RISC-V platforms.
To ease future PMU portings, a guide is also written, containing
perf concepts, arch porting practices and some hints.
Changes in v5:
- Fix patch errors from
On 4/19/18 4:28 PM, Alan Kao wrote:
This implements the baseline PMU for RISC-V platforms.
To ease future PMU portings, a guide is also written, containing
perf concepts, arch porting practices and some hints.
Changes in v5:
- Fix patch errors from checkpatch.pl.
Changes in v4:
- Fix sever
On 4/17/18 7:13 PM, Alan Kao wrote:
This patch provide a basic PMU, riscv_base_pmu, which supports two
general hardware event, instructions and cycles. Furthermore, this
PMU serves as a reference implementation to ease the portings in
the future.
riscv_base_pmu should be able to run on any RISC
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