On 08.11.23 18:20, Sean Christopherson wrote:
On Wed, Nov 08, 2023, Nicolas Saenz Julienne wrote:
Save the length of the instruction that triggered an EPT violation in
struct kvm_vcpu_arch. This will be used to populate Hyper-V VSM memory
intercept messages.
This is silly and unnecessarily obf
On 08.11.23 17:15, Sean Christopherson wrote:
On Wed, Nov 08, 2023, Alexander Graf wrote:
On 08.11.23 12:18, Nicolas Saenz Julienne wrote:
Save the length of the instruction that triggered an EPT violation in
struct kvm_vcpu_arch. This will be used to populate Hyper-V VSM memory
intercept
On 08.11.23 12:18, Nicolas Saenz Julienne wrote:
Introduce HVCALL_TRANSLATE_VIRTUAL_ADDRESS, the hypercall receives a
GVA, generally from a less privileged VTL, and returns the GPA backing
it. The GVA -> GPA conversion is done by walking the target VTL's vCPU
MMU.
NOTE: The hypercall implementa
On 08.11.23 12:18, Nicolas Saenz Julienne wrote:
Introduce a new request type, KVM_REQ_HV_INJECT_INTERCEPT which allows
injecting out-of-band Hyper-V secure intercepts. For now only memory
access intercepts are supported. These are triggered when access a GPA
protected by a higher VTL. The memor
On 08.11.23 12:18, Nicolas Saenz Julienne wrote:
Save the length of the instruction that triggered an EPT violation in
struct kvm_vcpu_arch. This will be used to populate Hyper-V VSM memory
intercept messages.
Signed-off-by: Nicolas Saenz Julienne
In v1, please do this for SVM as well :)
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
Introduce the following memory attributes:
- KVM_MEMORY_ATTRIBUTE_READ
- KVM_MEMORY_ATTRIBUTE_WRITE
- KVM_MEMORY_ATTRIBUTE_EXECUTE
- KVM_MEMORY_ATTRIBUTE_NO_ACCESS
Note that NO_ACCESS is necessary in order to make a distinction between
th
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
Introduce two helper functions. The first one queries a vCPU's VTL
level, the second one, given a struct kvm_vcpu and VTL pair, returns the
corresponding 'sibling' struct kvm_vcpu at the right VTL.
We keep track of each VTL's state by having a di
On 08.11.23 13:11, Vitaly Kuznetsov wrote:
Alexander Graf writes:
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
Prepare infrastructure to be able to return data through the XMM
registers when Hyper-V hypercalls are issues in fast mode. The XMM
registers are exposed to user-space through
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
Let user-space handle HVCALL_GET_VP_REGISTERS and
HVCALL_SET_VP_REGISTERS through the KVM_EXIT_HYPERV_HVCALL exit reason.
Additionally, expose the cpuid bit.
Signed-off-by: Nicolas Saenz Julienne
---
arch/x86/kvm/hyperv.c | 9 +
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
From: Anel Orazgaliyeva
Introduce KVM_CAP_APIC_ID_GROUPS, this capability segments the VM's APIC
ids into two. The lower bits, the physical APIC id, represent the part
that's exposed to the guest. The higher bits, which are private to KVM,
group
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
VTL call/return hypercalls have their own entry points in the hypercall
page because they don't follow normal hyper-v hypercall conventions.
Move the VTL call/return control input into ECX/RAX and set the
hypercall code into EAX/RCX before calling
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
Prepare infrastructure to be able to return data through the XMM
registers when Hyper-V hypercalls are issues in fast mode. The XMM
registers are exposed to user-space through KVM_EXIT_HYPERV_HCALL and
restored on successful hypercall completion.
Hey Nicolas,
On 08.11.23 12:17, Nicolas Saenz Julienne wrote:
Hyper-V's Virtual Secure Mode (VSM) is a virtualisation security feature
that leverages the hypervisor to create secure execution environments
within a guest. VSM is documented as part of Microsoft's Hypervisor Top
Level Functional Sp
On 01/29/2019 02:41 PM, Ard Biesheuvel wrote:
Hi Alex,
On Tue, 29 Jan 2019 at 14:37, Alexander Graf wrote:
On 01/29/2019 10:21 AM, Ard Biesheuvel wrote:
Move the x86 EFI earlyprintk implementation to a shared location under
drivers/firmware and tweak it slightly so we can expose it as an
On 01/29/2019 10:21 AM, Ard Biesheuvel wrote:
Move the x86 EFI earlyprintk implementation to a shared location under
drivers/firmware and tweak it slightly so we can expose it as an earlycon
implementation (which is generic) rather than earlyprintk (which is only
implemented for a few architectur
> Am 15.11.2018 um 16:47 schrieb Will Deacon :
>
>> On Tue, Nov 13, 2018 at 04:29:06PM +0100, Alexander Graf wrote:
>> I've already stumbled over 2 cases where people got confused about how to
>> disable kpti on AArch64. In both cases, they used existing x86_64 opt
On 15.11.18 10:41, Christoph Hellwig wrote:
> On Tue, Nov 13, 2018 at 04:20:46PM +0100, Alexander Graf wrote:
>> I've already stumbled over 2 cases where people got confused about how to
>> disable kpti on AArch64. In both cases, they used existing x86_64 options
>> a
ctive options as dual-arch.
Reported-by: Richard Brown
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Actually make it compile. Sorry for the sloppy v1.
---
Documentation/admin-guide/kernel-parameters.txt | 6 +++---
arch/arm64/kernel/cpufeature.c | 20 +++
ctive options as dual-arch.
Reported-by: Richard Brown
Signed-off-by: Alexander Graf
---
Documentation/admin-guide/kernel-parameters.txt | 6 +++---
arch/arm64/kernel/cpufeature.c | 15 ++-
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/Document
On 08/29/2017 01:46 PM, Yang Zhang wrote:
Some latency-intensive workload will see obviously performance
drop when running inside VM. The main reason is that the overhead
is amplified when running inside VM. The most cost i have seen is
inside idle path.
This patch introduces a new mechanism to
On 17.07.17 11:26, Yang Zhang wrote:
On 2017/7/14 17:37, Alexander Graf wrote:
On 13.07.17 13:49, Yang Zhang wrote:
On 2017/7/4 22:13, Radim Krčmář wrote:
2017-07-03 17:28+0800, Yang Zhang:
The background is that we(Alibaba Cloud) do get more and more
complaints
from our customers in
On 13.07.17 13:49, Yang Zhang wrote:
On 2017/7/4 22:13, Radim Krčmář wrote:
2017-07-03 17:28+0800, Yang Zhang:
The background is that we(Alibaba Cloud) do get more and more complaints
from our customers in both KVM and Xen compare to bare-mental.After
investigations, the root cause is known t
On 21.04.17 12:02, Paolo Bonzini wrote:
On 12/04/2017 18:29, Michael S. Tsirkin wrote:
I don't really agree we do not need the PV flag. mwait on kvm is
different from mwait on bare metal in that you are heavily penalized by
scheduler for polling unless you configure the host just so.
HLT let
On 12.04.17 16:34, Jim Mattson wrote:
Actually, we have rejected commit 87c00572ba05aa8c ("kvm: x86: emulate
monitor and mwait instructions as nop"), so when we intercept
MONITOR/MWAIT, we synthesize #UD. Perhaps it is this difference from
vanilla kvm that motivates the following idea...
So y
> Am 11.04.2017 um 19:10 schrieb Jim Mattson :
>
> This might be more useful if it could be dynamically toggled on and
> off, depending on system load.
What would trapping mwait (currently) buy you?
As it stands today, before this patch, mwait is simply implemented as a nop, so
enabling the t
On 04/11/2017 02:41 PM, Gabriel L. Somlo wrote:
On Tue, Apr 11, 2017 at 01:45:35PM +0200, Alexander Graf wrote:
From: "Michael S. Tsirkin"
Guests that are heavy on futexes end up IPI'ing each other a lot. That
can lead to significant slowdowns and latency increase for th
raf: fix amd, change commit message]
Signed-off-by: Alexander Graf
---
v5 -> v6:
- Fix AMD check, so that we're consistent between svm and vmx
- Clarify commit message
---
Documentation/virtual/kvm/api.txt| 9 +
Documentation/virtual/kvm/cpuid.txt | 6 ++
arch/x8
On 04/04/2017 03:13 PM, Radim Krčmář wrote:
2017-04-04 14:51+0200, Alexander Graf:
On 04/04/2017 02:39 PM, Radim Krčmář wrote:
2017-04-03 12:04+0200, Alexander Graf:
So coming back to the original patch, is there anything that should keep us
from exposing MWAIT straight into the guest at all
On 04/04/2017 02:39 PM, Radim Krčmář wrote:
2017-04-03 12:04+0200, Alexander Graf:
On 03/29/2017 02:11 PM, Radim Krčmář wrote:
2017-03-28 13:35-0700, Jim Mattson:
On Tue, Mar 28, 2017 at 7:28 AM, Radim Krčmář wrote:
2017-03-27 15:34+0200, Alexander Graf:
On 15/03/2017 22:22, Michael S
On 03/29/2017 02:11 PM, Radim Krčmář wrote:
2017-03-28 13:35-0700, Jim Mattson:
On Tue, Mar 28, 2017 at 7:28 AM, Radim Krčmář wrote:
2017-03-27 15:34+0200, Alexander Graf:
On 15/03/2017 22:22, Michael S. Tsirkin wrote:
Guests running Mac OS 5, 6, and 7 (Leopard through Lion) have a problem
On 15/03/2017 22:22, Michael S. Tsirkin wrote:
Guests running Mac OS 5, 6, and 7 (Leopard through Lion) have a problem:
unless explicitly provided with kernel command line argument
"idlehalt=0" they'd implicitly assume MONITOR and MWAIT availability,
without checking CPUID.
We currently emulat
> On 17 Aug 2016, at 13:46, Yury Norov wrote:
>
> This series enables aarch64 with ilp32 mode, and as supporting work,
> introduces ARCH_32BIT_OFF_T configuration option that is enabled for
> existing 32-bit architectures but disabled for new arches (so 64-bit
> off_t is is used by new userspace
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