[PATCH RESEND v2 0/2] mm/damon: add a tracepoint for damos apply target regions

2023-09-12 Thread SeongJae Park
Changlog >From original v2 post (https://lore.kernel.org/damon/20230912183559.4733-1...@kernel.org/) - Fix header - Rebase on latest mm-unstable >From v1 (https://lore.kernel.org/damon/20230911045908.97649-1...@kernel.org/) - Get scheme/target indices only when the trace is enabled (Stev

Re: (no title)

2023-09-12 Thread SeongJae Park
Hello, On Tue, 12 Sep 2023 18:35:57 + SeongJae Park wrote: > Date: Tue, 12 Sep 2023 02:24:11 + > Subject: [PATCH v2 0/2] mm/damon: add a tracepoint for damos apply target > regions I added a blank line in the header of the original patch, and it resulted in this weird no-title mail, so

Re: [PATCH V11 01/17] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock

2023-09-12 Thread Guo Ren
On Tue, Sep 12, 2023 at 3:05 AM Leonardo Brás wrote: > > On Sun, 2023-09-10 at 04:28 -0400, guo...@kernel.org wrote: > > From: Guo Ren > > > > The arch_spinlock_t of qspinlock has contained the atomic_t val, which > > satisfies the ticket-lock requirement. Thus, unify the arch_spinlock_t > > into

[no subject]

2023-09-12 Thread SeongJae Park
Date: Tue, 12 Sep 2023 02:24:11 + Subject: [PATCH v2 0/2] mm/damon: add a tracepoint for damos apply target regions Changlog >From v1 (https://lore.kernel.org/damon/20230911045908.97649-1...@kernel.org/) - Get scheme/target indices only when the trace is enabled (Steven Rostedt) >F

Re: [PATCH V11 00/17] riscv: Add Native/Paravirt qspinlock support

2023-09-12 Thread Guo Ren
On Tue, Sep 12, 2023 at 4:08 PM Conor Dooley wrote: > > On Tue, Sep 12, 2023 at 09:33:57AM +0800, Guo Ren wrote: > > On Mon, Sep 11, 2023 at 8:53 PM Conor Dooley > > wrote: > > > > I added the new "riscv,isa-extensions" property in part to make > > > communicating vendor extensions like this eas

Re: [REBASE PATCH v5 08/17] arm64: mm: Add dynamic ramoops region support through command line

2023-09-12 Thread Will Deacon
On Mon, Sep 11, 2023 at 04:23:50PM +0530, Mukesh Ojha wrote: > The reserved memory region for ramoops is assumed to be at a fixed > and known location when read from the devicetree. This may not be > required for something like Qualcomm's minidump which is interested > in knowing addresses of ramoo

Re: [PATCH v5 06/17] soc: qcom: Add Qualcomm APSS minidump kernel driver

2023-09-12 Thread Mukesh Ojha
On 9/12/2023 2:56 PM, Mukesh Ojha wrote: Thanks for your time in reviewing this. On 9/11/2023 4:31 PM, Krzysztof Kozlowski wrote: On 09/09/2023 22:16, Mukesh Ojha wrote: Minidump is a best effort mechanism to collect useful and predefined data for first level of debugging on end user device

Re: [PATCH v5 06/17] soc: qcom: Add Qualcomm APSS minidump kernel driver

2023-09-12 Thread Krzysztof Kozlowski
On 12/09/2023 11:26, Mukesh Ojha wrote: >> >>> + return -EINVAL; >>> + } >>> + >>> + mutex_init(&md->md_lock); >>> + ret = qcom_apss_md_table_init(md, >>> &mdgtoc->subsystems[MINIDUMP_APSS_DESC]); >>> + if (ret) { >>> + dev_err(md->dev, "apss minidump initialization fai

Re: [PATCH v5 09/17] pstore/ram: Use dynamic ramoops reserve resource

2023-09-12 Thread Mukesh Ojha
On 9/12/2023 6:09 AM, Pavan Kondeti wrote: On Mon, Sep 11, 2023 at 04:21:44PM +0530, Mukesh Ojha wrote: On 9/11/2023 11:03 AM, Pavan Kondeti wrote: On Sun, Sep 10, 2023 at 01:46:10AM +0530, Mukesh Ojha wrote: As dynamic ramoops command line parsing is now added, so lets add the support in

Re: [PATCH v5 06/17] soc: qcom: Add Qualcomm APSS minidump kernel driver

2023-09-12 Thread Mukesh Ojha
Thanks for your time in reviewing this. On 9/11/2023 4:31 PM, Krzysztof Kozlowski wrote: On 09/09/2023 22:16, Mukesh Ojha wrote: Minidump is a best effort mechanism to collect useful and predefined data for first level of debugging on end user devices running on Qualcomm SoCs. It is built on th

Re: [REBASE PATCH v5 15/17] firmware: scm: Modify only the download bits in TCSR register

2023-09-12 Thread Mukesh Ojha
On 9/11/2023 8:37 PM, Kathiravan Thirumoorthy wrote: On 9/11/2023 4:23 PM, Mukesh Ojha wrote: Crashdump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance. Co-developed

Re: [REBASE PATCH v5 14/17] pinctrl: qcom: Use qcom_scm_io_update_field()

2023-09-12 Thread Linus Walleij
On Mon, Sep 11, 2023 at 12:56 PM Mukesh Ojha wrote: > Use qcom_scm_io_update_field() exported function in > pinctrl-msm driver. > > Signed-off-by: Mukesh Ojha As long as the qcom maintainers agree on the rest of the patches: Acked-by: Linus Walleij Yours, Linus Walleij

Re: [PATCH V11 00/17] riscv: Add Native/Paravirt qspinlock support

2023-09-12 Thread Conor Dooley
On Tue, Sep 12, 2023 at 09:33:57AM +0800, Guo Ren wrote: > On Mon, Sep 11, 2023 at 8:53 PM Conor Dooley > wrote: > > I added the new "riscv,isa-extensions" property in part to make > > communicating vendor extensions like this easier. Please try to use > > that. "qspinlock" is software configura