[PATCH v5 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory Controller(DMC) and Level 3 Cache(L3C). ThunderX2 has 8 independent DMC PMUs to capture performance events corresponding to 8 channels of DDR4 Memory Controller and 16 independent L3C PMUs to capture events corresponding to 16 ti

[PATCH v5 0/2] Add ThunderX2 SoC Performance Monitoring Unit driver

This patchset adds PMU driver for Cavium's ThunderX2 SoC UNCORE devices. The SoC has PMU support in L3 cache controller (L3C) and in the DDR4 Memory Controller (DMC). v5: -Incroporated review comments from Mark Rutland[2] v4: -Incroporated review comments from Mark Rutland[1] [1] https:

[PATCH v5 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC. The SoC has PMU support in its L3 cache controller (L3C) and in the DDR4 Memory Controller (DMC). Signed-off-by: Ganapatrao Kulkarni --- Documentation/perf/thunderx2-pmu.txt | 66 1 file changed, 66

Re: [PATCH v9 00/24] ILP32 for ARM64

Hi all, On Tue, May 15, 2018 at 10:11:50PM +0300, Yury Norov wrote: > This series enables AARCH64 with ILP32 mode. > > As supporting work, it introduces ARCH_32BIT_OFF_T configuration > option that is enabled for existing 32-bit architectures but disabled > for new arches (so 64-bit off_t userspa

[PATCH 01/24] arm64: signal: Make parse_user_sigframe() independent of rt_sigframe layout

From: Dave Martin ILP32 uses the same struct sigcontext as the native ABI (i.e., LP64), but a different layout for the rest of the signal frame (since siginfo_t and ucontext_t are both ABI-dependent). Since the purpose of parse_user_sigframe() is really to parse sigcontext and not the whole sign

[PATCH 02/24] ptrace: Add compat PTRACE_{G,S}ETSIGMASK handlers

From: James Morse compat_ptrace_request() lacks handlers for PTRACE_{G,S}ETSIGMASK, instead using those in ptrace_request(). The compat variant should read a compat_sigset_t from userspace instead of ptrace_request()s sigset_t. While compat_sigset_t is the same size as sigset_t, it is defined as

[PATCH v9 00/24] ILP32 for ARM64

This series enables AARCH64 with ILP32 mode. As supporting work, it introduces ARCH_32BIT_OFF_T configuration option that is enabled for existing 32-bit architectures but disabled for new arches (so 64-bit off_t userspace type is used by new userspace). Also it deprecates getrlimit and setrlimit s

Re: [PATCH v3] coresight: documentation: update sysfs section

On 14 May 2018 at 13:18, Kim Phillips wrote: > - Align and show updated ls devices output from the TC2, based on > current driver > > - Provide an example from an ETMv4 based system (Juno) > > - Reflect changes to the way the RAM write pointer is accessed since > it got changed in commit 7d83d

Re: [PATCH v2 11/11] docs: fix broken references with multiple hints

On Wed, 9 May 2018 10:18:54 -0300 Mauro Carvalho Chehab wrote: > diff --git a/Documentation/trace/events.rst b/Documentation/trace/events.rst > index 7b6b1236ec2e..c292117b83a9 100644 > --- a/Documentation/trace/events.rst > +++ b/Documentation/trace/events.rst > @@ -8,7 +8,7 @@ Event Tracing >

[PATCH v12 1/4] arm64: KVM: export the capability to set guest SError syndrome

For the arm64 RAS Extension, user space can inject a virtual-SError with specified ESR. So user space needs to know whether KVM support to inject such SError, this interface adds this query for this capability. KVM will check whether system support RAS Extension, if supported, KVM returns true to

[PATCH v12 4/4] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/traps.c| 4 arch/ar

[PATCH v12 2/4] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

For the migrating VMs, user space may need to know the exception state. For example, in the machine A, KVM make an SError pending, when migrate to B, KVM also needs to pend an SError. This new IOCTL exports user-invisible states related to SError. Together with appropriate user space changes, user

[PATCH v12 0/4] set VSESR_EL2 by user space and support NOTIFY_SEI notification

1. Detect whether KVM can set set guest SError syndrome 2. Support to Set VSESR_EL2 and inject SError by user space. 3. Support live migration to keep SError pending state and VSESR_EL2 value. 4. ACPI 6.1 adds support for NOTIFY_SEI as a GHES notification mechanism, so support this notification

[PATCH v12 3/4] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng Note: Firmware will follow the SError mask rul

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Mark, On Sat, May 5, 2018 at 12:16 AM, Ganapatrao Kulkarni wrote: > Hi Mark, > > On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland wrote: >> Hi, >> >> On Wed, Apr 25, 2018 at 02:30:47PM +0530, Ganapatrao Kulkarni wrote: >>> + >>> +/* L3c and DMC has 16 and 8 channels per socket respectively. >>>

Re: [PATCH v2 11/11] docs: fix broken references with multiple hints

On Wednesday, May 09, 2018 10:18:54 AM Mauro Carvalho Chehab wrote: > The script: > ./scripts/documentation-file-ref-check --fix-rst > > Gives multiple hints for broken references on some files. > Manually use the one that applies for some files. > > Signed-off-by: Mauro Carvalho Chehab A

Re: [PATCH 14/18] fbdev: modedb.c: fix a kernel-doc markup

On Monday, May 07, 2018 06:35:50 AM Mauro Carvalho Chehab wrote: > Use code blocks to avoid those warnings and make it look nicer. > > ./drivers/video/fbdev/core/modedb.c:647: WARNING: Inline strong > start-string without end-string. > ./drivers/video/fbdev/core/modedb.c:647: WARNING: