Reviewed-by: Alex Solomatnikov
Cc: Nick Hu
Cc: Greentime Hu
Signed-off-by: Alan Kao
---
Documentation/riscv/pmu.txt | 249
1 file changed, 249 insertions(+)
create mode 100644 Documentation/riscv/pmu.txt
diff --git a/Documentation/riscv/pmu.txt b/Document
This patch provide a basic PMU, riscv_base_pmu, which supports two
general hardware event, instructions and cycles. Furthermore, this
PMU serves as a reference implementation to ease the portings in
the future.
riscv_base_pmu should be able to run on any RISC-V machine that
conforms to the Priv-S
This implements the baseline PMU for RISC-V platforms.
To ease future PMU portings, a guide is also written, containing
perf concepts, arch porting practices and some hints.
Changes in v4:
- Fix several compilation errors. Sorry for that.
- Raise a warning in the write_counter body.
Changes i
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
Documentation/accelerators/ocxl.rst | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/accelerators/ocxl.rst
b/Documentation/accelerators/ocxl.rst
index 7904adcc07fd..3b8d3b99795c 100644
--- a/Documentation/
From: Alastair D'Silva
In order for a userspace AFU driver to call the Power9 specific
OCXL_IOCTL_ENABLE_P9_WAIT, it needs to verify that it can actually
make that call.
Signed-off-by: Alastair D'Silva
---
Documentation/accelerators/ocxl.rst | 1 -
drivers/misc/ocxl/file.c| 25 +++
From: Alastair D'Silva
This patch adds a CPU feature bit to show whether the CPU has
the TIDR register available, enabling as_notify/wait in userspace.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
2 files changed, 3
From: Alastair D'Silva
In order to successfully issue as_notify, an AFU needs to know the TID
to notify, which in turn means that this information should be
available in userspace so it can be communicated to the AFU.
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/context.c | 5 +
From: Alastair D'Silva
Switch the use of TIDR on it's CPU feature, rather than assuming it
is available based on architecture.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/kernel/process.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/process
From: Alastair D'Silva
The function removes the process element from NPU cache.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/pnv-ocxl.h | 2 +-
arch/powerpc/platforms/powernv/ocxl.c | 4 ++--
drivers/misc/ocxl/link.c | 2 +-
3 files changed, 4 insertions(+), 4 de
From: Alastair D'Silva
The Power 9 as_notify/wait feature provides a lower latency way to
signal a thread that work is complete. This series enables the use of
this feature from OpenCAPI adapters, as well as addressing a potential
starvation issue when allocating thread IDs.
Changelog:
v2:
Ren
From: Alastair D'Silva
The current implementation of TID allocation, using a global IDR, may
result in an errant process starving the system of available TIDs.
Instead, use task_pid_nr(), as mentioned by the original author. The
scenario described which prevented it's use is not applicable, as
se
On Tue, Apr 17, 2018 at 03:34:32PM +0100, Quentin Monnet wrote:
> Add documentation for eBPF helper functions to bpf.h user header file.
> This documentation can be parsed with the Python script provided in
> another commit of the patch series, in order to provide a RST document
> that can later be
On 4/17/2018 11:16 AM, Jae Hyun Yoo wrote:
On 4/17/2018 6:16 AM, Rob Herring wrote:
On Mon, Apr 16, 2018 at 6:12 PM, Jae Hyun Yoo
wrote:
On 4/16/2018 11:10 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:06AM -0700, Jae Hyun Yoo wrote:
This commit adds a dt-bindings document of PECI a
On 4/16/2018 4:51 PM, Jae Hyun Yoo wrote:
On 4/16/2018 4:22 PM, Jae Hyun Yoo wrote:
On 4/16/2018 11:14 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:09AM -0700, Jae Hyun Yoo wrote:
This commit adds dt-bindings documents for PECI cputemp and dimmtemp
client
drivers.
[...]
+Example
On Tue, Apr 17, 2018 at 1:38 AM, Alan Kao wrote:
> +static inline void write_counter(int idx, u64 value)
> +{
> + /* currently not supported */
> +}
CSR writes can be emulated: https://github.com/riscv/riscv-pk/pull/98
Or at least write_counter() should have BUG() or WARN_ONCE() or
someth
This does not compile:
/freedom-u-sdk/linux/arch/riscv/kernel/perf_event.c: In function
'riscv_pmu_stop':
/freedom-u-sdk/linux/arch/riscv/kernel/perf_event.c:258:12: error:
'const struct riscv_pmu' has no member named 'read'
riscv_pmu->read(event);
^~
/freedom-u-sdk/linux/arch/riscv
On Fri, Apr 13, 2018 at 11:27 PM, Wolfram Sang wrote:
>
>> (also, did I send the v3 patch series threaded correctly?)
>
> Yes, that worked. Thanks!
>
> Things to improve there: I was both in To: and CC: field, so I got mails
> twice. Jean was missing completely.
Ah, thanks. I had been using scri
Hi Robin,
On 4/17/2018 6:37 AM, Robin Murphy wrote:
Just a drive-by nit:
On 10/04/18 19:32, Jae Hyun Yoo wrote:
[...]
+#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16)
+#define PECI_CTRL_SAMPLING(x) (((x) << 16) &
PECI_CTRL_SAMPLING_MASK)
+#define PECI_CTRL_SAMPLING_GET(x) (((x) &
On 4/17/2018 6:16 AM, Rob Herring wrote:
On Mon, Apr 16, 2018 at 6:12 PM, Jae Hyun Yoo
wrote:
On 4/16/2018 11:10 AM, Rob Herring wrote:
On Tue, Apr 10, 2018 at 11:32:06AM -0700, Jae Hyun Yoo wrote:
This commit adds a dt-bindings document of PECI adapter driver for Aspeed
AST24xx/25xx SoCs.
Quentin Monnet [Tue, 2018-04-17 07:36 -0700]:
> Add documentation for eBPF helper functions to bpf.h user header file.
> This documentation can be parsed with the Python script provided in
> another commit of the patch series, in order to provide a RST document
> that can later be converted into a
On 4/17/18 7:34 AM, Quentin Monnet wrote:
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page
Hi Kishon,
On 17/04/2018 11:33, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Tuesday 10 April 2018 10:44 PM, Gustavo Pimentel wrote:
>> Adds the MSI-X support and updates driver documentation accordingly.
>>
>> Changes the driver parameter in order to allow the interruption type
>> selection.
>>
>>
On 04/17/18 09:08, Mathieu Poirier wrote:
> Adding a section that document how to use the Coresight framework and
> drivers from the perf tools.
>
> Signed-off-by: Mathieu Poirier
Acked-by: Randy Dunlap
Thanks.
> ---
> Documentation/trace/coresight.txt | 52
> +++
Adding a section that document how to use the Coresight framework and
drivers from the perf tools.
Signed-off-by: Mathieu Poirier
---
Documentation/trace/coresight.txt | 52 ++-
1 file changed, 51 insertions(+), 1 deletion(-)
diff --git a/Documentation/trace/
This patch groups together section pertaining to the perf tools. That way
everything is at the same place rather than spread out.
Signed-off-by: Mathieu Poirier
---
Documentation/trace/coresight.txt | 72 +++
1 file changed, 36 insertions(+), 36 deletions(-)
Field "owner" of struct coresight_desc has been removed a while back but
the documentation was not updated to reflect the changes.
Signed-off-by: Mathieu Poirier
---
Documentation/trace/coresight.txt | 3 ---
1 file changed, 3 deletions(-)
diff --git a/Documentation/trace/coresight.txt
b/Docum
Now that the perf tools CoreSight support is upstream this set adds
documentation to go with it and move things around so that topics
are located together.
Changes for V2:
* Addressed grammatical problems highlighted by Randy
Mathieu Poirier (3):
coresight: Remove obsolete reference t
Hi Kishon,
On 17/04/2018 11:24, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Tuesday 10 April 2018 10:44 PM, Gustavo Pimentel wrote:
>> Implements the generic method for calling the get/set callbacks.
>>
>> Adds the PCI_EPC_IRQ_MSIX type.
>>
>> Adds the MSI-X callbacks signatures to the ops structu
On 16 April 2018 at 13:48, Randy Dunlap wrote:
> On 04/16/2018 12:35 PM, Mathieu Poirier wrote:
>> Adding a section that document how to use the Coresight framework and
>> drivers from the perf tools.
>>
>> Signed-off-by: Mathieu Poirier
>> ---
>> Documentation/trace/coresight.txt | 50
>> +
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page.
The objective is to make the documentation
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page.
The objective is to make the documentation
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page.
The objective is to make the documentation
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page.
The objective is to make the documentation
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page.
The objective is to make the documentation
Remove previous "overview" of eBPF helpers from user bpf.h header.
Replace it by a comment explaining how to process the new documentation
(to come in following patches) with a Python script to produce RST, then
man page documentation.
Also add the aforementioned Python script under scripts/. It i
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page.
The objective is to make the documentation
Add documentation for eBPF helper functions to bpf.h user header file.
This documentation can be parsed with the Python script provided in
another commit of the patch series, in order to provide a RST document
that can later be converted into a man page.
The objective is to make the documentation
eBPF helper functions can be called from within eBPF programs to perform
a variety of tasks that would be otherwise hard or impossible to do with
eBPF itself. There is a growing number of such helper functions in the
kernel, but documentation is scarce. The main user space header file
does contain
Just a drive-by nit:
On 10/04/18 19:32, Jae Hyun Yoo wrote:
[...]
+#define PECI_CTRL_SAMPLING_MASK GENMASK(19, 16)
+#define PECI_CTRL_SAMPLING(x) (((x) << 16) & PECI_CTRL_SAMPLING_MASK)
+#define PECI_CTRL_SAMPLING_GET(x) (((x) & PECI_CTRL_SAMPLING_MASK) >> 16)
FWIW, already provid
On Mon, Apr 16, 2018 at 6:12 PM, Jae Hyun Yoo
wrote:
> On 4/16/2018 11:10 AM, Rob Herring wrote:
>>
>> On Tue, Apr 10, 2018 at 11:32:06AM -0700, Jae Hyun Yoo wrote:
>>>
>>> This commit adds a dt-bindings document of PECI adapter driver for Aspeed
>>> AST24xx/25xx SoCs.
[...]
>>> +- clocks
Hi,
On Tuesday 10 April 2018 10:44 PM, Gustavo Pimentel wrote:
> Adds the MSI-X support and updates driver documentation accordingly.
>
> Changes the driver parameter in order to allow the interruption type
> selection.
>
> Signed-off-by: Gustavo Pimentel
> ---
> Documentation/misc-devices/pci
Hi,
On Tuesday 10 April 2018 10:44 PM, Gustavo Pimentel wrote:
> Implements the generic method for calling the get/set callbacks.
>
> Adds the PCI_EPC_IRQ_MSIX type.
>
> Adds the MSI-X callbacks signatures to the ops structure.
>
> Adds sysfs interface for altering the number of MSI-X entries.
Add a description that the kernel headers should be used as far as it is
possible and then the system headers.
Signed-off-by: Anders Roxell
---
Documentation/dev-tools/kselftest.rst | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/dev-tools/kselftest.rst
b/Documentation/dev-
Reviewed-by: Alex Solomatnikov
Cc: Nick Hu
Cc: Greentime Hu
Signed-off-by: Alan Kao
---
Documentation/riscv/pmu.txt | 249
1 file changed, 249 insertions(+)
create mode 100644 Documentation/riscv/pmu.txt
diff --git a/Documentation/riscv/pmu.txt b/Document
This implements the baseline PMU for RISC-V platforms.
To ease future PMU portings, a guide is also written, containing
perf concepts, arch porting practices and some hints.
Changes in v3:
- Fix typos in the document.
- Change the initialization routine from statically assigning PMU to
devic
This patch provide a basic PMU, riscv_base_pmu, which supports two
general hardware event, instructions and cycles. Furthermore, this
PMU serves as a reference implementation to ease the portings in
the future.
riscv_base_pmu should be able to run on any RISC-V machine that
conforms to the Priv-S
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