From: Khalid Aziz
Date: Wed, 9 Aug 2017 15:26:02 -0600
> +void adi_restore_tags(struct mm_struct *mm, struct vm_area_struct *vma,
> + unsigned long addr, pte_t pte)
> +{
...
> + tag = tag_start(addr, tag_desc);
> + paddr = pte_val(pte) & _PAGE_PADDR_4V;
> + for (tm
On Thu, Jun 22, 2017 at 11:22:13AM +, root wrote:
> From: Yang Zhang
>
> This patch introduce a new mechanism to poll for a while before
> entering idle state.
>
> David has a topic in KVM forum to describe the problem on current KVM VM
> when running some message passing workload in KVM for
On 2017/8/16 1:27, Waiman Long wrote:
> Cpuset v2 has some valuable attributes that are not present in
> v1 because of backward compatibility concern. One of that is the
> restoration of the original cpu and memory node mask after a hot
> removal and addition event sequence.
>
> This patch adds a
On Tue, 15 Aug 2017, Roman Gushchin wrote:
> > I'm curious about the decision made in this conditional and how
> > oom_kill_memcg_member() ignores task->signal->oom_score_adj. It means
> > that memory.oom_kill_all_tasks overrides /proc/pid/oom_score_adj if it
> > should otherwise be disabled.
On Tue, 15 Aug 2017, Roman Gushchin wrote:
> > > diff --git a/Documentation/cgroup-v2.txt b/Documentation/cgroup-v2.txt
> > > index dec5afdaa36d..22108f31e09d 100644
> > > --- a/Documentation/cgroup-v2.txt
> > > +++ b/Documentation/cgroup-v2.txt
> > > @@ -48,6 +48,7 @@ v1 is available under Docume
On 08/14/2017 05:37 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 02:26:20PM -0500, Eddie James wrote:
On 08/14/2017 01:53 PM, Guenter Roeck wrote:
On Mon, Aug 14, 2017 at 10:26:30AM -0500, Eddie James wrote:
From: "Edward A. James"
Signed-off-by: Edward A. James
---
Documentation/h
Cpuset v2 has some valuable attributes that are not present in
v1 because of backward compatibility concern. One of that is the
restoration of the original cpu and memory node mask after a hot
removal and addition event sequence.
This patch adds a new kernel command line option "cpuset_v2_mode=" t
On 07/28/2017 02:34 PM, Waiman Long wrote:
> v2->v3:
> - Add a faster pruning rate when the free pool is closed to depletion.
> - As suggested by James Bottomley, add an artificial delay waiting
> loop before killing a negative dentry and properly clear the
> DCACHE_KILL_NEGATIVE flag
From: Stephen Hemminger
> Sent: 15 August 2017 17:21
> On Tue, 15 Aug 2017 10:42:39 +
> David Laight wrote:
>
> > From: Jonathan Corbet
> > > Sent: 12 August 2017 15:55
> > ...
> > > > + Chapter 20: Put values on initialisers without exception
> > > > +
> > > > +When declaring v
On Tue, 15 Aug 2017 10:42:39 +
David Laight wrote:
> From: Jonathan Corbet
> > Sent: 12 August 2017 15:55
> ...
> > > + Chapter 20: Put values on initialisers without exception
> > > +
> > > +When declaring variables on functions must put values:
> >
> > Thanks for sending a patc
On Fri, 11 Aug 2017 15:47:14 +0800
Alex Shi wrote:
> On 08/08/2017 04:30 AM, Jonathan Corbet wrote:
> > On Mon, 31 Jul 2017 09:53:01 +0800
> > Alex Shi wrote:
> >
> >> On 07/31/2017 09:50 AM, Alex Shi wrote:
> >>> -Reviewers: Ingo Molnar, Thomas Gleixner, Thomas Duetsch, and Randy
> >>> D
On Mon, Aug 14, 2017 at 03:52:26PM -0700, David Rientjes wrote:
> On Mon, 14 Aug 2017, Roman Gushchin wrote:
>
> > diff --git a/Documentation/cgroup-v2.txt b/Documentation/cgroup-v2.txt
> > index dec5afdaa36d..22108f31e09d 100644
> > --- a/Documentation/cgroup-v2.txt
> > +++ b/Documentation/cgroup
On Tue, Jul 25, 2017 at 08:10:41PM +0800, Shaokun Zhang wrote:
> This patch adds support for DDRC PMU driver in HiSilicon SoC chip, Each
> DDRC has own control, counter and interrupt registers and is an separate
> PMU. For each DDRC PMU, it has 8-fixed-purpose counters which have been
> mapped to 8
On Tue, Aug 15, 2017 at 10:20:18PM +1000, Aleksa Sarai wrote:
> On 08/15/2017 10:15 PM, Roman Gushchin wrote:
> > Generally, oom_score_adj should have a meaning only on a cgroup level,
> > so extending it to the system level doesn't sound as a good idea.
>
> But wasn't the original purpose of oom_
On Thu, 10 Aug 2017, Prarit Bhargava wrote:
> diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
> index cedafa008de5..1ddf04201047 100644
> --- a/kernel/time/timekeeping.c
> +++ b/kernel/time/timekeeping.c
> @@ -25,6 +25,7 @@
> #include
> #include
> #include
> +#include
Tha
On 08/15/2017 10:15 PM, Roman Gushchin wrote:
Generally, oom_score_adj should have a meaning only on a cgroup level,
so extending it to the system level doesn't sound as a good idea.
But wasn't the original purpose of oom_score (and oom_score_adj) to work
on a system level, aka "normal" OOM? I
On Mon, Aug 14, 2017 at 03:42:54PM -0700, David Rientjes wrote:
> On Mon, 14 Aug 2017, Roman Gushchin wrote:
> > +
> > +static long oom_evaluate_memcg(struct mem_cgroup *memcg,
> > + const nodemask_t *nodemask)
> > +{
> > + struct css_task_iter it;
> > + struct task_str
On Tue, Jul 25, 2017 at 08:10:40PM +0800, Shaokun Zhang wrote:
> +/* HHA register definition */
> +#define HHA_INT_MASK 0x0804
> +#define HHA_INT_STATUS 0x0808
> +#define HHA_INT_CLEAR0x080C
> +#define HHA_PERF_CTRL0x1E00
> +#define HHA_EVENT_CT
From: Jonathan Corbet
> Sent: 12 August 2017 15:55
...
> > + Chapter 20: Put values on initialisers without exception
> > +
> > +When declaring variables on functions must put values:
>
> Thanks for sending a patch for the kernel's documentation.
> Unfortunately, I can't accept this patc
On Tue, Jul 25, 2017 at 08:10:39PM +0800, Shaokun Zhang wrote:
> This patch adds support for L3C PMU driver in HiSilicon SoC chip, Each
> L3C has own control, counter and interrupt registers and is an separate
> PMU. For each L3C PMU, it has 8-programable counters and supports 0x60
> events, event
Hi,
On Tue, Jul 25, 2017 at 08:10:38PM +0800, Shaokun Zhang wrote:
> +/* Read Super CPU cluster and CPU cluster ID from MPIDR_EL1 */
> +void hisi_read_sccl_and_ccl_id(u32 *sccl_id, u32 *ccl_id)
> +{
> + u64 mpidr;
> +
> + mpidr = read_cpuid_mpidr();
> + if (mpidr & MPIDR_MT_BITMASK) {
Hi,
On Tue, Jul 25, 2017 at 08:10:37PM +0800, Shaokun Zhang wrote:
> This patch adds documentation for the uncore PMUs on HiSilicon SoC.
>
> Reviewed-by: Jonathan Cameron
> Signed-off-by: Shaokun Zhang
> Signed-off-by: Anurup M
> ---
> Documentation/perf/hisi-pmu.txt | 52
> +
Le Mon, 14 Aug 2017 18:21:14 +0300,
Gilad Ben-Yossef a écrit :
> Now that -EBUSY return code only indicates backlog queueing
> we can safely remove the now redundant check for the
> CRYPTO_TFM_REQ_MAY_BACKLOG flag when -EBUSY is returned.
>
> Signed-off-by: Gilad Ben-Yossef
Acked-by: Boris Bre
> Am 14.08.2017 um 18:26 schrieb Randy Dunlap :
>
> On 08/13/2017 11:46 PM, Markus Heiser wrote:
>> Hi Randy,
>>
>>> Am 13.08.2017 um 19:29 schrieb Randy Dunlap :
>>>
>>> Hi,
>>>
>>> [on linux v4.13-rc4]
>>>
sphinx-build --version
>>> Sphinx (sphinx-build) 1.2.3
>>
>> see "Sphinx Instal
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