On Fri, May 26, 2017 at 6:52 PM, Julian Scheel wrote:
> On 18.05.2017 00:37, Ruslan Bilovol wrote:
>>
>> This patch adds a new function 'f_uac1_acard'
>> (f_uac1 with virtual "ALSA card") that
>> uses recently created u_audio API. Comparing
>> to legacy f_uac1 function implementation it
>> doesn't
On Mon, May 22, 2017 at 6:58 PM, Jassi Brar wrote:
> On Thu, May 18, 2017 at 4:07 AM, Ruslan Bilovol
> wrote:
>> Abstract the peripheral side ALSA sound card code from
>> the f_uac2 function into a component that can be called
>> by various functions, so the various flavors can be split
>> apart
On Sat, May 27, 2017 at 12:23 PM, Icenowy Zheng wrote:
> R40 is said to be an upgrade of A20, and its pin configuration is also
> similar to A20 (and thus similar to A10).
>
> Add support for R40 to the A10 pinctrl driver.
>
> Signed-off-by: Icenowy Zheng
Since I applied patches 2-5 you only ne
On 25 May 2017 at 09:57, Leo Yan wrote:
> ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The
> Sample-based Profiling Extension" has description for sampling
> registers, we can utilize these registers to check program counter
> value with combined CPU exception level, secure st
On Sat, May 27, 2017 at 12:23 PM, Icenowy Zheng wrote:
> Allwinner R40 has a pin controller like the ones in older Allwinner SoCs
> (especially A20), and can use modified version of the A10/A20 pinctrl
> driver.
>
> Add a compatible string for it.
>
> Signed-off-by: Icenowy Zheng
> Acked-by: Rob
On Sat, May 27, 2017 at 12:23 PM, Icenowy Zheng wrote:
> As we added A20 support to A10 pinctrl driver, now we can delete the
> dedicated A20 pinctrl driver, which is duplicated code.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v3:
> - Only remove the A20 driver(A10 driver for A20 is ena
On Sat, May 27, 2017 at 12:23 PM, Icenowy Zheng wrote:
> As A20 is designed as a pin-compatible upgrade of A10, their pin
> controller are very similar, and can share one driver.
>
> Add A20 support to the A10 driver.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v3:
> - Enable A10 driver
On Sat, May 27, 2017 at 12:23 PM, Icenowy Zheng wrote:
> Allwinner A10, A20 and R40 SoCs have similar GPIO layout.
>
> Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support
> into A10 driver, and add R40 support into it.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v3:
> -
Em Wed, 24 May 2017 22:36:36 -0300
Gustavo Padovan escreveu:
> Hi Mauro,
>
> 2017-05-18 Mauro Carvalho Chehab :
>
> > Each text file under Documentation follows a different
> > format. Some doesn't even have titles!
> >
> > Change its representation to follow the adopted standard,
> > using Re
On Mon, May 29, 2017 at 9:19 PM, wrote:
> 在 2017-05-29 21:11，Chen-Yu Tsai 写道：
>>
>> On Sat, May 27, 2017 at 06:23:04PM +0800, Icenowy Zheng wrote:
>>>
>>> R40 is said to be an upgrade of A20, and its pin configuration is also
>>> similar to A20 (and thus similar to A10).
>>>
>>> Add support for R
在 2017-05-29 21:11，Chen-Yu Tsai 写道：
On Sat, May 27, 2017 at 06:23:04PM +0800, Icenowy Zheng wrote:
R40 is said to be an upgrade of A20, and its pin configuration is also
similar to A20 (and thus similar to A10).
Add support for R40 to the A10 pinctrl driver.
Signed-off-by: Icenowy Zheng
---
On Sat, May 27, 2017 at 06:23:04PM +0800, Icenowy Zheng wrote:
> R40 is said to be an upgrade of A20, and its pin configuration is also
> similar to A20 (and thus similar to A10).
>
> Add support for R40 to the A10 pinctrl driver.
>
> Signed-off-by: Icenowy Zheng
> ---
> drivers/pinctrl/sunxi/K
On 05/26/2017 11:20 AM, Wolfram Sang wrote:
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -583,7 +583,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
*/
/*
-* i2c-core.c alway
On Sat, May 27, 2017 at 6:23 PM, Icenowy Zheng wrote:
> From: Chen-Yu Tsai
>
> The Banana Pi M2 Ultra is an SBC based on the Allwinner R40 SoC. The
> form factor and position of various connectors, leds and buttons is
> similar to the Banana Pi M1+, Banana Pi M3, and is exactly the same
> as the
Many users of kernel async. crypto services have a pattern of
starting an async. crypto op and than using a completion
to wait for it to end, resulting of the same code repeating
itself in multiple places, sometime with coding errors.
This patch aims to introduce a generic "wait for async.
crypto
gcm is starting an async. crypto op and waiting for it complete.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
crypto/gcm.c | 32 ++--
1 file changed, 6 insertions(+), 26 deletions(-)
diff --git a/crypto/gcm.c b/crypto/gcm.c
index 3
algif starts several async crypto ops and waits for their completion.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
crypto/af_alg.c | 27 ---
crypto/algif_aead.c | 14 +++---
crypto/algif_hash.c | 29 +
public_key_verify_signature() is starting an async crypto op and
waiting for it to complete. Move it over to generic code doing
the same.
Signed-off-by: Gilad Ben-Yossef
---
crypto/asymmetric_keys/public_key.c | 28
1 file changed, 4 insertions(+), 24 deletions(-)
d
DRBG is starting an async. crypto op and waiting for it complete.
Move it over to generic code doing the same.
The code now also passes CRYPTO_TFM_REQ_MAY_SLEEP flag indicating
crypto request memory allocation may use GFP_KERNEL which should
be perfectly fine as the code is obviously sleeping for
testmgr is starting async. crypto ops and waiting for them to complete.
Move it over to generic code doing the same.
This also provides a test of the generic crypto async. wait code.
Signed-off-by: Gilad Ben-Yossef
---
crypto/testmgr.c | 184 +
fscrypt starts several async. crypto ops and waiting for them to
complete. Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
fs/crypto/crypto.c | 28
fs/crypto/fname.c | 36 ++--
fs/cry
dm-verity is starting async. crypto ops and waiting for them to complete.
Move it over to generic code doing the same.
This also fixes a possible data coruption bug created by the
use of wait_for_completion_interruptible() without dealing
correctly with an interrupt aborting the wait prior to the
The code sample is waiting for an async. crypto op completion.
Adapt sample to use the new generic infrastructure to do the same.
This also fixes a possible data coruption bug created by the
use of wait_for_completion_interruptible() without dealing
correctly with an interrupt aborting the wait pr
cifs starts an async. crypto op and waits for their completion.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
Acked-by: Pavel Shilovsky
---
fs/cifs/smb2ops.c | 30 --
1 file changed, 4 insertions(+), 26 deletions(-)
diff --git a/fs/cif
ima starts several async crypto ops and waits for their completions.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
Acked-by: Mimi Zohar
---
security/integrity/ima/ima_crypto.c | 56 +++--
1 file changed, 17 insertions(+), 39 deleti
Invoking a possibly async. crypto op and waiting for completion
while correctly handling backlog processing is a common task
in the crypto API implementation and outside users of it.
This patch adds a generic implementation for doing so in
preparation for using it across the board instead of hand
Hi,
On Sat, May 27, 2017 at 6:23 PM, Icenowy Zheng wrote:
> From: Chen-Yu Tsai
>
> The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
> The R40 is a smaller chip than the A20, but features the same set
> of programmable pins, with a couple extra pins and some new pin
> functions.
Hi,
On Sat, May 27, 2017 at 06:23:06PM +0800, Icenowy Zheng wrote:
> Allwinner R40 SoC have a clock controller module in the style of the
> SoCs beyond sun6i, however, it's more rich and complex.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v3:
> - Rebased on curr
28 matches
Mail list logo
