Passing (void *) val would cause sock_setsockopt to -EFAULT.
See tools/testing/selftests/networking/timestamping/timestamping.c
for a working example.
Cc: Jonathan Corbet
Cc: linux-doc@vger.kernel.org
Cc: triv...@kernel.org
Signed-off-by: Ahmad Fatoum
---
Changes in v2:
- Reference current lo
From: Ahmad Fatoum
Passing (void *) val would cause sock_setsockopt to -EFAULT.
See Documentation/networking/timestamping/timestamping.c
for a working example.
Cc: Jonathan Corbet
Cc: linux-doc@vger.kernel.org
Cc: triv...@kernel.org
Signed-off-by: Ahmad Fatoum
---
Documentation/networking/ti
On Fri, 2017-05-19 at 16:38 -0400, Tejun Heo wrote:
> Hello, Waiman.
>
> On Mon, May 15, 2017 at 09:34:11AM -0400, Waiman Long wrote:
> > The rationale behind the cgroup v2 no internal process constraint is
> > to avoid resouorce competition between internal processes and child
> > cgroups. Howeve
On 05/19/17 13:28, Mauro Carvalho Chehab wrote:
> Em Fri, 19 May 2017 03:26:08 -0700
> Joe Perches escreveu:
>
>> On Thu, 2017-05-18 at 22:25 -0300, Mauro Carvalho Chehab wrote:
>>> Each text file under Documentation follows a different
>>> format. Some doesn't even have titles!
>>>
>>> Change it
On Thu, May 18, 2017 at 08:24:43PM -0700, Luis R. Rodriguez wrote:
> In theory it is possible multiple concurrent threads will try to
> kmod_umh_threads_get() and as such atomic_inc(&kmod_concurrent) at
> the same time, therefore enabling a small time during which we've
> bumped kmod_concurrent but
On Thu, May 18, 2017 at 08:24:44PM -0700, Luis R. Rodriguez wrote:
> Just use the simplified rate limit printk when the max modprobe
> limit is reached, while at it throw out a bone should the error
> be triggered.
>
> Reviewed-by: Petr Mladek
> Signed-off-by: Luis R. Rodriguez
> ---
> kernel/k
MMC in dra7 is different from sdhci
Hmm what's the tuning ratio?
> This series has been tested on beagleboard, pandaboard, beaglebone-black,
> beaglebone, am335x-evm, am437x-evm, dra7xx-evm, dra72x-evm, am571x-idk
> and am572x-idk.
I gave this a quick try after manally applying nex
On Fri, May 19, 2017 at 02:45:29PM -0700, Luis R. Rodriguez wrote:
> On May 19, 2017 1:45 PM, "Dmitry Torokhov"
> wrote:
>
> On Thu, May 18, 2017 at 08:24:39PM -0700, Luis R. Rodriguez wrote:
> > We currently statically limit the number of modprobe threads which
> > we allow to run concurrently t
On 5/19/2017 4:28 PM, Borislav Petkov wrote:
On Fri, May 19, 2017 at 04:07:24PM -0500, Tom Lendacky wrote:
As long as those never change from static inline everything will be
fine. I can change it, but I really like how it explicitly indicates
I know what you want to do. But you're practically
On Fri, May 19, 2017 at 04:07:24PM -0500, Tom Lendacky wrote:
> As long as those never change from static inline everything will be
> fine. I can change it, but I really like how it explicitly indicates
I know what you want to do. But you're practically defining a helper
which contains two arbitra
On 05/19/2017 04:55 PM, Tejun Heo wrote:
> Hello, Waiman.
>
> On Mon, May 15, 2017 at 09:34:12AM -0400, Waiman Long wrote:
>> For cgroup v1, different controllers can be binded to different cgroup
>> hierarchies optimized for their own use cases. That is not currently
>> the case for cgroup v2 wher
On 5/19/2017 3:58 PM, Borislav Petkov wrote:
On Fri, May 19, 2017 at 03:45:28PM -0500, Tom Lendacky wrote:
Actually there is. The above will result in data in the cache because
halt() turns into a function call if CONFIG_PARAVIRT is defined (refer
to the comment above where do_wbinvd_halt is se
On Fri, May 19, 2017 at 03:45:28PM -0500, Tom Lendacky wrote:
> Actually there is. The above will result in data in the cache because
> halt() turns into a function call if CONFIG_PARAVIRT is defined (refer
> to the comment above where do_wbinvd_halt is set to true). I could make
> this a native_w
Hello,
On Fri, May 19, 2017 at 04:26:24PM -0400, Tejun Heo wrote:
> (exactly in the way necessary), I wonder whether it'd be better to
> simply allow root to be both domain and thread root.
I'll give this approach a shot early next week.
Thanks.
--
tejun
--
To unsubscribe from this list: send
Hello, Waiman.
On Mon, May 15, 2017 at 09:34:12AM -0400, Waiman Long wrote:
> For cgroup v1, different controllers can be binded to different cgroup
> hierarchies optimized for their own use cases. That is not currently
> the case for cgroup v2 where combining all these controllers into
> the same
On 5/18/2017 4:02 AM, Borislav Petkov wrote:
On Wed, May 17, 2017 at 01:54:39PM -0500, Tom Lendacky wrote:
I was worried what the compiler might do when CONFIG_EFI is not set,
but it appears to take care of it. I'll double check though.
There's a efi_enabled() !CONFIG_EFI version too, so shoul
On 5/17/2017 2:17 PM, Borislav Petkov wrote:
On Tue, Apr 18, 2017 at 04:21:21PM -0500, Tom Lendacky wrote:
Provide support so that kexec can be used to boot a kernel when SME is
enabled.
Support is needed to allocate pages for kexec without encryption. This
is needed in order to be able to reb
On Thu, May 18, 2017 at 08:24:39PM -0700, Luis R. Rodriguez wrote:
> We currently statically limit the number of modprobe threads which
> we allow to run concurrently to 50. As per Keith Owens, this was a
> completely arbitrary value, and it was set in the 2.3.38 days [0]
> over 16 years ago in yea
Hello, Waiman.
On Mon, May 15, 2017 at 09:34:11AM -0400, Waiman Long wrote:
> The rationale behind the cgroup v2 no internal process constraint is
> to avoid resouorce competition between internal processes and child
> cgroups. However, not all controllers have problem with internal
> process comp
On Fri, May 19, 2017 at 03:16:51PM -0500, Josh Poimboeuf wrote:
> I'm the stack validation guy, not the stack protection guy :-)
LOL. I thought you were *the* stacks guy. :-)))
But once you've validated it, you could protect it then too. :-)
--
Regards/Gruss,
Boris.
Good mailing practices
Hello,
On Fri, May 19, 2017 at 03:33:14PM -0400, Waiman Long wrote:
> On 05/19/2017 03:21 PM, Tejun Heo wrote:
> > Yeah but it also shows up as an integral part of stable interface
> > rather than e.g. /sys/kernel/debug. This isn't of any interest to
> > people who aren't developing cgroup core c
Em Fri, 19 May 2017 03:26:08 -0700
Joe Perches escreveu:
> On Thu, 2017-05-18 at 22:25 -0300, Mauro Carvalho Chehab wrote:
> > Each text file under Documentation follows a different
> > format. Some doesn't even have titles!
> >
> > Change its representation to follow the adopted standard,
> > u
Hello, Waiman.
On Mon, May 15, 2017 at 09:34:10AM -0400, Waiman Long wrote:
> Now we could have something like
>
> R -- A -- B
>\
> T1 -- T2
>
> where R is the thread root, A and B are non-threaded cgroups, T1 and
> T2 are threaded cgroups. The cgroups R, T1, T2 form a thre
On Fri, May 19, 2017 at 01:30:05PM +0200, Borislav Petkov wrote:
> > it is called so early. I can get past it by adding:
> >
> > CFLAGS_mem_encrypt.o := $(nostackp)
> >
> > in the arch/x86/mm/Makefile, but that obviously eliminates the support
> > for the whole file. Would it be better to split
On 5/16/2017 9:52 AM, Borislav Petkov wrote:
On Tue, Apr 18, 2017 at 04:20:19PM -0500, Tom Lendacky wrote:
Add warnings to let the user know when bounce buffers are being used for
DMA when SME is active. Since the bounce buffers are not in encrypted
memory, these notifications are to allow the
On 5/16/2017 9:27 AM, Borislav Petkov wrote:
On Tue, Apr 18, 2017 at 04:20:10PM -0500, Tom Lendacky wrote:
Since DMA addresses will effectively look like 48-bit addresses when the
memory encryption mask is set, SWIOTLB is needed if the DMA mask of the
device performing the DMA does not support 4
On 5/16/2017 9:04 AM, Borislav Petkov wrote:
On Tue, Apr 18, 2017 at 04:19:42PM -0500, Tom Lendacky wrote:
Persistent memory is expected to persist across reboots. The encryption
key used by SME will change across reboots which will result in corrupted
persistent memory. Persistent memory is ha
On 05/19/2017 03:21 PM, Tejun Heo wrote:
> Hello, Waiman.
>
> On Thu, May 18, 2017 at 11:52:18AM -0400, Waiman Long wrote:
>> The controller name is "debug" and so it is obvious what this controller
>> is for. However, the config prompt "Example controller" is indeed vague
> Yeah but it also shows
Hello, Waiman.
On Thu, May 18, 2017 at 11:52:18AM -0400, Waiman Long wrote:
> The controller name is "debug" and so it is obvious what this controller
> is for. However, the config prompt "Example controller" is indeed vague
Yeah but it also shows up as an integral part of stable interface
rather
On 19/05/17 18:44, Sudeep Holla wrote:
Hi Suzuki, Leo,
On 19/05/17 05:25, Leo Yan wrote:
From: Suzuki K Poulose
Add Coresight CPU debug nodes for Juno r0, r1 & r2. The CPU
debug areas are mapped at the same address for all revisions,
like the ETM, even though the CPUs have changed from r1 to
Hi Suzuki, Leo,
On 19/05/17 05:25, Leo Yan wrote:
> From: Suzuki K Poulose
>
> Add Coresight CPU debug nodes for Juno r0, r1 & r2. The CPU
> debug areas are mapped at the same address for all revisions,
> like the ETM, even though the CPUs have changed from r1 to r2.
>
> Cc: Sudeep Holla
> Cc:
On Thu, 2017-05-18 at 22:25 -0300, Mauro Carvalho Chehab wrote:
> Each text file under Documentation follows a different
> format. Some doesn't even have titles!
>
> Change its representation to follow the adopted standard,
> using ReST markups for it to be parseable by Sphinx:
>
> - add a title
On Thu, 18 May 2017 17:15:17 -0400
Konstantin Ryabitsev wrote:
> Would it be fair to say documentation is "GNU GPLv2 unless otherwise
> indicated?" And if that's not the case (because I'm not sure GPLv2 is a
> sane license for documentation), would it make sense to clearly indicate
> the docum
Hello, Mauro.
On Thu, May 18, 2017 at 10:22:11PM -0300, Mauro Carvalho Chehab wrote:
> Each text file under Documentation follows a different
> format. Some doesn't even have titles!
>
> Change its representation to follow the adopted standard,
> using ReST markups for it to be parseable by Sphin
On Thu, 18 May 2017 22:24:03 -0300
Mauro Carvalho Chehab wrote:
> Each text file under Documentation follows a different
> format. Some doesn't even have titles!
>
> Change its representation to follow the adopted standard,
> using ReST markups for it to be parseable by Sphinx:
>
> - comment th
On Thu, May 18, 2017 at 05:15:17PM -0400, Konstantin Ryabitsev wrote:
>
> I had someone ask me today whether https://www.kernel.org/doc/html/latest/
> is covered by GNU GPL or GNU FDL, and honestly I wasn't sure, as there is
> actually no clear indication. There's places where FDL is listed
> (htt
> diff --git a/Documentation/svga.txt b/Documentation/svga.txt
> index cd66ec836e4f..119f1515b1ac 100644
> --- a/Documentation/svga.txt
> +++ b/Documentation/svga.txt
> @@ -1,24 +1,31 @@
Acked-By: Martin Mares
Have a nice fortnight
--
Martin `MJ' Mares
Hi Mauro,
On Fri, May 19, 2017 at 3:25 AM, Mauro Carvalho Chehab
wrote:
> Each text file under Documentation follows a different
> format. Some doesn't even have titles!
>
> Change its representation to follow the adopted standard,
> using ReST markups for it to be parseable by Sphinx.
>
> This d
On Fri, May 19, 2017 at 05:55:00AM -0300, Mauro Carvalho Chehab wrote:
>Hi William,
>
>Em Thu, 18 May 2017 22:13:55 -0400
>William Breathitt Gray escreveu:
>
>> On Thu, May 18, 2017 at 10:24:00PM -0300, Mauro Carvalho Chehab wrote:
>> >Each text file under Documentation follows a different
>> >for
On Fri, Apr 21, 2017 at 01:56:13PM -0500, Tom Lendacky wrote:
> On 4/18/2017 4:22 PM, Tom Lendacky wrote:
> > Add support to check if SME has been enabled and if memory encryption
> > should be activated (checking of command line option based on the
> > configuration of the default state). If memo
On Tue, Apr 18, 2017 at 04:22:23PM -0500, Tom Lendacky wrote:
> Add support to check if SME has been enabled and if memory encryption
> should be activated (checking of command line option based on the
> configuration of the default state). If memory encryption is to be
> activated, then the encry
On Fri, 2017-05-19 at 08:11 -0300, Mauro Carvalho Chehab wrote:
>
> Yes, it should work. Actually, you would need to use :depth: 2 to
> produce this output:
>
>
> Contents
>
> . rfkill - RF kill switch support
> . Introduction
> . Implementation detai
Em Fri, 19 May 2017 12:15:01 +0200
Johannes Berg escreveu:
> On Thu, 2017-05-18 at 22:25 -0300, Mauro Carvalho Chehab wrote:
> >
> > +.. CONTENTS
> >
> > + 1. Introduction
> > + 2. Implementation details
> > + 3. Kernel API
> > + 4. Userspace support
>
> Why not let this be auto-generat
On Thu 11-05-17 20:16:23, Roman Gushchin wrote:
> Track the following reclaim counters for every memory cgroup:
> PGREFILL, PGSCAN, PGSTEAL, PGACTIVATE, PGDEACTIVATE, PGLAZYFREE and
> PGLAZYFREED.
>
> These values are exposed using the memory.stats interface of cgroup v2.
>
> The meaning of each
Now that vmmc regulator is made optional, do not bail out if vmmc
regulator is not found.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Sekhar Nori
---
drivers/mmc/host/omap_hsmmc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host
On Thu, 2017-05-18 at 22:25 -0300, Mauro Carvalho Chehab wrote:
>
> +.. CONTENTS
>
> + 1. Introduction
> + 2. Implementation details
> + 3. Kernel API
> + 4. Userspace support
Why not let this be auto-generated?
.. contents::
:depth: 1
should work, no?
johannes
--
To unsubscribe from
Hi William,
Em Thu, 18 May 2017 22:13:55 -0400
William Breathitt Gray escreveu:
> On Thu, May 18, 2017 at 10:24:00PM -0300, Mauro Carvalho Chehab wrote:
> >Each text file under Documentation follows a different
> >format. Some doesn't even have titles!
> >
> >Change its representation to follow
This series adds UHS, HS200, DDR mode and ADMA support to
omap_hsmmc driver used to improve the throughput of MMC/SD in dra7
SoCs.
The functionality implemented in this series was sent before ([1]) but
was never followed up since supporting high speed modes in dra7 required
IODelay values to be co
Add a separate function to set the voltage capabilities of the host
controller. Voltage capabilities should be set only once during
controller initialization but bus power can be changed every time there
is a voltage switch and whenever a different card is inserted.
This allows omap_hsmmc_conf_bus_
Add support for vmmc_aux to switch to 1.8v. Also use "iov" instead of
"vdd" to indicate io voltage. This is in preparation for adding support
for io signal voltage switch.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Sekhar Nori
---
drivers/mmc/host/omap_hsmmc.c | 50 +++
From: Balaji T K
UHS SD card i/o data line operates at 1.8V when in UHS speed
mode.
Add support for signal voltage switch to support UHS cards.
Also, enable CIRQ before checking for CLEV/DLEV. MMC module can
sense when the clock lines and data lines are driven high by the
card, if MMC is active
ios->vdd is set only in mmc_power_up and mmc_power_off and not in
mmc_select_voltage() as mentioned in the code comment. This seems to be
legacy code that has been carried for a long time without being
tested.
This will be replaced with the correct voltage switch sequence and
populated in start_si
HCTL is now set based on ios.signal_voltage set by mmc core and not
hardcoded to 3V0 if OMAP_HSMMC_SUPPORTS_DUAL_VOLT is set. If
OMAP_HSMMC_SUPPORTS_DUAL_VOLT is set, it means HCTL can be set to either
3V0 or 1V8. And it should be set to 3V0 or 1V8 depending on
ios.signal_voltage.
Also it is now se
From: Mugunthan V N
DRA7 Errata No i834: When using high speed HS200 and SDR104
cards, the functional clock for MMC module will be 192MHz.
At this frequency, the maximum obtainable timeout (DTO =0xE)
in hardware is (1/192MHz)*2^27 = 700ms. Commands taking longer
than 700ms will be affected by thi
Set the clock rate of the functional clock to the max frequency
that is passed to the driver either using pdata or dt.
Also remove unnecessary setting of host->fclk to NULL.
This is in preparation for supporting high frequency modes
of operation.
Signed-off-by: Kishon Vijay Abraham I
Signed-off
Fix the error path sequence so that clk_disable, runtime_disable etc
are done in the reverse order of how they were enabled.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Sekhar Nori
---
drivers/mmc/host/omap_hsmmc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
No functional change. Add separate case statements for certain timing
like MMC_TIMING_SD_HS and MMC_TIMING_MMC_HS even though AC12_UHSMC_RES
has to be written to the AC12 register (same as for default modes).
Also have separate case sections for MMC_TIMING_UHS_SDR104 and
MMC_TIMING_UHS_HS200 even t
Add a new compatible string "ti,dra7-hsmmc" to support
dra7 and dra72 controllers. Also create a new controller flag
"OMAP_HSMMC_REQUIRE_IODELAY" to specify all controllers that use
"ti,dra7-hsmmc" require iodealy configuration to be set.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Sekha
From: Ravikumar Kattekola
On dra72/dra71 evms, mmc2 vdd/ios are connected to a common 1.8V supply
not 3.3V. Also the regulator that supplies 1.8V is different on dra71-evm
so move the supply property from common dtsi to evm specific dts files.
Fixes: a4240d3af677 ("ARM: dts: Add support for dra7
Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra7-evm.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/dra7-evm.dts | 18 ++
From: Sekhar Nori
OMAP HSMMC driver assumes that if the controller does
not support dual-volt, then it supports only 1.8V IO.
This assumption can be incorrect. For example, on K2G
MMC0 supports 3.3V IO only. AM57x Beagle-x15 and IDK
boards support only 3.3V IO on eMMC interface.
Support device-
From: Tony Lindgren
Add dra7 iodelay configuration.
Signed-off-by: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/boot/dts/dra7.dtsi | 8
include/dt-bindings/pinctrl/dra.h | 3 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/
Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74x SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am572x-idk.dts.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/am572x-idk.dts | 19 +
Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am571x-idk.dts.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/am571x-idk.dts | 19 ++
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.
Add support to set the IODELAY values depending on the various MMC
modes using the pinctrl APIs.
Signed-off-by: Kishon Vijay Abrah
omap_hsmmc doesn't support polled I/O. So remove *use_dma*
which is always set to '1'.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Sekhar Nori
---
drivers/mmc/host/omap_hsmmc.c | 37 -
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/d
omap hsmmc host controller has ADMA2 feature. Enable it here
for better read and write throughput.
Signed-off-by: Kishon Vijay Abraham I
[misael.lo...@ti.com: handle ADMA errors]
Signed-off-by: Misael Lopez Cruz
[nsek...@ti.com: restore adma settings after context loss]
Signed-off-by: Sekhar Nor
Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra72-evm-revc.dts.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/dra72-evm-revc.dts | 1
On DRA7 family SoCs, MMC1 controller supports SDR104,
SDR50, DDR50, SDR25 and SDR12 UHS modes (These UHS modes
are not supported in beagle-x15 because it's not possible
to switch IO lines supply voltage to 1.8v).
MMC2 controller supports HS200 and DDR modes. (Since some of the
boards like am57xx-e
MMC2 interface on AM57xx Beagle-x15, connected to
onboard eMMC, has IO voltage fixed to 3.3V.
Add no-1-8-v device-tree property to mmc2 node
in the board's device-tree file to reflect
this.
Note that the AM57xx SoC itself supports dual-voltage
on MMC2. The limitation above is due to the board.
S
From: Sekhar Nori
DRA74x EVM Rev H EVM comes with revision 2.0 silicon.
However, earlier versions of EVM can come with either
revision 1.1 or revision 1.0 of silicon.
The device-tree file is written to support rev 2.0 of
silicon. pdata quirks are used to then override the
settings needed for PG
Add vmmc_aux-supply property to mmc1 dt node and populate
it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/dra72-evm.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/a
Enable PINCTRL_TI_IODELAY since it is required for MMC module in
DRA7 family of processors to configure "IODelay" values
depending on the enumerated MMC modes.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/
Enable PINCTRL_TI_IODELAY since it is required for MMC module in
DRA7 family of processors to configure "IODelay" values
depending on the enumerated MMC modes.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/a
Add "max-frequency" property to MMC dt nodes and set the
maximum frequency to 192MHz for MMC1/MMC2, 64MHz for MMC3
and 192MHz for MMC4. pdata quirks must be utilized to
detect presence of rev 1.1/1.0 of silicon and adjust
maximum frequencies as per restrictions documented in i843.
Signed-off-by: K
From: Sekhar Nori
Add pinmux configuration for MMC module including IODELAY
values suggested in the data manual for the various supported
modes.
IOdelay data for both silicon revision 1.0 and 2.0 is
added here.
The datamanual revisions used are:
* AM571x Silicon Revision 2.0: SPRS957D, Revised
From: Ravikumar Kattekola
On DRA75x EVM, MMC2 vdd/ios are connected to a common supply fixed at 1.8V
not 3.3V
Fixes: 6cf02dbb4b71 ("ARM: dts: dra7-evm: Add mmc2 node for eMMC support")
Signed-off-by: Ravikumar Kattekola
Signed-off-by: Sekhar Nori
Signed-off-by: Kishon Vijay Abraham I
---
arc
Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra72-evm.dts.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/dra72-evm.dts | 14
From: Sekhar Nori
MMC2 interface on AM57xx IDK, connected to
onboard eMMC, has IO voltage fixed to 3.3V.
Add no-1-8-v device-tree property to mmc2 node
in the board's device-tree file to reflect
this.
Note that the AM57xx SoC itself supports
dual-voltage on MMC2. The limitation above is
due to
MMC on DRA7 SoCs require different IO Delay values to be configured
depending on the MMC mode. In order to confgiure these IO Delay values
CONFIG_PINCTRL_TI_IODELAY must be enabled. Document this dependency
here so that it can be added by anyone using custom .config.
Signed-off-by: Kishon Vijay Ab
Use the new compatible string "ti,dra7-hsmmc" that was specifically
added for dra7 and dra72. This is required since for dra7 and dra72
processors iodelay values has to be set unlike other processors.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Sekhar Nori
---
arch/arm/boot/dts/dra7.dt
From: Sekhar Nori
Add pinmux configuration for MMC module including IODELAY
values suggested in the data manual for the various supported
modes.
IOdelay data for both silicon revision 1.1 and 2.0 is
added here.
The datamanual revisions used are:
* AM572x Silicon Revision 2.0: SPRS953B, Revised
From: Sekhar Nori
AM572x IDK and AM571x IDK boards have equivalent
design of how SD card and eMMC are connected.
The two EVMs mainly differ in IOdelay configuration
needed (because of difference in SoC used).
Move the common properties to am57xx-idk-common.dtsi
file which is common for both EVM
Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra71-evm.dts.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/dra71-evm.dts | 14
MMC tuning procedure is required to support SD card
UHS1-SDR104 mode and EMMC HS200 mode.
The tuning function omap_execute_tuning() will only be
called by the MMC/SD core if the corresponding speed modes
are supported by the OMAP silicon which is set in the mmc
host "caps" field.
Add a separate f
The dt binding documentation of omap-hsmmc recommends using
"vmmc_aux" for IO supply lines. However
commit 0af28cc92690d8c ("ARM: dts: am57xx-beagle-x15: Add support
for rev B1") added it as "vmmc-aux". Fix it here.
Fixes: commit 0af28cc92690d8c ("ARM: dts: am57xx-beagle-x15: Add
support for rev B
Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am57xx-beagle-x15/am57xx-beagle-x15-revb1.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts
Add vmmc_aux-supply property to mmc1 dt node and populate
it with ldo1_reg to reflect ldo1_out is connected to mmc1 IO lines.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm/boot/dts/dra72-evm-revc.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dt
On Thu 18-05-17 14:11:17, Johannes Weiner wrote:
> On Thu, May 18, 2017 at 07:30:04PM +0200, Michal Hocko wrote:
> > On Thu 18-05-17 17:28:04, Roman Gushchin wrote:
> > > Traditionally, the OOM killer is operating on a process level.
> > > Under oom conditions, it finds a process with the highest o
Dear all,
So here is a new version of the patches to be reviewed, this time as
suggested by Alasdair the patches are reworked to match with the new
dmsetup bootformat feature [1]. These patches are not reviewed yet but
the format was discussed in the IRC and was suggested to send the
kernel patche
Add a dm_ioctl_cmd to issue the equivalent of a DM ioctl call in kernel.
Signed-off-by: Enric Balletbo i Serra
---
drivers/md/dm-ioctl.c | 50 +++
include/linux/device-mapper.h | 6 ++
2 files changed, 56 insertions(+)
diff --git a/drivers/md
From: Will Drewry
Add a dm= kernel parameter modeled after the md= parameter from
do_mounts_md. It allows for device-mapper targets to be configured at
boot time for use early in the boot process (as the root device or
otherwise).
Signed-off-by: Will Drewry
Signed-off-by: Kees Cook
[rework to
Hi,
2017-05-18 18:29 GMT+02:00 Enric Balletbo i Serra
:
> Dear all,
>
> So here is a new version of the patches to be reviewed, this time as
> suggested by Alasdair the patches are reworked to match with the new
> dmsetup bootformat feature [1]. These patches are not reviewed yet but
> the format
On 05/19/2017 03:24 AM, Mauro Carvalho Chehab wrote:
> Each text file under Documentation follows a different
> format. Some doesn't even have titles!
>
> Change its representation to follow the adopted standard,
> using ReST markups for it to be parseable by Sphinx:
>
> - Adjust identations;
> - R
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