Re: [PATCH v3 1/6] dt-bindings: add device tree binding for Allwinner V3s pinctrl

On Fri, Jan 20, 2017 at 01:54:43AM +0800, Icenowy Zheng wrote: > Allwinner V3s SoC has a pin controller like other Allwinner SoCs and got > supported by the sunxi-pinctrl driver now. > > Add a device tree binding for it. > > Signed-off-by: Icenowy Zheng Acked-by: Maxime Ripard Thanks, Maxime

Re: [PATCH v3 2/6] arm: sunxi: add support for V3s SoC

On Fri, Jan 20, 2017 at 01:54:44AM +0800, Icenowy Zheng wrote: > Allwinner V3s is a low-end single-core Cortex-A7 SoC, with 64MB > integrated DRAM, and several peripherals. > > Signed-off-by: Icenowy Zheng This didn't apply. Please make sure to send patches based on my current branch. Fixed the

Re: [PATCH v3 4/6] dt-bindings: add device binding for the CCU of Allwinner V3s

On Fri, Jan 20, 2017 at 01:54:46AM +0800, Icenowy Zheng wrote: > Allwinner V3s is now driven by sunxi-ng CCU driver. > > Add devicetree binding for it. > > Signed-off-by: Icenowy Zheng Applied. Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-e

Re: [PATCH v3 3/6] clk: sunxi-ng: add support for V3s CCU

On Fri, Jan 20, 2017 at 01:54:45AM +0800, Icenowy Zheng wrote: > V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks > about CSI, are different, which makes it to need a new CCU driver. > > Add such a new driver for it. > > Signed-off-by: Icenowy Zheng > --- Having a changel

Re: [PATCH v3 5/6] ARM: dts: sunxi: add dtsi file for V3s SoC

On Fri, Jan 20, 2017 at 01:54:47AM +0800, Icenowy Zheng wrote: > As we have the pinctrl and clock support for the V3s SoC, it's now to > run a mainline Linux on it. > > So add a .dtsi file for it. > > Signed-off-by: Icenowy Zheng Next time, please provide a description of what that SoC in your

Re: [PATCH v3 6/6] ARM: dts: sunxi: add support for Lichee Pi Zero board

On Fri, Jan 20, 2017 at 01:54:48AM +0800, Icenowy Zheng wrote: > Lichee Pi Zero is a small-sized V3s board, which is > breadboard-compatible, and with a MicroUSB port with both OTG function > and power function. > > Signed-off-by: Icenowy Zheng Applied, thanks Maxime -- Maxime Ripard, Free Ele

Re: [PATCH 37/37] ARM: dts: DRA7: Add pcie1 dt node for EP mode

* Kishon Vijay Abraham I [170112 02:34]: > Add pcie1 dt node in order for the controller to operate in > endpoint mode. However since none of the dra7 based boards have > slots configured to operate in endpoint mode, keep EP mode > disabled. Can this be merged separately later on without breaking

Re: [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP

* Kishon Vijay Abraham I [170115 22:06]: > Hi Tony, > > On Friday 13 January 2017 10:45 PM, Tony Lindgren wrote: > > * Kishon Vijay Abraham I [170112 02:35]: > >> The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should > >> be set to SW_WKUP. There are no issues when CLKSTCTRL is