On 2016年05月26日 08:34, Caesar Wang wrote:
On 2016年05月26日 00:42, Javi Merino wrote:
Hi Caesar,
On Wed, May 25, 2016 at 11:47:45AM +0800, Caesar Wang wrote:
From: Sascha Hauer
This adds support for hardware-tracked trip points to the device tree
thermal sensor framework.
The framework suppor
I don't remember how much I answered this email, but I need to finish that :-)
On Fri, Apr 08, 2016 at 12:34:48PM -0400, Chris Metcalf wrote:
> On 4/8/2016 9:56 AM, Frederic Weisbecker wrote:
> >On Wed, Mar 09, 2016 at 02:39:28PM -0500, Chris Metcalf wrote:
> >> TL;DR: Let's make an explicit dec
On 2016年05月26日 00:42, Javi Merino wrote:
Hi Caesar,
On Wed, May 25, 2016 at 11:47:45AM +0800, Caesar Wang wrote:
From: Sascha Hauer
This adds support for hardware-tracked trip points to the device tree
thermal sensor framework.
The framework supports an arbitrary number of trip points. When
From: Arnd Bergmann
Date: Wed, 25 May 2016 23:01:06 +0200
> On Wednesday, May 25, 2016 1:50:39 PM CEST David Miller wrote:
>> From: Arnd Bergmann
>> Date: Wed, 25 May 2016 22:47:33 +0200
>>
>> > If we use the normal calling conventions, we could remove these overrides
>> > along with the respec
On Wednesday, May 25, 2016 1:50:39 PM CEST David Miller wrote:
> From: Arnd Bergmann
> Date: Wed, 25 May 2016 22:47:33 +0200
>
> > If we use the normal calling conventions, we could remove these overrides
> > along with the respective special-case handling in glibc. None of them
> > look particul
From: Arnd Bergmann
Date: Wed, 25 May 2016 22:47:33 +0200
> If we use the normal calling conventions, we could remove these overrides
> along with the respective special-case handling in glibc. None of them
> look particularly performance-sensitive, but I could be wrong there.
You could set the
On Wednesday, May 25, 2016 1:21:45 PM CEST David Miller wrote:
> From: Yury Norov
> Date: Wed, 25 May 2016 23:03:27 +0300
>
> > On Wed, May 25, 2016 at 12:30:17PM -0700, David Miller wrote:
> >> From: Yury Norov
> >> Date: Tue, 24 May 2016 03:04:30 +0300
> >>
> >> > +To clear that top halves, a
On Tuesday, May 24, 2016 3:04:47 AM CEST Yury Norov wrote:
> +static unsigned long compat_sys_mmap2(compat_uptr_t addr, compat_size_t len,
> + int prot, int flags, int fd, off_t pgoff)
> +{
> + if (pgoff & (~PAGE_MASK >> 12))
> + return -EINVAL;
> +
> + return sys_mm
From: Yury Norov
Date: Wed, 25 May 2016 23:03:27 +0300
> On Wed, May 25, 2016 at 12:30:17PM -0700, David Miller wrote:
>> From: Yury Norov
>> Date: Tue, 24 May 2016 03:04:30 +0300
>>
>> > +To clear that top halves, automatic wrappers are introduced. They clear
>> > all
>> > +required registers
On Wed, May 25, 2016 at 12:30:17PM -0700, David Miller wrote:
> From: Yury Norov
> Date: Tue, 24 May 2016 03:04:30 +0300
>
> > +To clear that top halves, automatic wrappers are introduced. They clear all
> > +required registers before passing control to regular syscall handler.
>
> Why have one
On Tue, 24 May, at 09:54:31AM, Tom Lendacky wrote:
>
> I looked into this and this would be a large change also to parse tables
> and build lists. It occurred to me that this could all be taken care of
> if the early_memremap calls were changed to early_ioremap calls. Looking
> in the git log I s
From: Yury Norov
Date: Tue, 24 May 2016 03:04:30 +0300
> +To clear that top halves, automatic wrappers are introduced. They clear all
> +required registers before passing control to regular syscall handler.
Why have one of these for every single compat system call, rather than
simply clearing th
On Mon, May 23, 2016 at 06:01:14PM -0700, Hoan Tran wrote:
> Hi Rob,
>
> Thanks for your review !
>
> On Mon, May 23, 2016 at 1:30 PM, Rob Herring wrote:
> >
> > On Mon, May 16, 2016 at 09:17:25AM -0700, Hoan Tran wrote:
> > > This patch adds the APM X-Gene hwmon device tree node documentation.
From: Thor Thayer
Separate the device match arrays for each platform to prevent
CycloneV matches when calling of_platform_populate() on the
Arria10 ECC manager node.
If the SDRAM is a child node of ECC manager, call probe function
via of_platform_populate().
Signed-off-by: Thor Thayer
---
driv
Hi Caesar,
On Wed, May 25, 2016 at 11:27:24AM +0800, Caesar Wang wrote:
> On 2016年05月24日 20:57, Javi Merino wrote:
> >On Tue, May 03, 2016 at 05:33:29PM +0800, Caesar Wang wrote:
> >>From: Sascha Hauer
> >>
> >>This adds support for hardware-tracked trip points to the device tree
> >>thermal sens
Hi Caesar,
On Wed, May 25, 2016 at 11:47:45AM +0800, Caesar Wang wrote:
> From: Sascha Hauer
>
> This adds support for hardware-tracked trip points to the device tree
> thermal sensor framework.
>
> The framework supports an arbitrary number of trip points. Whenever
> the current temperature is
From: Thor Thayer
Designate the ECC Manager as an interrupt controller and add child
interrupts.
Signed-off-by: Thor Thayer
---
.../bindings/arm/altera/socfpga-eccmgr.txt | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindi
On Wed, May 25, 2016 at 11:42:04AM +0100, Szabolcs Nagy wrote:
> On 24/05/16 01:04, Yury Norov wrote:
> > This version is based on kernel v4.6.
> > It works with glibc-2.23, and tested with LTP.
> >
> ...
> > ILP32 glibc branch is available here:
> > https://github.com/norov/glibc/tree/ilp32-2.23
From: Thor Thayer
Changes to support ECC Manager as SDRAM IRQ parent by
1) updating IRQ property values to correct child IRQs
2) moving node under ECC Manager.
Signed-off-by: Thor Thayer
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 13 +++--
1 file changed, 7 insertions(+), 6 deletio
From: Thor Thayer
The Arria10 IRQs for each peripheral ECC block funnel into 2 IRQs
[1 for single bit errors (SBERR) and 1 for double bit errors (DBERR)]
which are better handled by the IRQ controller and IRQ domain
framework than the IRQ handler in the current implementation.
The IRQ numbers (h
From: Thor Thayer
To better support child devices, the ECC manager needs to be
implemented as an IRQ controller.
Signed-off-by: Thor Thayer
---
drivers/edac/altera_edac.c | 162 +---
drivers/edac/altera_edac.h |5 +-
2 files changed, 125 insertions(
From: Thor Thayer
Changes to support IRQ controller implementation including adding
new property irq-controller to eccmgr and adding IRQ property
to children.
Signed-off-by: Thor Thayer
---
arch/arm/boot/dts/socfpga_arria10.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch
On Tue, May 24, 2016 at 09:54:31AM -0500, Tom Lendacky wrote:
> On 05/12/2016 01:20 PM, Tom Lendacky wrote:
> > On 05/10/2016 08:57 AM, Borislav Petkov wrote:
> >> On Tue, May 10, 2016 at 02:43:58PM +0100, Matt Fleming wrote:
> >>> Is it not possible to maintain some kind of kernel virtual address
From: Ganapatrao Kulkarni
The erratum fixes the hang of ITS SYNC command by avoiding inter node
io and collections/cpu mapping on thunderx dual-socket platform.
This fix is only applicable for Cavium's ThunderX dual-socket platform.
This is based on NUMA upstream patches (Linus tree
v4.6-10530-
Will, Marc,
On 22.04.16 10:00:52, Will Deacon wrote:
> On Fri, Apr 22, 2016 at 09:01:05AM +0100, Marc Zyngier wrote:
> > On 21/04/16 18:40, Robert Richter wrote:
> > > On 15.04.16 21:30:05, Robert Richter wrote:
> > >> From: Ganapatrao Kulkarni
> > >>
> > >> The erratum fixes the hang of ITS SYNC
On 24/05/16 01:04, Yury Norov wrote:
> This version is based on kernel v4.6.
> It works with glibc-2.23, and tested with LTP.
>
...
> ILP32 glibc branch is available here:
> https://github.com/norov/glibc/tree/ilp32-2.23
>
> It is tested with this series with no major downsides. I will send it to
Hi Dmitry,
On 05/23/2016 02:48 PM, R, Vignesh wrote:
>
>
> On 5/20/2016 10:04 PM, Dmitry Torokhov wrote:
>> On Thu, May 19, 2016 at 02:34:00PM +0530, Vignesh R wrote:
>>> There are rotary-encoders where GPIO lines reflect the actual position
>>> of the rotary encoder dial. For example, if dial p
On 05/24/2016 01:50 PM, Uwe Kleine-König wrote:
> Hello,
>
> On Tue, May 24, 2016 at 10:39:26AM +0530, Vignesh R wrote:
>> On 05/23/2016 06:48 PM, Uwe Kleine-König wrote:
>>> On Mon, May 23, 2016 at 04:48:40PM +0530, R, Vignesh wrote:
On 5/22/2016 3:56 PM, Uwe Kleine-König wrote:
> On T
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