On Tue, 1 Mar 2016, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
> enabled before data is stored in memory otherwise the ECC will fail
> on reads.
>
> Signed-off-by: Thor Thayer
> ---
> arch/arm/mach-socfpga
> -Original Message-
> From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
> ow...@vger.kernel.org] On Behalf Of Luis R. Rodriguez
> Sent: Friday, March 04, 2016 4:45 PM
> Subject: [PATCH v2] x86: PAT: Documentation: rewrite "MTRR effects on
> PAT / non-PAT systems"
...
> +MMIO a
On Thu, Feb 25, 2016 at 05:25:07PM -0600, Alan Tull wrote:
> Add bindings documentation for Altera SOCFPGA bridges:
> * fpga2sdram
> * fpga2hps
> * hps2fpga
> * lwhps2fpga
>
> Signed-off-by: Alan Tull
> Signed-off-by: Matthew Gerlach
> Signed-off-by: Dinh Nguyen
> ---
> v2: separate into 2
On Thu, Mar 03, 2016 at 03:38:35PM +, Ramesh Shanmugasundaram wrote:
> This patch adds support for the CAN FD controller found in Renesas R-Car
> SoCs. The controller operates in CAN FD mode by default.
>
> CAN FD mode supports both Classical CAN & CAN FD frame formats. The
> controller suppor
On Tue, Mar 01, 2016 at 10:38:18AM -0600, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> Add the device tree binding string needed to support the Altera L2
> cache on the Arria10 chip.
>
> Signed-off-by: Thor Thayer
> ---
> .../bindings/arm/altera/socfpga-eccmgr.txt |
Hi Arnd,
[auto build test WARNING on staging/staging-testing]
[also build test WARNING on v4.5-rc6 next-20160304]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Arnd-Bergmann/isdn-icn-remove
On Fri, Mar 04, 2016 at 04:03:04PM -0800, Paul E. McKenney wrote:
> On Fri, Mar 04, 2016 at 02:45:01PM -0800, Luis R. Rodriguez wrote:
> > The current documentation refers to using set_memory_wc() as a
> > possible hole strategy when you have overlapping ioremap() regions,
> > that's incorrect as s
On Fri, Mar 04, 2016 at 02:45:01PM -0800, Luis R. Rodriguez wrote:
> The current documentation refers to using set_memory_wc() as a
> possible hole strategy when you have overlapping ioremap() regions,
> that's incorrect as set_memory_*() helpers can only be used on RAM,
> not IO memory. Using set_
The current documentation refers to using set_memory_wc() as a
possible hole strategy when you have overlapping ioremap() regions,
that's incorrect as set_memory_*() helpers can only be used on RAM,
not IO memory. Using set_memory_wc() will not fail, that's a problem
which must be corrected in the
On Fri, Mar 04, 2016 at 08:23:26PM +0100, Luis R. Rodriguez wrote:
> On Thu, Mar 03, 2016 at 01:42:33PM -0800, Paul E. McKenney wrote:
> > On Thu, Mar 03, 2016 at 01:21:48PM -0800, Luis R. Rodriguez wrote:
> > > The current documentation refers to using set_memor_wc() as a
> > > possible hole strat
On Friday 04 March 2016 19:18:49 i...@linux-pingi.de wrote:
> Am 04.03.2016 um 16:24 schrieb Arnd Bergmann:
> > On Thursday 03 March 2016 09:30:38 i...@linux-pingi.de wrote:
> >> Hi Arnd,
> >> I fully agree and ack.
> >> Thanks for the work.
> >>
> >
> > I actually did more patches that I ended up
Hi Fu,
> From: Fu Wei
>
> This patchset:
> (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt
> for FDT info of SBSA Generic Watchdog, and give two examples of
> adding SBSA Generic Watchdog device node into the dts files:
> foundation-v8.dts and amd-seattle-so
On Thu, Mar 03, 2016 at 01:42:33PM -0800, Paul E. McKenney wrote:
> On Thu, Mar 03, 2016 at 01:21:48PM -0800, Luis R. Rodriguez wrote:
> > The current documentation refers to using set_memor_wc() as a
> > possible hole strategy when you have overlapping ioremap() regions,
> > that's incorrect as se
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Am 04.03.2016 um 16:24 schrieb Arnd Bergmann:
> On Thursday 03 March 2016 09:30:38 i...@linux-pingi.de wrote:
>> Hi Arnd,
>> I fully agree and ack.
>> Thanks for the work.
>>
>
> I actually did more patches that I ended up not submitting:
>
> * move hisax to staging
> * remove i4l support from gi
On Friday 04 March 2016 17:18:23 Paul Bolle wrote:
> [Added Tilman and Christoph.]
>
> On vr, 2016-03-04 at 16:24 +0100, Arnd Bergmann wrote:
> > I actually did more patches that I ended up not submitting:
> >
> > * move hisax to staging
> > * remove i4l support from gigaset
>
> For the record:
[Added Tilman and Christoph.]
On vr, 2016-03-04 at 16:24 +0100, Arnd Bergmann wrote:
> I actually did more patches that I ended up not submitting:
>
> * move hisax to staging
> * remove i4l support from gigaset
For the record: I have no reason to object a patch that does that. (I'm
not aware any
On 03/04/2016 05:03 AM, Aleksey Makarov wrote:
> Actually it was Mark Salter who asked to introduce such macros.
>
> https://lkml.kernel.org/g/1441730339.5459.8.ca...@redhat.com
I wasn't copied on that series, sorry.
> I think reusing the OF functions is a good decision.
But you're not reusin
On 03/04/2016 05:03 AM, Aleksey Makarov wrote:
>
>
> On 03/03/2016 08:48 PM, Peter Hurley wrote:
>> On 03/01/2016 08:57 AM, Aleksey Makarov wrote:
>>>
>>>
>>> On 03/01/2016 06:53 PM, Peter Hurley wrote:
On 02/29/2016 04:42 AM, Aleksey Makarov wrote:
> Add ACPI_DBG2_EARLYCON_DECLARE() mac
Hi Boris,
On 03/04/2016 04:38 AM, Borislav Petkov wrote:
On Tue, Mar 01, 2016 at 10:38:19AM -0600, ttha...@opensource.altera.com wrote:
From: Thor Thayer
Addition of the Arria10 L2 Cache ECC handling. The major
changes affect the L2 ECC registers not being grouped
together. The Arria10 IRQ st
On Thursday 03 March 2016 09:30:38 i...@linux-pingi.de wrote:
> Hi Arnd,
> I fully agree and ack.
> Thanks for the work.
>
I actually did more patches that I ended up not submitting:
* move hisax to staging
* remove i4l support from gigaset
* move i4l core to staging
while I initially thought t
On Friday 04 March 2016 07:10 PM, Laxman Dewangan wrote:
>
+#include
+#include
+#include
+
+#define MAX77620_NORMAL_OPERATING_TEMP 10
+#define MAX77620_TJALARM1_TEMP 12
+#define MAX77620_TJALARM1_TEMP 14
Oops, Second one is MAX77620_TJALARM2_TEMP.
Will send other
On Fri, Mar 04, 2016 at 09:59:50AM -0300, Mauro Carvalho Chehab wrote:
>
> 3) I tried to use a .. cssclass, as Johannes suggested, but
> I was not able to include the CSS file. I suspect that this is
> easy to fix, but I want to see if the cssclass will also work for
> the pdf output as well.
"cs
The series add the devm_ version of thermal_zone_of_sensor_register/unregister
and use this in new thermal driver for max77620.
The header file for max77620 is part of MFD patch
https://lkml.org/lkml/2016/2/11/186
Laxman Dewangan (3):
thermal: of-thermal: Add devm version of
thermal
thermal_zone_of_sensor_register() and thermal_zone_of_sensor_unregister()
gained their devm_ wrappers. Add these APIs in the list of managed devices.
Signed-off-by: Laxman Dewangan
---
Documentation/driver-model/devres.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/dri
Add resource managed version of thermal_zone_of_sensor_register() and
thermal_zone_of_sensor_unregister().
This helps in reducing the code size in error path, remove of
driver remove callbacks and making proper sequence for deallocations.
Signed-off-by: Laxman Dewangan
---
drivers/thermal/of-th
Maxim Semiconductor Max77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add thermal driver to register PMIC die temperature as thermal
zone sensor and capture the die temperature warning interrupts
to notifying the c
Hello, Haosdent.
Applied the patch to cgroup/for-4.6 but a couple things.
1. It probably would be better to use full name in your from address
or put an explicit From: header as that's what ends up as the
commit author. I hand edited it this time.
2. The patch is mime-encoded and whitespa
On 03/03/2016 08:48 PM, Peter Hurley wrote:
> On 03/01/2016 08:57 AM, Aleksey Makarov wrote:
>>
>>
>> On 03/01/2016 06:53 PM, Peter Hurley wrote:
>>> On 02/29/2016 04:42 AM, Aleksey Makarov wrote:
Add ACPI_DBG2_EARLYCON_DECLARE() macros that declares
an earlycon on the serial port speci
Em Fri, 04 Mar 2016 10:29:08 +0200
Jani Nikula escreveu:
> On Fri, 04 Mar 2016, Mauro Carvalho Chehab wrote:
> > Em Thu, 03 Mar 2016 15:23:23 -0800
> > Keith Packard escreveu:
> >
> >> Mauro Carvalho Chehab writes:
> >>
> >> > On my tests, Sphinix seemed too limited to format tables. Asci
On Thu, Feb 11, 2016 at 02:24:25PM -0500, Chris Metcalf wrote:
> On 01/30/2016 04:11 PM, Frederic Weisbecker wrote:
> >We have reverted the patch that made isolcpus |= nohz_full. Too
> >many people complained about unusable machines with NO_HZ_FULL_ALL
> >
> >But the user can still set that paramet
Add ade, dsi and adv7533 DT nodes for hikey board.
Signed-off-by: Xinliang Liu
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 40 +++
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 55 ++
2 files changed, 95 insertions(+)
diff --git a/arch/arm64/b
Add maintainer and reviewer for hisilicon DRM driver.
v7: None.
v6: None.
v5: None.
v4:
- Add Chen Feng as Designated reviewer.
v3: First version.
Signed-off-by: Xinliang Liu
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4978dc1
Add crtc funcs and helper funcs for ADE.
v7:
- A few Regs define clean up and typo fixs.
v6:
- Cleanup reg-names dt parsing.
v5:
- Use syscon to access ADE media NOC QoS registers instead of directly
writing registers.
- Use reset controller to reset ADE instead of directly writing registers.
v4
Add plane funcs and helper funcs for ADE.
v7: None.
v6: None.
v5: None.
v4: None.
v3:
- A few cleanup.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
---
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 535 +++-
1 file changed, 534 i
Add DesignWare dsi host driver for hi6220 SoC.
v7: None.
v6: None.
v5: None.
v4: None.
v3: None.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Reviewed-by: Archit Taneja
---
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 50
Add vblank irq handle.
v7:
- Fix irq flag "DRIVER_IRQF_SHARED" to "IRQF_SHARED".
v6: None.
v5: None.
v4: None.
v3:
- Remove hisi_get_crtc_from_index func.
- A few cleanup.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
---
drivers/gpu/drm/hisilicon/kirin/
Add support for external HDMI bridge.
v7: None.
v6: None.
v5: None.
v4: None.
v3:
- Fix a typo: s/exteranl/external.
v2:
- Remove abtraction layer.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Reviewed-by: Archit Taneja
---
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 52 +
Add cma Fbdev, Fbdev is legency and optional, you can enable/disable it by
configuring DRM_FBDEV_EMULATION.
Add hotplug.
v7: None.
v6: None.
v5: None.
v4: None.
v3: None.
v2:
- Use CONFIG_DRM_FBDEV_EMULATION instead of CONFIG_DRM_HISI_FBDEV.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Add DesignWare MIPI DSI Host Controller v1.02 encoder driver
for hi6220 SoC.
v7:
- A few regs define clean up.
v6:
- Change "pclk_dsi" to "pclk".
v5: None.
v4: None.
v3:
- Rename file name to dw_drm_dsi.c
- Make encoder type as DRM_MODE_ENCODER_DSI.
- A few cleanup.
v2:
- Remove abtraction layer.
Add kirin DRM master driver for hi6220 SoC which used in HiKey board.
Add dumb buffer feature.
Add prime dmabuf feature.
v7:
- Add config.mutex protection when accessing mode_config.connector_list.
- Clean up match data getting.
v6: None.
v5: None.
v4: None.
v3:
- Move and rename all the files to
Add ADE display controller binding doc.
Add DesignWare DSI Host Controller v1.20a binding doc.
v7: Acked by Rob Herring.
v6:
- Cleanup values part of reg and clocks properties.
- Change "pclk_dsi" clock name to "pclk".
v5:
- Remove endpoint unit address of dsi output port.
- Add "hisilicon,noc-sys
This patch set adds a new drm driver for HiSilicon Kirin hi6220 SoC.
Current testing and support board is Hikey board which is one of Linaro
96boards. It is an arm64 open source board. For more information about
this board, please access https://www.96boards.org.
Hardware Detail
---
On Tue, Mar 01, 2016 at 10:38:19AM -0600, ttha...@opensource.altera.com wrote:
> From: Thor Thayer
>
> Addition of the Arria10 L2 Cache ECC handling. The major
> changes affect the L2 ECC registers not being grouped
> together. The Arria10 IRQ status needs to be mapped into
> a different region.
On Fri, Mar 04, 2016 at 10:29:08AM +0200, Jani Nikula wrote:
> On Fri, 04 Mar 2016, Mauro Carvalho Chehab wrote:
> >
> > If, on the other hand, we decide to use RST, we'll very likely need to
> > patch it to fulfill our needs in order to add proper table support.
> > I've no idea how easy/difficul
On Fri, 04 Mar 2016, Mauro Carvalho Chehab wrote:
> Em Thu, 03 Mar 2016 15:23:23 -0800
> Keith Packard escreveu:
>
>> Mauro Carvalho Chehab writes:
>>
>> > On my tests, Sphinix seemed too limited to format tables. Asciidoc
>> > produced an output that worked better.
>>
>> Yes, asciidoc has m
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