On Thu, Mar 21, 2013 at 3:36 PM, Mike Turquette wrote:
> To my knowledge, devfreq performs one task: implements an algorithm
> (typically one that loops/polls) and applies this heuristic towards a
> dvfs transition.
>
> It is a policy layer, a high level layer. It should not be used as a
> lower-
changes since commit 76e10d158efb6d4516018846f60c2ab5501900bc:
Linux 3.4 (2012-05-20 15:29:13 -0700)
are available in the git repository at:
https://android.googlesource.com/kernel/common.git coupled-cpuidle
Colin Cross (4):
cpuidle: refactor out cpuidle_enter_state
cpuidle: fix error handling in __cpu
On Fri, Feb 10, 2012 at 11:32 AM, Rob Lee wrote:
> Maintainers for drivers/cpuidle, do you have any comments/opinions
> about this patch?
>
> Intel cpuidle and acpi cpuidle maintainers, do you have any
> comments/opinions about this patch and the changes to your code?
>
> Any other review and comm
On Sat, Feb 4, 2012 at 2:06 PM, Turquette, Mike wrote:
> On Sat, Feb 4, 2012 at 11:02 AM, Colin Cross wrote:
>> What's the point of the pre_enter call? This seems very similar to
>> the prepare call that was removed in 3.2. Drivers can already demote
>
> Hi Co
On Tue, Jan 31, 2012 at 7:00 PM, Robert Lee wrote:
> Make necessary changes to add implement time keepign and irq enabling
keeping
> in the core cpuidle code. This will allow the remove of these
> functionalities from the platform cpuidle implementations.
>
> Signed-off-by: Robert Lee
> ---
> d
On Thu, Jul 21, 2011 at 10:10 PM, Santosh Shilimkar
wrote:
> On 7/22/2011 12:36 AM, Colin Cross wrote:
>>
>> On Thu, Jul 21, 2011 at 3:46 AM, Santosh Shilimkar
>> wrote:
>>>
>>> On 7/21/2011 3:57 PM, Lorenzo Pieralisi wrote:
>>>>
>>>&
On Thu, Jul 21, 2011 at 3:46 AM, Santosh Shilimkar
wrote:
> On 7/21/2011 3:57 PM, Lorenzo Pieralisi wrote:
>>
>> On Thu, Jul 21, 2011 at 09:32:12AM +0100, Santosh Shilimkar wrote:
>>>
>>> Lorenzo, Colin,
>>>
>>> On 7/7/2011 9:20 PM, L
On Mon, Jul 11, 2011 at 12:19 PM, Russell King - ARM Linux
wrote:
> On Mon, Jul 11, 2011 at 11:51:00AM -0700, Colin Cross wrote:
>> On Mon, Jul 11, 2011 at 11:40 AM, Russell King - ARM Linux
>> wrote:
>> > On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi
On Mon, Jul 11, 2011 at 11:40 AM, Russell King - ARM Linux
wrote:
> On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
>> Well, short answer is no. On SMP we do need to save CPU registers
>> but if just one single cpu is shutdown L2 is still on.
>> cpu_suspend saves regs on the sta
On Sat, Jul 9, 2011 at 4:05 PM, Russell King - ARM Linux
wrote:
> On Sat, Jul 09, 2011 at 04:01:19PM -0700, Colin Cross wrote:
>> On Sat, Jul 9, 2011 at 3:33 PM, Russell King - ARM Linux
>> wrote:
>> > On Sat, Jul 09, 2011 at 03:10:56PM -0700, Colin Cross wrote:
>
On Sat, Jul 9, 2011 at 3:33 PM, Russell King - ARM Linux
wrote:
> On Sat, Jul 09, 2011 at 03:10:56PM -0700, Colin Cross wrote:
>> This is necessary for cpuidle states that lose the GIC registers, not
>> just suspend, because the GIC is in the cpu's power domain. We could
On Sat, Jul 9, 2011 at 3:21 AM, Russell King - ARM Linux
wrote:
> On Thu, Jul 07, 2011 at 04:50:16PM +0100, Lorenzo Pieralisi wrote:
>> From: Colin Cross
>>
>> When the cpu is powered down in a low power mode, the gic cpu
>> interface may be reset, and when the cpu
On Sat, Jul 9, 2011 at 3:15 AM, Russell King - ARM Linux
wrote:
> On Thu, Jul 07, 2011 at 04:50:15PM +0100, Lorenzo Pieralisi wrote:
>> During some CPU power modes entered during idle, hotplug and
>> suspend, peripherals located in the CPU power domain, such as
>> the GIC and VFP, may be powered d
On Thu, Jul 7, 2011 at 6:35 PM, Santosh Shilimkar
wrote:
> On 7/7/2011 8:50 AM, Lorenzo Pieralisi wrote:
>>
>> From: Colin Cross
>>
>> When the cpu is powered down in a low power mode, the gic cpu
>> interface may be reset, and when the cpu complex is powered
>
adding Rafael, since he was interested in cpu_pm notifiers.
On Thu, Jul 7, 2011 at 8:50 AM, Lorenzo Pieralisi
wrote:
> This patch adds notifiers to manage low-power entry/exit in a platform
> independent manner through a series of callbacks.
> The goal is to enhance CPU specific notifiers with a
E_PA);
> + start += CACHE_LINE_SIZE;
> + }
> + }
> + /*
> + * disable the cache implicitly syncs
> + */
> + writel_relaxed(0, l2x0_base + L2X0_CTRL);
> +}
> +
Tested just this patch on Tegra to avoid flushing the whole L2 on idle, so:
Tested-by: Colin Cross
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