>> adrp Xn, dest
>> add Xn, Xn, :lo12:dest
>> blr Xn
>>
>
> I don't suppose the branch predictor would like that very much,
> though. Can't you keep the original arrangement, and use this sequence
> instead? Or use the new sequence unconditionally, but nop out the add
> instruction and change
On 7 December 2015 at 14:53, Edward Nevill wrote:
>> adrp, x0, dest
>> add x0, x0, #:lo12:dest
>
> Thanks! Thats the syntax I wanted.
>
> The use case is I want to benchmark this as a way of generating far
> calls, for use within the JIT for when code cache becomes > 128m.
>
> At the moment we gen
> adrp, x0, dest
> add x0, x0, #:lo12:dest
Thanks! Thats the syntax I wanted.
The use case is I want to benchmark this as a way of generating far
calls, for use within the JIT for when code cache becomes > 128m.
At the moment we generate trampolines
tramp:
ldr Xn, here
br Xn
here
.dword d
On 7 December 2015 at 14:40, Ard Biesheuvel wrote:
> On 7 December 2015 at 11:51, Edward Nevill wrote:
>> Hi,
>>
>> Does anyone know how I do
>>
>> adrp x0, dest & ~0xfff
>> add x0, x0, dest & 0xfff
>>
>> in aarch64 assembler?
>>
>
> You can't. ADRP is PC relative, but rounded to page
On 7 December 2015 at 11:51, Edward Nevill wrote:
> Hi,
>
> Does anyone know how I do
>
> adrp x0, dest & ~0xfff
> add x0, x0, dest & 0xfff
>
> in aarch64 assembler?
>
You can't. ADRP is PC relative, but rounded to page granularity, so
you can't use it for arbitrary expressions against
On Mon, 2015-12-07 at 10:51 +, Edward Nevill wrote:
> Hi,
>
> Does anyone know how I do
>
> adrp x0, dest & ~0xfff
> add x0, x0, dest & 0xfff
>
> in aarch64 assembler?
Guessing here from experience with 32-bit ARM...
adr x0, dest
and the assembler with generate the ins
Hi,
Does anyone know how I do
adrp x0, dest & ~0xfff
add x0, x0, dest & 0xfff
in aarch64 assembler?
Thanks for your help,
Ed.
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