On 04/09/2014 02:19 PM, Sandeep Tripathy wrote:
Hi Daniel,
Just for test you may try removing the flush_cache_louis();
from __cpu_suspend_save .
Because if the driver is using cpu_suspend() in idle path then
almost all the important data on core L1 is clean.
Still it can fai
Hi Daniel,
Just for test you may try removing the flush_cache_louis();
from __cpu_suspend_save
.
Because if the driver is using cpu_suspend() in idle path then almost
all the important data on core L1 is clean.
Still it can fail iff the code after that ( cpu_suspend()) modifies
s
Hi Sandeep,
On 04/09/2014 07:15 AM, Sandeep Tripathy wrote:
Hi Daniel,
- L1 D$ clean ( SCTLR C bit clear, DCCISW, clear SMP) is part
of the recommended sequence for Individual core power down .
Yes, absolutely. It is what Lorenzo and I discussed.
The macro v7_exit_cohere
