Hi,
I have some doubts on backup and restore operation. From what i understand:
We copy all registers values & addresses of all controllers in the SOC
to the internal RAM or SRAM.
before we put CPU to sleep?
I want to know if we also copy the code segment into SRAM and what
happens after wakeup.
Adding more relevant list in cc.
On 23 July 2013 16:05, Ryan wrote:
> Hi,
>
> I have some doubts on backup and restore operation. From what i understand:
>
> We copy all registers values & addresses of all controllers in the SOC
> to the internal RAM or SRAM.
> before we put CPU to sleep?
>
> I w
Hi all,
Just a reminder that this is happening tomorrow unless anyone shouts now. I've
off lined fast models and all vexpress boards already because they take longer
to clear the queue.
Please shout now if this is a problem for you.
Thanks
Dave
On 22 Jul 2013, at 14:02, Dave Pigott wrote:
On Mon, Jul 22, 2013 at 8:56 PM, Yoder Stuart-B08248
wrote:
> Is there a written spec or description of how a boot program (u-boot, UEFI,
> hypervisor) boots an OS on ARM platforms?
>
> ePAPR-type device trees are used to describe a platform, but what
> about the type of information in sections 5.
On Mon, 2013-07-22 at 19:56 +, Yoder Stuart-B08248 wrote:
> Is there a written spec or description of how a boot program (u-boot, UEFI,
> hypervisor) boots an OS on ARM platforms?
There's some information in the Linux source in the file
Documentation/arm/Booting.
--
Tixy
__
On 07/19/2013 08:39 PM, Rajiv Nishtala wrote:
> Hi,
>
> My name is Rajiv Nishtala and I am PhD student at UPC, Barcelona.
>
> I am trying to run some benchmarks on the arndale board and measure the
> power reading from it.
>
> is there a way to measure the power from the board directly, I tried
Noted.
All, please note that we are now putting this off until Friday. All boards will
now be online again.
Thanks
Dave
On 23 Jul 2013, at 16:27, Khasim Syed Mohammed
wrote:
> ++ Shou :)
>
> Hi Dave,
>
> Sorry for last min shout. We have a release this week and we are running our
> r
++ Shou :)
Hi Dave,
Sorry for last min shout. We have a release this week and we are running
our release testing on LAVA this will be complete by Thursday noon. I
request you to take this up on Friday.
Thanks for the support
Regards,
Khasim
On 23 July 2013 20:11, Dave Pigott wrote:
> Hi
Thanks for the references.
Stuart
> -Original Message-
> From: glik...@secretlab.ca [mailto:glik...@secretlab.ca] On Behalf Of Grant
> Likely
> Sent: Tuesday, July 23, 2013 7:04 AM
> To: Peter Maydell
> Cc: Yoder Stuart-B08248; boot-architect...@lists.linaro.org;
> linaro-dev@lists.lina
On Tue, Jul 23, 2013 at 12:39 PM, Peter Maydell
wrote:
> On 23 July 2013 12:33, Grant Likely wrote:
>> Historically each ARM SoC did its own thing for secondary CPU startup.
>> New platforms are expected to use the PSCI spec (which unfortunately
>> isn't an open document, but ARM partners can get
On 23 July 2013 12:33, Grant Likely wrote:
> Historically each ARM SoC did its own thing for secondary CPU startup.
> New platforms are expected to use the PSCI spec (which unfortunately
> isn't an open document, but ARM partners can get access).
>
> http://infocenter.arm.com/help/index.jsp?topic=
On Tue, 2013-07-23 at 09:16 +0100, Jon Medhurst (Tixy) wrote:
> On Mon, 2013-07-22 at 19:56 +, Yoder Stuart-B08248 wrote:
> > Is there a written spec or description of how a boot program (u-boot, UEFI,
> > hypervisor) boots an OS on ARM platforms?
>
> There's some information in the Linux sour
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