On 03/15/2012 06:53 AM, Minkyu Kang wrote:
> Dear Chander Kashyap,
>
> On 14 March 2012 22:38, Chander Kashyap wrote:
>> Hi Kyungmin Park,
>>
>> On 14 March 2012 19:02, Kyungmin Park wrote:
>>> Hi Chander,
>>>
>>> On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
>>> wrote:
TZPC IP is comm
TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc.
Signed-off-by: Chander Kashyap
---
Changes in V2:
- Renaming i
Dear Minkyu,
On 15 March 2012 06:53, Minkyu Kang wrote:
> Dear Chander Kashyap,
>
> On 14 March 2012 22:38, Chander Kashyap wrote:
>> Hi Kyungmin Park,
>>
>> On 14 March 2012 19:02, Kyungmin Park wrote:
>>> Hi Chander,
>>>
>>> On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
>>> wrote:
T
Dear Chander Kashyap,
On 14 March 2012 22:38, Chander Kashyap wrote:
> Hi Kyungmin Park,
>
> On 14 March 2012 19:02, Kyungmin Park wrote:
>> Hi Chander,
>>
>> On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
>> wrote:
>>> TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tz
On Tue, Mar 13, 2012 at 5:05 AM, Sascha Hauer wrote:
> On Mon, Mar 12, 2012 at 08:16:36PM -0700, Turquette, Mike wrote:
>> On Mon, Mar 12, 2012 at 4:51 AM, Sascha Hauer wrote:
>> > I tried another
>> > approach on the weekend which basically does not try to do all in a
>> > single recursion but i
On Wed, 14 Mar 2012, Turquette, Mike wrote:
> On Wed, Mar 14, 2012 at 2:28 PM, Thomas Gleixner wrote:
> > So the right way to deal with it is to have an array of valid names
> > with no holes and NULL pointers allowed and have a mapping from the
> > array index to the register value.
>
> This is
On Wed, 14 Mar 2012, Turquette, Mike wrote:
Could you folks please trim your replies? It's annoying to page down a
gazillion of lines to find the gist.
> On Wed, Mar 14, 2012 at 1:48 AM, Sascha Hauer wrote:
> >> Also, do you forsee needing hole in parent_names for any reason other
> >> than desc
On Wed, Mar 14, 2012 at 2:28 PM, Thomas Gleixner wrote:
> On Wed, 14 Mar 2012, Turquette, Mike wrote:
>
> Could you folks please trim your replies? It's annoying to page down a
> gazillion of lines to find the gist.
Sure. My mailer does this for me so I forget to do it sometimes...
>> On Wed, M
On Wed, Mar 14, 2012 at 1:48 AM, Sascha Hauer wrote:
> On Tue, Mar 13, 2012 at 04:43:57PM -0700, Turquette, Mike wrote:
>> On Tue, Mar 13, 2012 at 4:24 AM, Sascha Hauer wrote:
>> > On Sat, Mar 03, 2012 at 12:29:00AM -0800, Mike Turquette wrote:
>> >> The common clock framework defines a common st
Hi,
I am currently playing with a couple of the development boards for which
there are Linaro hwpacks and LEBs. Since what I am trying to do requires
a lot of disk and network I/O, I've been paying special attention to the
data transfer rates I can get out of these boards.
Below is a brief summar
Located in ppa:linaro-maintainers/tools can be found the newest
version of live-build, a45 with the following linaro features
applied:
1) armhf support (both native and cross)
2) linaro meta bld information as was discussed at 4Q11 Linaro Connect
3) cross support using multistrap
Live build a45
On 03/14/2012 01:23 PM, Sascha Hauer wrote:
> On Fri, Mar 09, 2012 at 11:54:24PM -0800, Mike Turquette wrote:
>> Many platforms support simple gateable clocks, fixed-rate clocks,
>> adjustable divider clocks and multi-parent multiplexer clocks.
>>
>> This patch introduces basic clock types for the
On Fri, Mar 09, 2012 at 11:54:24PM -0800, Mike Turquette wrote:
> Many platforms support simple gateable clocks, fixed-rate clocks,
> adjustable divider clocks and multi-parent multiplexer clocks.
>
> This patch introduces basic clock types for the above-mentioned hardware
> which share some commo
Hi,
On Mon, Mar 12 2012, Rajendra Nayak wrote:
> The series adds device tree support for OMAP hsmmc
> driver.
>
> Changes in V2:
> -1- Minor fixes based on comments from Grant.
> -2- Added a seperate compatible for omap3.
> -3- Added a new binding "ti,needs-special-reset"
> to handle some mmc modu
On 14 March 2012 14:01, 周春华 wrote:
> I got a job that should log the RAM memory access in the QEMU. First, I
> should find out the code line in QEMU to trap all RAM memory access. After
> some efforts, I have some conclusions:
>
> 1. I have found the function dealing with the translation from the
Dear linus.walleij,
I am sorry to trouble you. Would you mind give a hand?
I got a job that should log the RAM memory access in the QEMU. First, I
should find out the code line in QEMU to trap all RAM memory access. After
some efforts, I have some conclusions:
1. I have found the function dealin
Hi Kyungmin Park,
On 14 March 2012 19:02, Kyungmin Park wrote:
> Hi Chander,
>
> On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
> wrote:
>> TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
>> in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
>
Hi Chander,
On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
wrote:
> TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
> in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
> usase of tzpc.
>
> Also modify board/samsung/smdk5250/tzpc_init.c to use
TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use s5p_tzpc.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos
On Wed, Mar 14, 2012 at 10:29:12AM +0800, Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)"
>
> Anatop is an integrated regulator inside i.MX6 SoC.
> There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
> And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
Hi Mike,
> +static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
> + unsigned long *best_parent_rate)
> +{
> + struct clk_divider *divider = to_clk_divider(hw);
> + int i, bestdiv = 0;
> + unsigned long parent_rate, best = 0, now, maxdiv;
> +
> + maxdiv
On Tue, Mar 13, 2012 at 04:43:57PM -0700, Turquette, Mike wrote:
> On Tue, Mar 13, 2012 at 4:24 AM, Sascha Hauer wrote:
> > On Sat, Mar 03, 2012 at 12:29:00AM -0800, Mike Turquette wrote:
> >> The common clock framework defines a common struct clk useful across
> >> most platforms as well as an im
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