On Thu, 2012-03-01 at 16:59 +, Turgis, Frederic wrote:
> Wrong Dave, I meant Dave Long ;-)
>
> OMAP Platform Business Unit - OMAP System Engineering - Platform Enablement -
> System Multimedia
>
>
> > Hi Dave,
> >
> > By the way, in
> > http://lists.linaro.org/pipermail/linaro-dev/2011-Sep
On Mon, Mar 05, 2012 at 11:07:28PM +0800, Ying-Chun Liu (PaulLiu) wrote:
...
> +MODULE_AUTHOR("Nancy Chen ");
> +MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) ");
I meant something like:
MODULE_AUTHOR("Nancy Chen , "
"Ying-Chun Liu (PaulLiu) ");
Otherwise:
Acked-by: Shawn Guo
> +MODULE
On 03/01/2012 09:57 PM, Rob Lee wrote:
On Wed, Feb 29, 2012 at 6:42 PM, Robert Lee wrote:
This patch series moves various functionality duplicated in platform
cpuidle drivers to the core cpuidle driver. Also, the platform irq
disabling was removed as it appears that all calls into
cpuidle_call_
On Tue, Mar 6, 2012 at 12:45 AM, Alexander Sack wrote:
> On Sun, Mar 4, 2012 at 11:02 PM, Michael Hope
> wrote:
>>
>> I'd like to have one KVM kernel image which is suitable for the real
>> hardware host and the virtio based guest. The single zImage plus
>> Device Tree work seem like a great way
On Sun, Mar 4, 2012 at 11:38 PM, Sascha Hauer wrote:
> On Sun, Mar 04, 2012 at 04:12:21PM -0800, Turquette, Mike wrote:
>> >>
>> >> I believe this patch already does what you suggest, but I might be
>> >> missing your point.
>> >
>> > In include/linux/clk-private.h you expose struct clk outside th
On Sun, Mar 4, 2012 at 6:04 PM, Richard Zhao wrote:
> On Sat, Mar 03, 2012 at 12:28:59AM -0800, Mike Turquette wrote:
>> The common clk framework provides clk_prepare and clk_unprepare
>> implementations. Create an entry for HAVE_CLK_PREPARE so that
>> COMMON_CLK can select it.
>>
>> Signed-off-b
From: "Ying-Chun Liu (PaulLiu)"
Anatop is an integrated regulator inside i.MX6 SoC.
There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
This patch adds the Anatop regulator driver.
Signed-off-by: Nancy Chen
Signed-of
From: "Ying-Chun Liu (PaulLiu)"
Anatop is a mfd chip embedded in Freescale i.MX6Q SoC.
Anatop provides regulators and thermal.
This driver handles the address space and the operation of the mfd device.
Signed-off-by: Ying-Chun Liu (PaulLiu)
Acked-by: Shawn Guo
Cc: Samuel Ortiz
Cc: Mark Brown
On Sun, Mar 4, 2012 at 11:02 PM, Michael Hope wrote:
> I'd like to have one KVM kernel image which is suitable for the real
> hardware host and the virtio based guest. The single zImage plus
> Device Tree work seem like a great way to do this.
>
> We're currently using the vexpress-a15 on a Fast
> > I think i can wrap your simple gate clock, to make my "complex" gate
> > clock. What would help is if you would EXPORT_SYMBOL_GPL
> > clk_gate_enable() and clk_gate_disable(), since they do exactly what i
> > want. I can then build my own clk_ops structure, with my own
> > unprepare() function.
On Sun, Mar 04, 2012 at 04:12:21PM -0800, Turquette, Mike wrote:
> >>
> >> I believe this patch already does what you suggest, but I might be
> >> missing your point.
> >
> > In include/linux/clk-private.h you expose struct clk outside the core.
> > This has to be done to make static initializers p
On Mon, Mar 05, 2012 at 09:48:23AM +0100, Andrew Lunn wrote:
> On Sun, Mar 04, 2012 at 04:30:08PM -0800, Turquette, Mike wrote:
> > On Sun, Mar 4, 2012 at 9:42 AM, Andrew Lunn wrote:
> > > On Sat, Mar 03, 2012 at 12:29:01AM -0800, Mike Turquette wrote:
> > >> Many platforms support simple gateable
Hi Mike,
On Sat, Mar 03, 2012 at 12:29:00AM -0800, Mike Turquette wrote:
[snip]
> +static void __clk_disable(struct clk *clk)
> +{
> + if (!clk)
> + return;
> +
> + if (WARN_ON(clk->enable_count == 0))
> + return;
> +
> + if (--clk->enable_count > 0)
> +
On 3 March 2012 23:34, Guenter Roeck wrote:
> On Sat, Mar 03, 2012 at 11:44:10AM -0500, Mark Brown wrote:
>> On Sat, Mar 03, 2012 at 04:36:05PM +0530, Amit Daniel Kachhap wrote:
>> > This movement is needed because the hwmon entries and corresponding
>> > sysfs interface is a duplicate of utilitie
> -Original Message-
> From: Heiko Stubner
> Sent: Friday, March 02, 2012 12:24 AM
> To: linux-arm-ker...@lists.infradead.org
> Cc: Jingoo Han; linux-...@vger.kernel.org; linux-samsung-...@vger.kernel.org;
> 'Kukjin Kim'; linaro-
> d...@lists.linaro.org; 'Joonyoung Shim'; patc...@linaro.or
On Sun, Mar 04, 2012 at 04:30:08PM -0800, Turquette, Mike wrote:
> On Sun, Mar 4, 2012 at 9:42 AM, Andrew Lunn wrote:
> > On Sat, Mar 03, 2012 at 12:29:01AM -0800, Mike Turquette wrote:
> >> Many platforms support simple gateable clocks, fixed-rate clocks,
> >> adjustable divider clocks and multi-
DMA burst support is added to improve performance in EHCI data
transfer. The USB EHCI controller on Exynos SoCs can use INCR16,
INCR8, and INCR4 mode. These modes of INSNREG00 register should
be set in order to enable DMA burst transfer. This feature is
also related to AHB spec.
Signed-off-by: Jin
On 3 March 2012 17:51, Sylwester Nawrocki wrote:
> On 03/03/2012 12:06 PM, Amit Daniel Kachhap wrote:
>>
>> This movement is needed because the hwmon entries and corresponding
>> sysfs interface is a duplicate of utilities already provided by
>> driver/thermal/thermal_sys.c. The goal is to place i
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