Re: export kernel clock information to user space

2010-10-15 Thread Sundar
On Sat, Oct 16, 2010 at 5:25 AM, Kevin Hilman wrote: > [..] > > That being said, I'm not against $SUBJECT patch, but I question it's > usefulness in terms of PM.  What's more valuable for PM is the statitics > and knobs exported on a per-device level by the runtime PM core (and > AFAICT, already i

Re: SD/MMC for i.MX51

2010-10-15 Thread Nicolas Pitre
On Tue, 12 Oct 2010, Amit Kucheria wrote: > Nico, > > Yes it has been reviewed several times now. So I'm hopeful it'll go in > for the next merge window. It will. They're merged in cjb's tree now. And I've picked them up, plus a few others. Compile tested only as I don't have the hardware.

RE: userspace access to cache geometry information

2010-10-15 Thread Woodruff, Richard
> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev- > boun...@lists.linaro.org] On Behalf Of Peter Maydell > One of the Valgrind subtools is Cachegrind; this is a cache > profiler. (It simulates the I1, D1 and L2 caches so it can > pinpoint the sources of cache misses in application co

Re: export kernel clock information to user space

2010-10-15 Thread Kevin Hilman
Amit Kucheria writes: > Adding linaro-dev to cc. Kernel consolidation WG might have comments. > > On Tue, Oct 12, 2010 at 9:04 AM, Yong Shen wrote: >> Hi Amit and Jeremy, >> >> This is not a patch review. But patch may better present my idea. Basically, >> I want to add some code in common clock

otes & Actions: Linaro User Platform Weekly Status Meeting 10/13

2010-10-15 Thread Tom Gall
Greetings, Enclosed you'll find a link to the agenda, notes and actions from the Linaro User Platforms Weekly Status meeting dated October 13th held in #linaro-meeting on irc.freenode.net at 13:00 UTC. https://wiki.linaro.org/Platform/UserPlatforms/WeeklyStatus/2010-10-13 Regards, Tom (tgall_foo

Re: userspace access to cache geometry information

2010-10-15 Thread Dave Martin
On Fri, Oct 15, 2010 at 2:49 PM, Peter Maydell wrote: > One of the Valgrind subtools is Cachegrind; this is a cache > profiler. (It simulates the I1, D1 and L2 caches so it can > pinpoint the sources of cache misses in application code.) > > On x86 Cachegrind automatically queries the host CPU to

Re: userspace access to cache geometry information

2010-10-15 Thread Dave Martin
On Fri, Oct 15, 2010 at 2:49 PM, Peter Maydell wrote: > One of the Valgrind subtools is Cachegrind; this is a cache > profiler. (It simulates the I1, D1 and L2 caches so it can > pinpoint the sources of cache misses in application code.) > > On x86 Cachegrind automatically queries the host CPU to

Linaro Infrastructure Team Weekly Report (2010-10-07 to 2010-10-13)

2010-10-15 Thread Ian Smith
All, The weekly report for the Linaro Infrastructure team may be found at:- Status report: https://wiki.linaro.org/Platform/Infrastructure/Status/2010-10-14 Burndown chart:http://people.canonical.com/~pitti/workitems/maverick/lin

userspace access to cache geometry information

2010-10-15 Thread Peter Maydell
One of the Valgrind subtools is Cachegrind; this is a cache profiler. (It simulates the I1, D1 and L2 caches so it can pinpoint the sources of cache misses in application code.) On x86 Cachegrind automatically queries the host CPU to find out what sort/size of cache it has installed, and by defaul