The patch follows the qualcomm code comments setting
SSUSB_CTRL_TEST_POWERDOWN to 0x1 and is testing and clearing the
bit during USB superspeed PHY init. According to Andy Gross it
needs to be BIT(26).
Signed-off-by: Thomas Reifferscheid
Acked-by: Andy Gross
---
Changes sinve v4:
* Consult aut
On 2017-04-03 16:03, Tim Harvey wrote:
Hi Tim,
Also apologies for the late reply.
It's also a very busy period here :)
It also took some time to retest this issue list again using todays
trunk version (4.9.20 kernel)
When the IMX6 PCIe host controller uses MSI legacy interrupts stop
work
On Fri, Apr 7, 2017 at 8:31 AM, Koen Vandeputte
wrote:
>
>
> On 2017-04-03 16:03, Tim Harvey wrote:
>
>
> Hi Tim,
>
> Also apologies for the late reply.
> It's also a very busy period here :)
>
> It also took some time to retest this issue list again using todays trunk
> version (4.9.20 kernel)
>
