On Thu, Jun 23, 2011 at 11:38:54AM -0400, David Woodhouse wrote:
> On Thu, 2011-06-23 at 17:31 +0200, Joerg Roedel wrote:
> > David, I think especially VT-d can benefit from such a callback. I will
> > implement support for it in the AMD IOMMU driver and post a patch-set
> > soon.
> >
> > Any comm
On Thu, Jun 23, 2011 at 01:20:53PM -0400, Chris Wright wrote:
> * David Woodhouse (dw...@infradead.org) wrote:
> > I'd much rather KVM just gave us a list of the pages to map, in a single
> > call.
>
> This makes most sense to me.
But how is this supposed to work with arbitrary page-sizes? When w
On Mon, Jun 27, 2011 at 02:19:46PM -0400, Jan Kiszka wrote:
> From: Jan Kiszka
>
> Link it is already handling in upstream, this feature can be controlled
> via -cpu ...+/-svm.
>
> CC: Joerg Roedel
> Signed-off-by: Jan Kiszka
> ---
> qemu-kvm.h |7 ---
> qemu-options.hx |
On Wed, Jun 29, 2011 at 05:02:54AM -0400, Peter Zijlstra wrote:
> On Tue, 2011-06-28 at 18:10 +0200, Joerg Roedel wrote:
> > On Fri, Jun 17, 2011 at 03:37:29PM +0200, Joerg Roedel wrote:
> > > this is the second version of the patch-set to support the AMD
> > > guest-/host only bits in the performa
On Fri, Jul 29, 2011 at 05:01:16AM -0400, Zachary Amsden wrote:
> So you are right, this is still wrong for the case in which L1 does
> not trap TSC MSR reads. Note however, the RDTSC instruction is still
> virtualized properly, it is only the relatively rare actual TSC MSR
> read via RDMSR which
On Thu, Jul 28, 2011 at 04:36:17AM -0400, Avi Kivity wrote:
> Architecturally, PDPTEs are cached in the PDPTRs when CR3 is reloaded.
> On SVM, it is not possible to implement this, but on VMX this is possible
> and was indeed implemented until nested SVM changed this to unconditionally
> read PDPTE
On Sun, Jul 31, 2011 at 04:08:44AM -0400, Avi Kivity wrote:
> On 07/29/2011 02:31 PM, Roedel, Joerg wrote:
> > On Thu, Jul 28, 2011 at 04:36:17AM -0400, Avi Kivity wrote:
> > > Architecturally, PDPTEs are cached in the PDPTRs when CR3 is reloaded.
> > > On SVM, it i
On Tue, Aug 02, 2011 at 08:34:32AM -0400, Avi Kivity wrote:
> On 08/02/2011 12:31 PM, Roedel, Joerg wrote:
> > On Sun, Jul 31, 2011 at 04:08:44AM -0400, Avi Kivity wrote:
> > > On 07/29/2011 02:31 PM, Roedel, Joerg wrote:
> > > > On Thu, Jul 28, 2011 at 04:3
On Tue, Aug 02, 2011 at 08:34:32AM -0400, Avi Kivity wrote:
> On 08/02/2011 12:31 PM, Roedel, Joerg wrote:
> > On Sun, Jul 31, 2011 at 04:08:44AM -0400, Avi Kivity wrote:
> > > On 07/29/2011 02:31 PM, Roedel, Joerg wrote:
> > > > On Thu, Jul 28, 2011 at 04:3
On Mon, Aug 22, 2011 at 06:51:35AM -0400, Avi Kivity wrote:
> On 08/22/2011 01:46 PM, Joerg Roedel wrote:
> > That does not work. The bridge in question may not even be visible as a
> > PCI device, so you can't link to it. This is the case on a few PCIe
> > cards which only have a PCIx chip and a P
On Mon, Aug 22, 2011 at 08:42:35AM -0400, Avi Kivity wrote:
> On 08/22/2011 03:36 PM, Roedel, Joerg wrote:
> > On the AMD IOMMU side this information is stored in the IVRS ACPI table.
> > Not sure about the VT-d side, though.
>
> I see. There is no sysfs node represen
On Mon, Aug 22, 2011 at 09:06:07AM -0400, Avi Kivity wrote:
> On 08/22/2011 03:55 PM, Roedel, Joerg wrote:
> > Well, I don't think its really meaningless, but we need some way to
> > communicate the information about device groups to userspace.
>
> I mean the conten
On Mon, Aug 22, 2011 at 09:17:41AM -0400, Avi Kivity wrote:
> On 08/22/2011 04:15 PM, Roedel, Joerg wrote:
> > On Mon, Aug 22, 2011 at 09:06:07AM -0400, Avi Kivity wrote:
> > > On 08/22/2011 03:55 PM, Roedel, Joerg wrote:
> >
> > > > Well, I don't think
(Back from vacation)
On Thu, Aug 16, 2012 at 01:59:02PM +0300, Avi Kivity wrote:
> Ok. Please check that ~KVM_XSTATE_LAZY expands to 64-bits correctly,
> maybe we need to cast it to u64 before negating it.
>
> Note that we limit xcr0 to the bits allowed by the host, so the currect
> kernel is sa
On Mon, Aug 20, 2012 at 01:08:14PM +0300, Avi Kivity wrote:
> On 08/20/2012 12:24 PM, Roedel, Joerg wrote:
> So it was broken all along? Yikes.
There is no LWP support in the kernel and thus KVM can't expose it to
guests. So for now nothing should be broken, no?
Jo
On Mon, Aug 20, 2012 at 01:43:10PM +0300, Avi Kivity wrote:
> On 08/20/2012 01:14 PM, Roedel, Joerg wrote:
> > On Mon, Aug 20, 2012 at 01:08:14PM +0300, Avi Kivity wrote:
> >> On 08/20/2012 12:24 PM, Roedel, Joerg wrote:
> >
> >> So it was broken all along?
On Mon, Aug 22, 2011 at 05:03:53PM -0400, Benjamin Herrenschmidt wrote:
>
> > I am in favour of /dev/vfio/$GROUP. If multiple devices should be
> > assigned to a guest, there can also be an ioctl to bind a group to an
> > address-space of another group (certainly needs some care to not allow
> > t
On Mon, Aug 22, 2011 at 03:17:00PM -0400, Alex Williamson wrote:
> On Mon, 2011-08-22 at 19:25 +0200, Joerg Roedel wrote:
> > I am in favour of /dev/vfio/$GROUP. If multiple devices should be
> > assigned to a guest, there can also be an ioctl to bind a group to an
> > address-space of another gro
On Tue, Aug 23, 2011 at 01:08:29PM -0400, Alex Williamson wrote:
> On Tue, 2011-08-23 at 15:14 +0200, Roedel, Joerg wrote:
> > Handling it through fds is a good idea. This makes sure that everything
> > belongs to one process. I am not really sure yet if we go the way to
>
On Tue, Aug 23, 2011 at 07:35:37PM -0400, Benjamin Herrenschmidt wrote:
> On Tue, 2011-08-23 at 15:18 +0200, Roedel, Joerg wrote:
> > Hmm, good idea. But as far as I know the hotplug-event needs to be in
> > the guest _before_ the device is actually unplugged (so that the guest
>
On Tue, Aug 23, 2011 at 12:54:27PM -0400, aafabbri wrote:
> On 8/23/11 4:04 AM, "Joerg Roedel" wrote:
> > That is makes uiommu basically the same as the meta-groups, right?
>
> Yes, functionality seems the same, thus my suggestion to keep uiommu
> explicit. Is there some need for group-groups be
On Wed, Aug 24, 2011 at 05:33:00AM -0400, David Gibson wrote:
> On Wed, Aug 24, 2011 at 11:14:26AM +0200, Roedel, Joerg wrote:
> > I don't see a reason to make this meta-grouping static. It would harm
> > flexibility on x86. I think it makes things easier on power but ther
Hi Alex,
On Wed, Aug 24, 2011 at 05:13:49PM -0400, Alex Williamson wrote:
> Is this roughly what you're thinking of for the iommu_group component?
> Adding a dev_to_group iommu ops callback let's us consolidate the sysfs
> support in the iommu base. Would AMD-Vi do something similar (or
> exactly
On Wed, Aug 24, 2011 at 10:56:13AM -0400, Alex Williamson wrote:
> On Wed, 2011-08-24 at 10:43 +0200, Joerg Roedel wrote:
> > A side-note: Might it be better to expose assigned devices in a guest on
> > a seperate bus? This will make it easier to emulate an IOMMU for the
> > guest inside qemu.
>
>
On Wed, Aug 24, 2011 at 11:07:46AM -0400, Alex Williamson wrote:
> On Wed, 2011-08-24 at 10:52 +0200, Roedel, Joerg wrote:
> > On Tue, Aug 23, 2011 at 01:08:29PM -0400, Alex Williamson wrote:
> > > On Tue, 2011-08-23 at 15:14 +0200, Roedel, Joerg wrote:
> >
> > &g
On Thu, Aug 25, 2011 at 11:38:09AM -0400, Don Dutile wrote:
> On 08/25/2011 06:54 AM, Roedel, Joerg wrote:
> > We need to solve this differently. ARM is starting to use the iommu-api
> > too and this definitly does not work there. One possible solution might
> > be to make
On Fri, Aug 26, 2011 at 12:24:23AM -0400, David Gibson wrote:
> On Thu, Aug 25, 2011 at 08:25:45AM -0500, Alexander Graf wrote:
> > On 25.08.2011, at 07:31, Roedel, Joerg wrote:
> > > For mmio we could stop the guest and replace the mmio region with a
> > > region t
On Fri, Aug 26, 2011 at 12:20:00AM -0400, David Gibson wrote:
> On Wed, Aug 24, 2011 at 01:03:32PM +0200, Roedel, Joerg wrote:
> > On Wed, Aug 24, 2011 at 05:33:00AM -0400, David Gibson wrote:
> > > On Wed, Aug 24, 2011 at 11:14:26AM +0200, Roedel, Joerg wrote:
> >
> &g
On Mon, Sep 12, 2011 at 08:08:41AM -0400, Sethi Varun-B16395 wrote:
> > The IOMMUs are usually devices on the bus itself, so they are initialized
> > after the bus is set up and the devices on it are populated. So the
> > function can not be called on bus initialization because the IOMMU is not
>
On Mon, Sep 12, 2011 at 07:50:35AM -0400, Sethi Varun-B16395 wrote:
> > - kvm->arch.iommu_domain = iommu_domain_alloc();
> > + kvm->arch.iommu_domain = iommu_domain_alloc(&pci_bus_type);
>
> Although it might require changes starting all the way from the qemu
> interface, but
> it would certa
On Wed, Sep 07, 2011 at 02:53:24PM -0400, Ohad Ben-Cohen wrote:
> drivers/iommu/amd_iommu.c | 20 ++-
> drivers/iommu/intel-iommu.c | 20 ++-
> drivers/iommu/iommu.c | 129
> +++
> drivers/iommu/msm_iommu.c |8 ++-
> drivers/iomm
On Tue, Sep 13, 2011 at 06:34:23AM -0400, Ohad Ben-Cohen wrote:
> Hi Joerg,
>
> On Tue, Sep 13, 2011 at 1:10 PM, Roedel, Joerg wrote:
> > Please split this patch into the core-change and patches for the
> > individual iommu-drivers and post this as a seperate patch-s
Hi Greg,
On Wed, Sep 07, 2011 at 03:44:45PM -0400, Greg KH wrote:
> >
> > The IOMMUs are usually devices on the bus itself, so they are
> > initialized after the bus is set up and the devices on it are
> > populated. So the function can not be called on bus initialization
> > because the IOMMU i
On Tue, Sep 13, 2011 at 10:58:55AM -0400, Greg KH wrote:
> On Tue, Sep 13, 2011 at 04:54:02PM +0200, Roedel, Joerg wrote:
> > --- a/include/linux/device.h
> > +++ b/include/linux/device.h
> > @@ -22,6 +22,7 @@
> > #include
> > #include
> > #include
&g
On Tue, Sep 13, 2011 at 10:58:55AM -0400, Greg KH wrote:
> On Tue, Sep 13, 2011 at 04:54:02PM +0200, Roedel, Joerg wrote:
> > --- a/include/linux/device.h
> > +++ b/include/linux/device.h
> > @@ -22,6 +22,7 @@
> > #include
> > #include
> > #include
&g
On Tue, Sep 13, 2011 at 12:21:26PM -0400, Greg KH wrote:
> On Tue, Sep 13, 2011 at 05:38:11PM +0200, Roedel, Joerg wrote:
> > On Tue, Sep 13, 2011 at 10:58:55AM -0400, Greg KH wrote:
> > > On Tue, Sep 13, 2011 at 04:54:02PM +0200, Roedel, Joerg wrote:
> > > >
On Thu, Sep 15, 2011 at 08:45:35AM -0400, Sethi Varun-B16395 wrote:
> > From: Roedel, Joerg [mailto:joerg.roe...@amd.com]
> > The details are up to Alex Williamson. One option is to register a
> > notifier for the bus in the iommu_bus_init() function and react to its
> > no
On Fri, Sep 16, 2011 at 01:51:41PM -0400, Ohad Ben-Cohen wrote:
> drivers/iommu/iommu.c | 158
> +---
> drivers/iommu/omap-iovmm.c | 12 +---
> include/linux/iommu.h |6 +-
> virt/kvm/iommu.c |4 +-
> 4 files changed, 157 inse
On Tue, Sep 27, 2011 at 08:26:29AM -0400, Ohad Ben-Cohen wrote:
> > With an unsigned long you can use plain and fast bit_ops instead of the
> > full bitmap functions.
>
> Not sure I follow; the only bit operation I'm using while mapping is
> find_next_bit() (which is a bitops.h method).
>
> What
On Tue, Sep 27, 2011 at 09:28:37AM -0400, Ohad Ben-Cohen wrote:
> So you're suggesting to re-implement find_next_bit() using ffs()/fls()
> and shifting ?
No. I suggest a simpler and shorter algorithm using the bit helpers.
Something like that:
min_idx = __ffs(iommu_page_sizes);
w
Hi Ohad,
sorry, I was on vacation last week and had no time to look into this.
On Sun, Oct 02, 2011 at 11:58:12AM -0400, Ohad Ben-Cohen wrote:
> drivers/iommu/iommu.c | 138 ---
> drivers/iommu/omap-iovmm.c | 12 +---
> include/linux/iommu.h |
Hi Gleb,
On Wed, Oct 05, 2011 at 08:01:15AM -0400, Gleb Natapov wrote:
> This patch series consists of Joerg series named "perf support for amd
> guest/host-only bits v2" [1] rebased to 3.1.0-rc7 and in addition,
> support for intel cpus for the same functionality.
>
> [1] https://lkml.org/lkml/2
Hi Ohad,
On Mon, Oct 10, 2011 at 09:59:22AM -0400, Ohad Ben-Cohen wrote:
> > Also, the bus_set_iommu interface is now in the -next branch. Would be
> > good if you rebase the patches to that interface.
>
> Sure. It's a little tricky though: which branch do I base this on ?
> Are you ok with me ba
Hi Ohad,
On Mon, Oct 10, 2011 at 01:02:46PM -0400, Ohad Ben-Cohen wrote:
> On Mon, Oct 10, 2011 at 5:36 PM, Roedel, Joerg wrote:
> > Yes, somthing like that. Probably the iommu_ops->unmap function should
> > be turned into a unmap_page function call which only takes an io
On Mon, Oct 10, 2011 at 06:01:06PM -0400, Ohad Ben-Cohen wrote:
> > On Mon, Oct 10, 2011 at 5:36 PM, Roedel, Joerg wrote:
> >> The master branch is best to base your patches on for generic work.
>
> It looks like the master branch is missing something
On Mon, Oct 10, 2011 at 06:49:32PM -0400, Ohad Ben-Cohen wrote:
> -int iommu_unmap(struct iommu_domain *domain, unsigned long iova, int
> gfp_order)
> +int iommu_unmap(struct iommu_domain *domain, unsigned long iova, int size)
> {
> - size_t size;
> + int order, unmapped_size, unmappe
On Tue, Oct 11, 2011 at 01:01:23PM -0400, Ohad Ben-Cohen wrote:
> On Tue, Oct 11, 2011 at 12:38 PM, Roedel, Joerg wrote:
> > You need to make sure that you don;t pass larger regions then requested
> > to the low-level driver. Some logic like in the iommu_map function
> > shou
Hi Ohad,
On Mon, Oct 17, 2011 at 04:05:02AM -0400, Ohad Ben-Cohen wrote:
> > This whole thing is quite marginal though and also very easy to change
> > later, so we can start with the "driver-provided io_page_size"
> > approach for now.
>
> Sorry, I just couldn't get myself to sign-off this as i
On Tue, Oct 18, 2011 at 12:23:11PM -0400, Jan Kiszka wrote:
> AMD processors apparently have a bug in the hardware task switching
> support when NPT is enabled. If the task switch triggers a NPF, we can
> get wrong EXITINTINFO along with that fault. On resume, spurious
> exceptions may then be inje
On Tue, Oct 18, 2011 at 01:37:32PM -0400, Avi Kivity wrote:
> On 10/18/2011 06:35 PM, Roedel, Joerg wrote:
> > On Tue, Oct 18, 2011 at 12:23:11PM -0400, Jan Kiszka wrote:
> > > AMD processors apparently have a bug in the hardware task switching
> > > support when NPT is
On Tue, Oct 18, 2011 at 01:37:32PM -0400, Avi Kivity wrote:
> On 10/18/2011 06:35 PM, Roedel, Joerg wrote:
> > On Tue, Oct 18, 2011 at 12:23:11PM -0400, Jan Kiszka wrote:
> > > AMD processors apparently have a bug in the hardware task switching
> > > support when NPT is
On Tue, Nov 01, 2011 at 09:39:49AM -0400, Jan Kiszka wrote:
> > So SVM does not guarantee that an intercept during a task-switch can be
> > restarted.
>
> Not a bug but still a deficit as it makes hardware-assisted task
> switching practically useless, no?
Not entirely. For hypervisors that can g
On Tue, Nov 01, 2011 at 11:49:42AM -0400, Jan Kiszka wrote:
> On 2011-11-01 16:30, Roedel, Joerg wrote:
> > On Tue, Nov 01, 2011 at 09:39:49AM -0400, Jan Kiszka wrote:
> >>> So SVM does not guarantee that an intercept during a task-switch can be
> >>> restarted
On Tue, Nov 01, 2011 at 02:22:56PM -0400, Jan Kiszka wrote:
> On 2011-11-01 17:15, Roedel, Joerg wrote:
> > No, also a hypervisor that creates the nested page-page on advance falls
> > into this category.
>
> Doesn't this means all guest memory has to be backed with ho
On Thu, Jan 13, 2011 at 02:27:00PM -0500, Avi Kivity wrote:
> On 01/13/2011 05:51 PM, Roedel, Joerg wrote:
> > I also had a look at entry_64.S. The save_paranoid could not be the
> > cause because MSR_GS_BASE is already negative at this point. But the
> > re-schedule conditio
On Sun, Jan 16, 2011 at 10:38:11AM -0500, Avi Kivity wrote:
> On 01/16/2011 05:35 PM, Joerg Roedel wrote:
> > On Sun, Jan 16, 2011 at 12:49:41PM +0200, Avi Kivity wrote:
> > > On 01/14/2011 05:45 PM, Joerg Roedel wrote:
> >
> > >> here is the reworked version of the patch-set. Only patch 1/2 has
On Thu, Feb 03, 2011 at 11:07:57AM -0500, Avi Kivity wrote:
> On 12/06/2010 12:53 PM, Roedel, Joerg wrote:
> >
> > > Joerg, if this looks right to you, please integrate it into your emulator
> > > intercept patchset.
> >
> > Will do. It will probably take u
On Tue, Feb 08, 2011 at 07:22:29PM -0500, Andre Przywara wrote:
> Somehow the code line advancing the RIP and checking for exceptions
> got dropped between the post on the ML and the commit.
> Add it again to let guests boot on upcoming AMD CPUs again.
>
> Reported-by: Joerg Roedel
> Signed-off-b
On Wed, Feb 09, 2011 at 05:43:28AM -0500, Andre Przywara wrote:
> Roedel, Joerg wrote:
> > On Tue, Feb 08, 2011 at 07:22:29PM -0500, Andre Przywara wrote:
> >> Somehow the code line advancing the RIP and checking for exceptions
> >> got dropped between the post on the
(Sorry for the delay, I had to spend some days sick at home :-( )
On Fri, Feb 11, 2011 at 05:12:29PM -0500, Zachary Amsden wrote:
> On 02/09/2011 12:29 PM, Joerg Roedel wrote:
> So I've gone over this series and the only issue I see so far is with
> this patch, and it doesn't have to do with ups
On Sun, Feb 13, 2011 at 10:12:14AM -0500, Avi Kivity wrote:
> On 02/09/2011 07:29 PM, Joerg Roedel wrote:
> > This patch implements two new vm-ioctls to get and set the
> > virtual_tsc_khz if the machine supports tsc-scaling. Setting
> > the tsc-frequency is only possible before userspace creates
>
On Sun, Feb 13, 2011 at 10:19:19AM -0500, Avi Kivity wrote:
> On 02/09/2011 07:29 PM, Joerg Roedel wrote:
> > Hi Avi, Marcelo,
> >
> > here is the patch-set to implement the TSC-scaling feature of upcoming
> > AMD CPUs. When this feature is supported the CPU provides a new MSR
> > which holds a mul
On Tue, Feb 22, 2011 at 04:18:20AM -0500, James Neave wrote:
> On Tue, Feb 22, 2011 at 1:51 AM, Chris Wright wrote:
> I added "capability sys_rawio" to the libvirtd apparmor profile,
> restarted apparmor and libvirt-bin and it just complained about the
> apparmor profile.
> The only other thing I
On Tue, Feb 22, 2011 at 05:11:42AM -0500, Avi Kivity wrote:
> On 02/21/2011 07:28 PM, Roedel, Joerg wrote:
> > > - what's the cost of wrmsr(TSC_MULT)?
> >
> > Hard to tell by now because I only have numbers for pre-production
> > hardware.
>
> Can you as
On Tue, Feb 22, 2011 at 05:41:53AM -0500, Avi Kivity wrote:
> On 02/22/2011 12:35 PM, Roedel, Joerg wrote:
> > > This doesn't really work, since we don't know on what host the TSC
> > > calibration loop ran:
> > >
> > > - start guest on host H
On Wed, Feb 09, 2011 at 12:29:39PM -0500, Joerg Roedel wrote:
> In the dr_intercept function a new cpu-feature called
> decode-assists is implemented and used when available. This
> code-path does not advance the guest-rip causing the guest
> to dead-loop over mov-dr instructions. This is fixed by
On Tue, Feb 22, 2011 at 09:01:51AM -0500, Avi Kivity wrote:
> On 02/22/2011 01:14 PM, Roedel, Joerg wrote:
> > On Wed, Feb 09, 2011 at 12:29:39PM -0500, Joerg Roedel wrote:
> > > In the dr_intercept function a new cpu-feature called
> > > decode-assists is implemen
(CC'ing x86 Maintainers)
On Sun, Mar 06, 2011 at 05:23:12AM -0500, Avi Kivity wrote:
> On 03/04/2011 12:34 AM, IVAN ANGELOV wrote:
> > Hello,
> > This provided dmesg message and kernel behavior appear when trying to
> > run qemu-kvm with kvm_amd module. Without kvm_amd qemu-kvm runs fine
> > but a
On Mon, Mar 07, 2011 at 07:50:14AM -0500, Avi Kivity wrote:
> On 03/07/2011 02:11 PM, Roedel, Joerg wrote:
> > There is no access to per_cpu variables at the start of x86_decode_insn.
> > I did a bit of investigation and it turns out that the faulting
> > instruction is inse
On Mon, Mar 07, 2011 at 08:20:42AM -0500, Avi Kivity wrote:
> On 03/07/2011 03:16 PM, Roedel, Joerg wrote:
> > According to the comments in stackprotector.h its the same on amd64 (the
> > difference is that gcc expects the canary value at a different offset
> > from %
On Tue, Mar 08, 2011 at 09:13:11AM -0500, Avi Kivity wrote:
> With CONFIG_CC_STACKPROTECTOR, we need a valid %gs at all times, so disable
> lazy reload and do an eager reload immediately after the vmexit.
>
Reported-by: IVAN ANGELOV
> Signed-off-by: Avi Kivity
Acked-By: Joerg Roedel
> ---
>
On Tue, Mar 22, 2011 at 06:07:21PM -0400, Rafael J. Wysocki wrote:
> On Tuesday, March 22, 2011, Joerg Roedel wrote:
> > On Mon, Mar 21, 2011 at 07:36:17PM -0400, Rafael J. Wysocki wrote:
> > > drivers/pci/intel-iommu.c | 38 +-
> > > 1 file changed, 9 inserti
On Wed, Mar 23, 2011 at 05:08:45AM -0400, Abhilash Kesavan wrote:
> We are investigating if the generic IOMMU API (include/linux/iommu.h)
> can be used for the IOMMU on our arm-based boards.
Great :-)
> I noticed that msm's IOMMU code (arch/arm/mach-msm/iommu.c) uses the
> genric IOMMU API and ha
On Mon, Mar 28, 2011 at 08:08:21AM -0400, Avi Kivity wrote:
> On 03/28/2011 12:46 PM, Joerg Roedel wrote:
> > This patch adds the necessary code changes in the
> > instruction emulator and the extensions to svm.c to
> > implement intercept checks for the svm instructions.
> >
> > diff --git a/arch/
On Mon, Mar 28, 2011 at 08:35:54AM -0400, Avi Kivity wrote:
> On 03/28/2011 12:46 PM, Joerg Roedel wrote:
> > This patch add intercept checks into the KVM instruction
> > emulator to check for the 8 instructions that access the
> > descriptor table addresses.
> >
> > +static struct opcode group6[]
On Mon, Mar 28, 2011 at 08:28:12AM -0400, Avi Kivity wrote:
> The spec indicates we need to check the TSS and IOPL based permissions
> before the intercept (vmx agrees). With the code as is, it happens
> afterwards.
>
> One way to do this is to have an ExtraChecks bit in the opcode::flags.
>
On Thu, Mar 31, 2011 at 05:18:28AM -0400, Avi Kivity wrote:
> On 03/31/2011 09:14 AM, Roedel, Joerg wrote:
> > On Mon, Mar 28, 2011 at 08:28:12AM -0400, Avi Kivity wrote:
> > > The spec indicates we need to check the TSS and IOPL based permissions
> > > before the in
On Thu, Mar 31, 2011 at 06:03:37AM -0400, Avi Kivity wrote:
> On 03/31/2011 11:42 AM, Roedel, Joerg wrote:
> > On Thu, Mar 31, 2011 at 05:18:28AM -0400, Avi Kivity wrote:
> > > On 03/31/2011 09:14 AM, Roedel, Joerg wrote:
> > > > On Mon, Mar 28, 2011 at 08:2
On Sun, Apr 03, 2011 at 08:35:28AM -0400, Avi Kivity wrote:
> On 04/01/2011 05:10 PM, Joerg Roedel wrote:
> > This patch adds a check_perm callback for each opcode into
> > the instruction emulator. This will be used to do all
> > necessary permission checks on instructions before checking
> > whet
On Wed, Apr 06, 2011 at 07:28:24AM -0400, Avi Kivity wrote:
> On 04/06/2011 02:21 PM, Avi Kivity wrote:
> > On 04/06/2011 01:30 PM, Joerg Roedel wrote:
> >> When the emulation of vmload or vmsave fails because the
> >> guest passed an unsupported physical address it gets an #GP
> >> with rip pointi
On Wed, Apr 06, 2011 at 08:43:47AM -0400, Avi Kivity wrote:
> On 04/06/2011 03:27 PM, Roedel, Joerg wrote:
> > On Wed, Apr 06, 2011 at 07:28:24AM -0400, Avi Kivity wrote:
> > > On 04/06/2011 02:21 PM, Avi Kivity wrote:
> > > > On 04/06/2011 01:30 PM, Joerg Roe
On Wed, May 23, 2012 at 05:49:31PM +0300, Avi Kivity wrote:
> On 05/23/2012 05:40 PM, Avi Kivity wrote:
> > On 05/23/2012 05:08 PM, Gleb Natapov wrote:
> > If decode assists are not available, we still need to emulate, see 15.33.5.
> >
>
> Joerg, the 2010 version of the manual says that the effec
On Thu, May 24, 2012 at 01:36:51PM +0300, Avi Kivity wrote:
> On 05/24/2012 01:34 PM, Roedel, Joerg wrote:
> > On Wed, May 23, 2012 at 05:49:31PM +0300, Avi Kivity wrote:
> >> On 05/23/2012 05:40 PM, Avi Kivity wrote:
> >> > On 05/23/2012 05:08 PM, Gleb Natapov wrote
On Tue, Jun 05, 2012 at 08:57:17PM +0300, Gleb Natapov wrote:
> On Tue, Jun 05, 2012 at 07:41:17PM +0200, Alexander Graf wrote:
> > IIRC it was the size field, but I could be wrong. Please take an old
> > (phenom / barcelona is old enough) machine and create some traces to make
> > 100% sure that
On Mon, Apr 16, 2012 at 12:25:37PM +0200, Jan Kiszka wrote:
> On 2012-04-15 11:44, Avi Kivity wrote:
> > Jan, Joerg, was an AMD erratum published for the bug?
>
> It wasn't an erratum but a documented feature limitation in the AMD
> architecture that was simply ignored by the old code.
Right. But
On Wed, Nov 24, 2010 at 02:13:32PM -0500, Avi Kivity wrote:
> On 11/24/2010 08:18 PM, Joerg Roedel wrote:
> > Hi Avi, Hi Marcelo,
> >
> > here is a patch-set to make the instruction emulator aware of nested
> > virtualization. It basically works by introducing a new callback into
> > the x86_ops to
On Thu, Nov 25, 2010 at 12:46:40PM +0100, Roedel, Joerg wrote:
> We basically have two choices here:
>
> a) We expose svm internals into the emulator
> b) We expose emulator internals into svm
>
> Both choices are not really good from a software-design point-of-v
On Thu, Nov 25, 2010 at 10:17:53AM -0500, Avi Kivity wrote:
> On 11/25/2010 03:13 PM, Roedel, Joerg wrote:
> > On Thu, Nov 25, 2010 at 12:46:40PM +0100, Roedel, Joerg wrote:
> > > We basically have two choices here:
> > >
> > > a) We expose svm internals in
On Thu, Nov 25, 2010 at 10:15:43AM -0500, Avi Kivity wrote:
> On 11/25/2010 01:46 PM, Roedel, Joerg wrote:
> Eventually the emulator will be used outside kvm. We don't want to tie
> the two together.
Does any user outside of KVM care about nested virtualization?
> All that&#x
On Mon, Nov 29, 2010 at 09:12:29AM -0500, Avi Kivity wrote:
> Gleb, Joerg, I'd appreciate review and testing of the apf and nnpt related
> changes.
I'll give it a test as soon as possible.
Joerg
--
AMD Operating System Research Center
Advanced Micro Devices GmbH Einsteinring 24 85609 D
On Mon, Nov 29, 2010 at 11:10:59AM -0500, Avi Kivity wrote:
> On 11/29/2010 05:38 PM, Joerg Roedel wrote:
> > Hi Avi, Hi Marcelo,
> >
> > this patch-set introduces a generic notion of guest-mode for VCPUs in
> > KVM. This is already useful as seen in patch 3/3. Nested-VMX also has a
> > guest-mode,
On Mon, Nov 29, 2010 at 09:12:30AM -0500, Avi Kivity wrote:
> Currently page fault cr2 and nesting infomation are carried outside
> the fault data structure. Instead they are placed in the vcpu struct,
> which results in confusion as global variables are manipulated instead
> of passing parameters
25 Nov 2010 17:23:13 +0100, "Roedel, Joerg" said:
> > > > On Thu, Nov 25, 2010 at 10:17:53AM -0500, Avi Kivity wrote:
> > > > > On 11/25/2010 03:13 PM, Roedel, Joerg wrote:
> > > > > What about things like adding instructions and forgetting to add th
On Wed, Dec 01, 2010 at 03:01:49AM -0500, Nadav Har'El wrote:
> On Mon, Nov 29, 2010, Joerg Roedel wrote about "[PATCH 0/3] KVM: Introduce
> VCPU-wide notion of guest-mode V2":
> > Hi Avi, Hi Marcelo,
> >
> > here is the re-spin I promised. The change to V1 are essentially the
> > renames:
> >
>
On Tue, Nov 30, 2010 at 12:42:28PM -0500, Avi Kivity wrote:
> On 11/30/2010 07:03 PM, Joerg Roedel wrote:
> > Hi Avi, Hi Marcelo,
> >
> > this patchset wraps the access to the intercept vectors in the VMCB into
> > specific functions. There are two reasons for this:
> >
> > 1) In the nested-svm
On Wed, Dec 01, 2010 at 06:38:30AM -0500, Nadav Har'El wrote:
> Can you please say a few words why you'd want to move this nested-exit
> request bit to x86.c?
I don't want to move the actual exit-code itself into generic code. This
code is different between svm and vmx. I think we could implement
On Thu, Dec 02, 2010 at 11:43:50AM -0500, Marcelo Tosatti wrote:
> On Tue, Nov 30, 2010 at 06:03:57PM +0100, Joerg Roedel wrote:
> > - control->intercept_cr_read =INTERCEPT_CR0_MASK |
> > - INTERCEPT_CR3_MASK |
> > - INTERCEP
On Fri, Dec 03, 2010 at 05:45:48AM -0500, Joerg Roedel wrote:
> +enum {
> + VMCB_CLEAN_MAX,
> +};
This is a left-over from an earlier version. I forgot to remove it. Here
is an updated patch. Sorry.
>From 7e3f4f175561429d0054daac94763e67d12424ba Mon Sep 17 00:00:00 2001
From: Joerg Roedel
D
Hi Avi,
On Sun, Dec 05, 2010 at 05:18:23AM -0500, Avi Kivity wrote:
> This patchset defines a framework for intercepting emulated instructions. It
> takes a middle ground to the two previous proposals: putting everything in
> an arch callback, or putting everything in the emulator. Instead, it m
On Mon, Dec 06, 2010 at 11:10:46AM -0500, Avi Kivity wrote:
> On 12/03/2010 06:42 PM, Joerg Roedel wrote:
> > This patch implements the xsetbv intercept to the AMD part
> > of KVM. This makes AVX usable in a save way for the guest on
> > AVX capable AMD hardware.
> > The patch is tested by using AV
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