/pub/scm/virt/kvm/qemu-kvm.git master is broken by
merge commit '6c1f42fe83bf9bc14a7a6cc5afd8dad83ee25c74'. In the
configure script, the compatibility test for target and host cpus has
an extra bracket at line 2141.
Regards,
Mike Caraman
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For syscalls case this change does not add any performance penalty. For irq
soft-disabled case the change adds a store/load of conditional register value
to/from a paca slot. Paca slots fit in one 64-byte cache line so these
additional operations have little impact on performance.
Signed-off-by:
Hook DO_KVM macro into 64-bit booke for KVM integration. Extend interrupt
handlers' parameter list with interrupt vector numbers to accomodate the macro.
Only the bolted version of tlb miss handers is addressed now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S |
Machine check exception handler was using a wrong prolog. Hypervisors like
KVM which are called early from the exception handler rely on the interrupt
source.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff
in SPRG3. Add EX_R13 to paca slots to free up
SPRG3 and change the critical exception epilog to use it.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/exception-64e.h |5 +++--
arch/powerpc/include/asm/reg.h |5 +++--
arch/powerpc/kernel/exceptions-64e.S | 17
Critical exception handler on 64-bit booke uses user-visible SPRG3 as scratch.
Restore VDSO information in SPRG3 on exception prolog.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/paca.h |3 +++
arch/powerpc/kernel/asm-offsets.c|1 +
arch/powerpc/kernel/exceptions
Guest Doorbell interrupts use guest save and restore registers. Add a new
Guest Doorbell exception type to accommodate GSRR0/1 SPRs usage in exception
prolog and fix the exception handler.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/exception-64e.h |1 +
arch/powerpc/include
These patches add core support for KVM on 64-bit Book3E PowerPC, mainly
integrating the DO_KVM macro. KVM arch specific patches will follow shortly.
Mihai Caraman (6):
powerpc/booke64: fix machine check handler to use the right prolog
powerpc/booke64: use GSRR registers in Guest Doorbell
ESR register is required by Data Storage Interrupt handling code.
Add the specific flag to the interrupt handler.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm
Machine check exception handler was using a wrong prolog. Hypervisors, like
KVM, which are called early from the exception handler rely on the interrupt
source.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S |2 +-
1 files changed, 1 insertions(+), 1 deletions
SPRN_SPRG_GEN_SCRATCH (aka SPRG0) instead of
SPRN_SPRG_TLB_SCRATCH (aka SPRG6) and replace TLB with GEN PACA slots to
keep consitency.
For critical exception handler use SPRG3 instead of SPRG7.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/exception-64e.h | 14 +++---
arch/powerpc/include
Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs
for 64-bit hosts.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index f9fa260
64-bit host needs to remain in 64-bit mode when an exception take place.
Set interrupt computaion mode in EPCR register.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch
Add emulation helper for getting instruction ea and refactor tlb instruction
emulation to use it.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500.h |6 +++---
arch/powerpc/kvm/e500_emulate.c | 21 ++---
arch/powerpc/kvm/e500_tlb.c | 23
olted version of tlb miss handers is addressed now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S | 114 --
arch/powerpc/mm/tlb_low_64e.S| 14 +++-
2 files changed, 92 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/k
handlers is supported now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_booke_hv_asm.h | 12 +++-
arch/powerpc/kvm/bookehv_interrupts.S | 120 +--
2 files changed, 122 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm
64-bit host runs with lazy interrupt disabling, so local_irq_disable() does
not disable interrupts right away and does not protect against preemption
required by __kvmppc_vcpu_run(). Define a macro for 64-bit to use
hard_irq_disable().
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c
git://repo.or.cz/qemu/agraf.git ppc-e5500
To use qemu run:
$ qemu-system-ppc64 -M mpc8544ds -cpu e5500 -nographic -kernel uImage \
-machine dt_compatible=fsl,,P5020DS
Mike
Mihai Caraman (17):
KVM: PPC64: booke: Set interrupt computation mode for 64-bit host
KVM: PPC64: booke: Add EPCR suppo
When delivering guest IRQs, update MSR computaion mode according to guest
interrupt computation mode found in EPCR.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc
Include header file for get_tb() declaration.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index db05692..a427031 100644
--- a/arch/powerpc/kvm/booke.c
+++ b
Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined
only for 64-bit and HV categories, so it shoud be available only on 64-bit
virtual processors. Undefine the support for 32-bit builds.
Define a reusable setter function for vcpu's EPCR.
Signed-off-by: Mihai Ca
GET_VCPU define will not be implemented for 64-bit for performance reasons
so get rid of it also on 32-bit.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |7 ++-
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S
Refactor exception prolog to allow save/restore register parameters. Add
addition none definition for exception prolog usage.
This is needed for exceptions like Guest Doorbell that use GSRRx regsiters
which do not map on exception type.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel
Mask high 32 bits of effective address in emulation layer, for guests running
in 32-bit mode.
MAS2's high-order 32 bits represents the upper 32 bits of the effective address
of the page. Mask it too for tlbwe instruction emulation.
Signed-off-by: Mihai Caraman
---
arch/powerp
Extend MAS2 EPN mask for 64-bit hosts, to retain most significant bits.
Change get tlb eaddr to use this mask.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/mmu-book3e.h |2 +-
arch/powerpc/kvm/e500.h |2 +-
2 files changed, 2 insertions(+), 2 deletions
tlbilxva emulation was using an u32 variable for guest effective address.
Replace it with gva_t type to handle 64-bit guests.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch
64-bit GCC 4.5.1 warns about an uninitialized variable which was guarded
by a flag. Initialize the variable to make it happy.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_tlb.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c b
Guest r8 register is held in the scratch register and stored correctly,
so remove the instruction that clobbers it. Guest r13 was missing from vcpu,
store it there.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |2 +-
1 files changed, 1 insertions(+), 1 deletions
Interrupt code used PPC_LL/PPC_STL macros to load/store some of u32 fields
which led to memory overflow on 64-bit. Use lwz/stw instead.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S | 16
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a
mtspr/mfspr emulation prints an error message for unknown SPRs. The message
was badly formatted displaying the hex value without 0x prefix. Use decimal
representation in accordance with the manuals, though the Linux headers
annoyingly use hex.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm
VCPU's MMUCFG register initialization should not depend on KVM_CAP_SW_TLB
ioctl call. Move it earlier into tlb initalization phase.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_mmu.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerp
Emulate TLBnPS registers which are available in MMU Architecture Version
(MAV) 2.0.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm/e500.h |5 +
arch/powerpc/kvm/e500_emulate.c | 10 ++
arch/powerpc/kvm/e500_mmu.c
Enable Freescale e6500 core adding missing MAV 2.0 support. LRAT and Page
Table are not addresses by this commit.
Mihai Caraman (5):
KVM: PPC: e500: Move VCPU's MMUCFG register initialization earlier
KVM: PPC: e500: Emulate TLBnPS registers
KVM: PPC: e500: Remove E.PT category from
Embedded.Page Table (E.PT) category in VMs requires indirect tlb entries
emulation which is not supported yet. Configure TLBnCFG to remove E.PT
category from VCPUs.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_mmu.c | 10 ++
1 files changed, 6 insertions(+), 4 deletions
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests
in the presence of MAV 2.0. Emulate EPTCFG register now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm/e500.h |6 ++
arch/powerpc/kvm/e500_emulate.c
Extend processor compatibility names to e6500 cores.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index 1f89d26..6c87299 100644
--- a/arch/powerpc/kvm
Move vcpu's MMU default configuration and geometry update into their own
functions.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_mmu.c | 59 +++
1 files changed, 37 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/kvm/e500_mm
MMU registers were exposed to user-space using sregs interface. Add them to
ONE_REG interface.
Signed-off-by: Mihai Caraman
---
Documentation/virtual/kvm/api.txt | 13 +
arch/powerpc/include/uapi/asm/kvm.h | 14 ++
arch/powerpc/kvm/44x.c | 12 +
arch/powerpc/kvm
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests
in the presence of MAV 2.0. Support it now.
Signed-off-by: Mihai Caraman
---
v2:
- Use has_feature() function
Documentation/virtual/kvm/api.txt |1 +
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc
Embedded.Page Table (E.PT) category in VMs requires indirect tlb entries
emulation which is not supported yet. Configure TLBnCFG to remove E.PT
and E.HV.LRAT categories from VCPUs.
Signed-off-by: Mihai Caraman
---
v2:
- Remove E.HV.LRAT from vcpus
arch/powerpc/kvm/e500_mmu.c |6 ++
1
Extend processor compatibility names to e6500 cores.
Signed-off-by: Mihai Caraman
Reviewed-by: Alexander Graf
---
v2:
- No change
arch/powerpc/kvm/e500mc.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index
MMU registers were exposed to user-space using sregs interface. Add them
to ONE_REG interface and use kvmppc_get_one_reg/kvmppc_set_one_reg delegation
interface introduced by book3s.
Signed-off-by: Mihai Caraman
---
v2:
- Restrict set_one_reg operation for MMU registers to HW values
Add e6500 core to Kconfig description.
Signed-off-by: Mihai Caraman
---
v2:
- New patch
arch/powerpc/kvm/Kconfig |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 63c67ec..4489520 100644
--- a/arch/powerpc
Add support for TLBnPS registers available in MMU Architecture Version
(MAV) 2.0.
Signed-off-by: Mihai Caraman
---
v2:
- Add vcpu generic function has_feature()
Documentation/virtual/kvm/api.txt |4
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/include/uapi/asm/kvm.h
Vcpu's MMU default configuration and geometry update logic was buried in
a chunk of code. Move them to dedicated functions to add more clarity.
Signed-off-by: Mihai Caraman
---
v2:
- Add better patch description. Hopefully :)
arch/powerpc/kvm/e500_mmu.c |
Enable basic support for Freescale e6500 core, adding MAV 2.0 support.
Validated on T4240QDS platfrom. Altivec, Multithreading and HW Tablewalk
are not addressed by this patchset.
Mihai Caraman (7):
KVM: PPC: e500: Expose MMU registers via ONE_REG
KVM: PPC: e500: Move vcpu's MMU configur
MMU registers were exposed to user-space using sregs interface. Add them
to ONE_REG interface using kvmppc_get_one_reg/kvmppc_set_one_reg delegation
mechanism.
Signed-off-by: Mihai Caraman
---
v3:
- Fix case breaks
v2:
- Restrict set_one_reg operation for MMU registers to HW values
Vcpu's MMU default configuration and geometry update logic was buried in
a chunk of code. Move them to dedicated functions to add more clarity.
Signed-off-by: Mihai Caraman
---
v3:
- No change
v2:
- Add better patch description
arch/powerpc/kvm/e500_mmu.c |
Embedded.Page Table (E.PT) category is not supported yet in e6500 kernel.
Configure TLBnCFG to remove E.PT and E.HV.LRAT categories from VCPUs.
Signed-off-by: Mihai Caraman
---
v3:
- No change
arch/powerpc/kvm/e500_mmu.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff
Add support for TLBnPS registers available in MMU Architecture Version
(MAV) 2.0.
Signed-off-by: Mihai Caraman
---
v3:
- Add vcpu_ftr enum
v2:
- Add vcpu generic function has_feature()
Documentation/virtual/kvm/api.txt |4
arch/powerpc/include/asm/kvm_host.h |1 +
arch
Add e6500 core to Kconfig description.
Signed-off-by: Mihai Caraman
---
v3:
- No change
arch/powerpc/kvm/Kconfig |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 63c67ec..4489520 100644
--- a/arch/powerpc
Extend processor compatibility names to e6500 cores.
Signed-off-by: Mihai Caraman
Reviewed-by: Alexander Graf
---
v3:
- No change
arch/powerpc/kvm/e500mc.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests
in the presence of MAV 2.0. Emulate it now.
Signed-off-by: Mihai Caraman
---
v3:
- Initialize EPTCFG to 0 since E.PT is not supported now
Documentation/virtual/kvm/api.txt |1 +
arch/powerpc/include/asm
Refactor Book3E ONE_REG ioctl implementation to use kvmppc_get_one_reg/
kvmppc_set_one_reg delegation interface introduced by Book3S. This is
necessary for MMU SPRs which are platform specifics.
Get rid of useless case braces in the process.
Signed-off-by: Mihai Caraman
---
v3:
- Split ONE_REG
Enable basic support for Freescale e6500 core, adding MAV 2.0 support.
Validated on T4240QDS platfrom. Altivec, Multithreading and HW Tablewalk
are not addressed by this patchset.
Mihai Caraman (8):
KVM: PPC: Book3E: Refactor ONE_REG ioctl implementation
KVM: PPC: e500: Expose MMU registers
guarantees to hard enable interrupts. To do so replace exception
function calls like timer_interrupt() with irq_happened flags. The
local_irq_enable() call takes care of replaying them and lets the interrupts
hard enabled.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |9 +++--
1
SPE_FP interrupts are shared with ALTIVEC. Refactor SPE_FP exit handling
to detect KVM support for the featured unit at run-time, in order to
accommodate ALTIVEC later.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 80 ++
1 files
Adopt AltiVec approach to increase laziness by calling kvmppc_load_guest_fp()
just before returning to guest instaed of each sched in.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |1 +
arch/powerpc/kvm/e500mc.c |2 --
2 files changed, 1 insertions(+), 2 deletions(-)
diff
Interrupt numbers defined for Book3E follows IVORs definition. Align
BOOKE_INTERRUPT_ALTIVEC_UNAVAIL and BOOKE_INTERRUPT_ALTIVEC_ASSIST to this
rule which also fixes the build breakage.
IVORs 32 and 33 are shared so reflect this in the interrupts naming.
Signed-off-by: Mihai Caraman
---
arch
KVM Book3E FPU support gracefully reuse host infrastructure so we do the
same for AltiVec. To keep AltiVec lazy call kvmppc_load_guest_altivec()
just when returning to guest instead of each sched in.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 74
Mihai Caraman (6):
KVM: PPC: Book3E: Fix AltiVec interrupt numbers and build breakage
KVM: PPC: Book3E: Refactor SPE_FP exit handling
KVM: PPC: Book3E: Rename IRQPRIO names to accommodate ALTIVEC
KVM: PPC: Book3E: Add AltiVec support
KVM: PPC: Book3E: Add ONE_REG AltiVec support
KVM
Rename BOOKE_IRQPRIO_SPE_UNAVAIL and BOOKE_IRQPRIO_SPE_FP_DATA names
to accommodate ALTIVEC. Replace BOOKE_INTERRUPT_SPE_UNAVAIL and
BOOKE_INTERRUPT_SPE_FP_DATA with the common version.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 12 ++--
arch/powerpc/kvm
Add ONE_REG support for AltiVec on Book3E.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 01eb635..019496d 100644
--- a
e-but-not-read entries.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/mmu-book3e.h |6 ++-
arch/powerpc/kvm/booke.c |6 +++
arch/powerpc/kvm/booke.h |2 +
arch/powerpc/kvm/bookehv_interrupts.S | 32 ++-
arch/powerpc/kvm/e
inst fixup". We will address lwepx
issue in a subsequent patch without the need of fixups.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S | 26 +-
1 files changed, 1 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/kvm/bookehv_inter
inst fixup". We will address lwepx
issue in a subsequent patch without the need of fixups.
Signed-off-by: Mihai Caraman
---
Resend this patch for Alex G. he was unsubscribed from kvm-ppc mailist
for a while.
arch/powerpc/kvm/bookehv_interrupts.S | 26 +-
1 files
e-but-not-read entries.
Signed-off-by: Mihai Caraman
---
Resend this pacth for Alex G. he was unsubscribed from kvm-ppc mailist
for a while.
arch/powerpc/include/asm/mmu-book3e.h |6 ++-
arch/powerpc/kvm/booke.c |6 +++
arch/powerpc/kvm/booke.h |2 +
arch/po
On Book3E some SPE/FP/AltiVec interrupts share the same number. Use
common defines to indentify these numbers.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64e.S
On Book3E some SPE/FP/AltiVec interrupts share the same number. Use
common defines to indentify these numbers.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/head_fsl_booke.S | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel
Add ONE_REG support for AltiVec on Book3E.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index c3c3af6..6ac1f68 100644
--- a
Use common BOOKE_IRQPRIO and BOOKE_INTERRUPT defines for SPE/FP/AltiVec
which share the same interrupts numbers.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 16
arch/powerpc/kvm/booke.h |4 ++--
arch/powerpc/kvm
Add KVM Book3E AltiVec support. KVM Book3E FPU support gracefully reuse host
infrastructure so follow the same approach for AltiVec.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 72 -
1 files changed, 70 insertions(+), 2 deletions
Add KVM Book3E AltiVec support and enable e6500 core.
Mihai Caraman (6):
KVM: PPC: Book3E: Use common defines for SPE/FP/AltiVec int numbers
KVM: PPC: Book3E: Refactor SPE/FP exit handling
KVM: PPC: Book3E: Increase FPU laziness
KVM: PPC: Book3E: Add AltiVec support
KVM: PPC: Book3E
Increase FPU laziness by calling kvmppc_load_guest_fp() just before
returning to guest instead of each sched in. Without this improvement
an interrupt may also claim floting point corrupting guest state.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |1 +
arch/powerpc/kvm
SPE/FP/AltiVec interrupts share the same numbers. Refactor SPE/FP exit handling
to accommodate AltiVec later. Detect the targeted unit at run time since it can
be configured in the kernel but not featured on hardware.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 102
Now that AltiVec support is in place enable e6500 core.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index 09da1ac..bec897c 100644
--- a/arch
Some exit ids where left out from kvm_exit_names array.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/timing.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/timing.c b/arch/powerpc/kvm/timing.c
index 07b6110..c392d26 100644
--- a/arch/powerpc
Some guests are making use of return from machine check instruction
to do crazy things even though the 64-bit kernel doesn't handle yet
this interrupt. Emulate MCSRR0/1 SPR and rfmci instruction accordingly.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_host.h |1 +
Add LRAT (Logical to Real Address Translation) error exception handler to
Booke3E 64-bit kernel. LRAT support in KVM will follow afterwards.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_asm.h |1 +
arch/powerpc/include/asm/reg_booke.h |1 +
arch/powerpc/kernel
With LRAT (Logical to Real Address Translation) error exception handler in
kernel
KVM needs to add the counterpart otherwise will break the build.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a
Booke3E 64-bit kernel and the basic KVM
handler to avoid build breakage. This is a prerequisite for KVM LRAT support
that will follow.
Signed-off-by: Mihai Caraman
---
v2
- squash patches for bisectability
- set IVOR42 from setup_cpu
arch/powerpc/include/asm/kvm_asm.h|1 +
arch
On vcpu schedule, the condition checked for tlb pollution is too tight.
The tlb entries of one vcpu are polluted when a different vcpu from the
same partition runs in-between. Relax the current tlb invalidation
condition taking into account the lpid.
Signed-off-by: Mihai Caraman freescale.com
;
for (i = 0; i < ITERATIONS; i++)
for (j = 0; j < ENTRIES; j++)
bar = foo[j][0];
return 0;
}
Signed-off-by: Mihai Caraman
Cc: Scott Wood
---
v2:
- improve patch name and description
- add performance results
arch/powerpc/kvm/e500mc.
;
for (i = 0; i < ITERATIONS; i++)
for (j = 0; j < ENTRIES; j++)
bar = foo[j][0];
return 0;
}
Signed-off-by: Mihai Caraman
Cc: Scott Wood
---
v3:
- use existing logic while keeping last_vcpu_per_cpu per lpid
v2:
- improve patch na
;
for (i = 0; i < ITERATIONS; i++)
for (j = 0; j < ENTRIES; j++)
bar = foo[j][0];
return 0;
}
Signed-off-by: Mihai Caraman
Cc: Scott Wood
---
v4:
- rename last_vcpu_on_cpu to last_vcpu_of_lpid
- use "*[" syntax despite checkpatch er
.
Signed-off-by: Mihai Caraman
Cc: Bharat Bhushan
---
arch/powerpc/kvm/e500_mmu_host.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index 0528fe5..54144c7 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b
on
is found the execution returns to the lwepx instruction instead of the
fixup, the host ending up in an infinite loop.
Revert the commit "add load inst fixup". lwepx issue will be addressed
in a subsequent patch without needing fixup code.
Signed-off-by: Mihai Caraman
---
v4-v2:
- no
upt vector from host. Some cores share host IVOR registers
between hardware threads, which is the case of FSL e6500, which impose
additional
synchronization logic for this solution to work. The optimization can be
addressed
later on top of this patch.
Signed-off-by: Mihai Caraman
---
v4:
-
by itself.
With an error returning kvmppc_get_last_inst we can just use completely
get rid of kvmppc_read_inst() and only use kvmppc_get_last_inst() instead."
As a intermediate step get rid of kvmppc_read_inst() and only use kvmppc_ld()
instead.
Signed-off-by: Mihai Caraman
---
v4:
- new patch
Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E.
Signed-off-by: Mihai Caraman
---
v4-v2:
- no change
arch/powerpc/include/asm/mmu-book3e.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/mmu-book3e.h
b/arch/powerpc
-by: Mihai Caraman
---
v4:
- these changes compile on book3s, please validate the functionality and
do the necessary adaptations!
- common declaration and enum for kvmppc_load_last_inst()
- remove kvmppc_read_inst() in a preceding patch
v3:
- rework patch description
- add common definition
miss
exception handled in the host and the TODO for execute-but-not-read entries
and TLB eviction.
Mihai Caraman (5):
KVM: PPC: e500mc: Revert "add load inst fixup"
KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1
KVM: PPC: Book3s: Remove kvmppc_read_inst() function
Tlb search operation used for victim hint relies on the default tlb set by the
host. When hardware tablewalk support is enabled in the host, the default tlb is
TLB1 which leads KVM to evict the bolted entry. Set and restore the default tlb
when searching for victim hint.
Signed-off-by: Mihai
guest request
as nop.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_emulate.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index 002d517..98a22e5 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc
Now that AltiVec support is in place enable e6500 core.
Signed-off-by: Mihai Caraman
---
v2:
- no changes
arch/powerpc/kvm/e500mc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index c60b653..0bc9684 100644
--- a/arch
Add ONE_REG support for AltiVec on Book3E.
Signed-off-by: Mihai Caraman
---
v2:
- add comment describing VCSR register representation in KVM vs kernel
arch/powerpc/include/uapi/asm/kvm.h | 5 +
arch/powerpc/kvm/booke.c| 34 ++
2 files changed
: Mihai Caraman
---
v2:
- enable SPE only if !HV && SPE
arch/powerpc/kvm/booke.c | 93 +++-
1 file changed, 60 insertions(+), 33 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 3c86d9b..80cd8df 100644
--
Add KVM Book3E AltiVec support. KVM Book3E FPU support gracefully reuse host
infrastructure so follow the same approach for AltiVec.
Signed-off-by: Mihai Caraman
---
v2:
- integrate Paul's FP/VMX/VSX changes
arch/powerpc/kvm/booke.c | 67 ++
Use common BOOKE_IRQPRIO and BOOKE_INTERRUPT defines for SPE/FP/AltiVec
which share the same interrupt numbers.
Signed-off-by: Mihai Caraman
---
v2:
- remove outdated definitions
arch/powerpc/include/asm/kvm_asm.h| 8
arch/powerpc/kvm/booke.c | 17
Add KVM Book3E AltiVec support and enable e6500 core.
Integrates Paul's FP/VMX/VSX changes that landed in kvm-ppc-queue in January
and take into account feedback.
Mihai Caraman (6):
KVM: PPC: Book3E: Use common defines for SPE/FP/AltiVec int numbers
KVM: PPC: Book3E: Refactor SPE/FP
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