Hi Wei,
On 11/06/15 05:51, Wei Huang wrote:
>
>
> On 06/10/2015 11:43 AM, Marc Zyngier wrote:
>> On 10/06/15 05:16, Wei Huang wrote:
>>> There are two GICs (GICv2 and GICv3) supported by KVM. So it is necessary
>>> to find out GIC version before calling ACPI probing functions defined
>>> in vgic
Hi,
On 06/08/2015 06:04 PM, Marc Zyngier wrote:
> In order to be able to feed physical interrupts to a guest, we need
> to be able to establish the virtual-physical mapping between the two
> worlds.
>
> The mapping is kept in a rbtree, indexed by virtual interrupts.
>
> Signed-off-by: Marc Zyngier
Hi Marc,
On 06/08/2015 06:04 PM, Marc Zyngier wrote:
> To allow a HW interrupt to be injected into a guest, we lookup the
> guest virtual interrupt in the irq_phys_map rbtree, and if we have
> a match, encode both interrupts in the LR.
>
> We also mark the interrupt as "active" at the host distri
On 11/06/15 09:43, Andre Przywara wrote:
> Hi,
>
> On 06/08/2015 06:04 PM, Marc Zyngier wrote:
>> In order to be able to feed physical interrupts to a guest, we need
>> to be able to establish the virtual-physical mapping between the two
>> worlds.
>>
>> The mapping is kept in a rbtree, indexed by
On 11/06/15 09:44, Andre Przywara wrote:
> Hi Marc,
>
> On 06/08/2015 06:04 PM, Marc Zyngier wrote:
>> To allow a HW interrupt to be injected into a guest, we lookup the
>> guest virtual interrupt in the irq_phys_map rbtree, and if we have
>> a match, encode both interrupts in the LR.
>>
>> We als
On 06/11/2015 10:15 AM, Marc Zyngier wrote:
> On 11/06/15 09:44, Andre Przywara wrote:
>> On 06/08/2015 06:04 PM, Marc Zyngier wrote:
...
>>> @@ -1344,6 +1364,35 @@ static bool vgic_process_maintenance(struct kvm_vcpu
>>> *vcpu)
>>> return level_pending;
>>> }
>>>
>>> +/* Return 1 if HW int
On 11/06/15 10:44, Andre Przywara wrote:
> On 06/11/2015 10:15 AM, Marc Zyngier wrote:
>> On 11/06/15 09:44, Andre Przywara wrote:
>>> On 06/08/2015 06:04 PM, Marc Zyngier wrote:
> ...
@@ -1344,6 +1364,35 @@ static bool vgic_process_maintenance(struct
kvm_vcpu *vcpu)
return level
Move struct kvm_irq_routing_table from irqchip.c to kvm_host.h,
so we can use it outside of irqchip.c.
Signed-off-by: Feng Wu
---
include/linux/kvm_host.h | 15 +++
virt/kvm/irqchip.c | 11 ---
2 files changed, 15 insertions(+), 11 deletions(-)
diff --git a/include/lin
From: Eric Auger
This patch adds and documents a new KVM_DEV_VFIO_DEVICE group
and 2 device attributes: KVM_DEV_VFIO_DEVICE_FORWARD_IRQ,
KVM_DEV_VFIO_DEVICE_UNFORWARD_IRQ. The purpose is to be able
to set a VFIO device IRQ as forwarded or not forwarded.
the command takes as argument a handle to a
VT-d Posted-Interrupts is an enhancement to CPU side Posted-Interrupt.
With VT-d Posted-Interrupts enabled, external interrupts from
direct-assigned devices can be delivered to guests without VMM
intervention when guest is running in non-root mode.
You can find the VT-d Posted-Interrtups Spec. in
Extend struct pi_desc for VT-d Posted-Interrupts.
Signed-off-by: Feng Wu
---
arch/x86/kvm/vmx.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index f7b6168..bd26501 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/
This patch defines a new interface kvm_intr_is_single_vcpu(),
which can returns whether the interrupt is for single-CPU or not.
It is used by VT-d PI, since now we only support single-CPU
interrupts, For lowest-priority interrupts, if user configures
it via /proc/irq or uses irqbalance to make it
This patch adds pi_clear_sn and pi_set_sn to struct kvm_x86_ops,
so we can set/clear SN outside vmx.
Signed-off-by: Feng Wu
---
arch/x86/include/asm/kvm_host.h | 3 +++
arch/x86/kvm/vmx.c | 13 +
2 files changed, 16 insertions(+)
diff --git a/arch/x86/include/asm/kvm_h
This patch adds some helper functions to manipulate the
Posted-Interrupts Descriptor.
Signed-off-by: Feng Wu
---
arch/x86/kvm/vmx.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index bd26501..8be6aa4 100644
--- a/arch/x86
This patch updates the Posted-Interrupts Descriptor when vCPU
is blocked.
pre-block:
- Add the vCPU to the blocked per-CPU list
- Set 'NV' to POSTED_INTR_WAKEUP_VECTOR
post-block:
- Remove the vCPU from the per-CPU list
Signed-off-by: Feng Wu
---
arch/x86/include/asm/kvm_host.h | 3 +
arch/x
From: Eric Auger
Provide wrapper functions that allow KVM-VFIO device code to
interact with a vfio device:
- kvm_vfio_device_get_external_user gets a handle to a struct
vfio_device from the vfio device file descriptor and increments
its reference counter,
- kvm_vfio_device_put_external_user d
Currently, we don't support urgent interrupt, all interrupts
are recognized as non-urgent interrupt, so we cannot post
interrupts when 'SN' is set.
If the vcpu is in guest mode, it cannot have been scheduled out,
and that's the only case when SN is set currently, warning if
SN is set.
Signed-off-
This patch updates the Posted-Interrupts Descriptor when vCPU
is preempted.
sched out:
- Set 'SN' to suppress furture non-urgent interrupts posted for
the vCPU.
sched in:
- Clear 'SN'
- Change NDST if vCPU is scheduled to a different CPU
- Set 'NV' to POSTED_INTR_VECTOR
Signed-off-by: Feng Wu
-
This patch adds the kvm-vfio interface for VT-d Posted-Interrupts.
When guests update MSI/MSI-x information for an assigned-device,
QEMU will use KVM_DEV_VFIO_DEVICE_POST_IRQ attribute to setup
IRTE for VT-d PI. Userspace program can also use
KVM_DEV_VFIO_DEVICE_UNPOST_IRQ to change back to irq rem
Make kvm_set_msi_irq() public, we can use this function outside.
Signed-off-by: Feng Wu
---
arch/x86/include/asm/kvm_host.h | 4
arch/x86/kvm/irq_comm.c | 4 ++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kv
Define an interface to get PI descriptor address from the vCPU structure.
Signed-off-by: Feng Wu
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/vmx.c | 11 +++
2 files changed, 13 insertions(+)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/k
This patch defines macro __KVM_HAVE_ARCH_KVM_VFIO_POST and
implement kvm_arch_vfio_update_pi_irte for x86 architecture.
Signed-off-by: Feng Wu
---
arch/x86/include/asm/kvm_host.h | 2 +
arch/x86/kvm/Makefile | 3 +-
arch/x86/kvm/kvm_vfio_x86.c | 85 +++
This patch adds and documents two new attributes
KVM_DEV_VFIO_DEVICE_POST_IRQ and KVM_DEV_VFIO_DEVICE_UNPOST_IRQ
in KVM_DEV_VFIO_DEVICE group. The new attributes are used for
VT-d Posted-Interrupts.
When guest OS changes the interrupt configuration for an
assigned device, such as, MSI/MSIx data/ad
From: Eric Auger
The VFIO external user API is enriched with 3 new functions that
allows a kernel user external to VFIO to retrieve some information
from a VFIO device.
- vfio_device_get_external_user enables to get a vfio device from
its fd and increments its reference counter
- vfio_device_p
On 06/10/2015 12:16 PM, Wei Huang wrote:
This patches enables ACPI support for KVM virtual arch timer. It allows
KVM to parse ACPI table for arch timer PPI when DT table is not present.
Signed-off-by: Alexander Spyridaki
Signed-off-by: Wei Huang
---
virt/kvm/arm/arch_timer.c | 75 +++
On 06/10/2015 12:16 PM, Wei Huang wrote:
This patch creates a dispatch function to support virt GIC probing
in both device tree (DT) and ACPI environment. kvm_vgic_hyp_init()
will probe DT first. If failed, it will try ACPI.
Signed-off-by: Wei Huang
---
include/kvm/arm_vgic.h | 18 +--
On 06/10/2015 09:23 PM, Andrew Jones wrote:
On Wed, Jun 10, 2015 at 12:16:02AM -0400, Wei Huang wrote:
Initial ACPI support for ARM64 has been accepted into Linux kernel recently.
Now it is a good time to re-visit ACPI support for KVM. This patchset
enables ACPI for both arch_timer and vGIC by p
From: Andrey Smetanin
KVM Hyper-V based guests can notify hypervisor about
occurred guest crash. This patch does handling of KVM crash event
by sending to libvirt guest panic event that allows to gather
guest crash dump by QEMU/LIBVIRT.
The idea is to provide functionality equal to pvpanic devic
Windows 2012 guests can notify hypervisor about occurred guest crash
(Windows bugcheck(BSOD)) by writing specific Hyper-V msrs. This patch does
handling of this MSR's by KVM and sending notification to user space that
allows to gather Windows guest crash dump by QEMU/LIBVIRT.
The idea is to provid
From: Andrey Smetanin
Windows 2012 guests can notify hypervisor about occurred guest crash
(Windows bugcheck(BSOD)) by writing specific Hyper-V msrs. This patch does
handling of this MSR's by KVM and sending notification to user space that
allows to gather Windows guest crash dump by QEMU/LIBVIRT
Hi Alex,
just tried vfio-pci with user-space irqchip (qemu-system-x86_64 -device
vfio-pci,host=... -enable-kvm -no-kvm-irqchip). This ends up in the
following oops:
[ 61.908453] BUG: unable to handle kernel NULL pointer dereference at
0128
[ 61.908462] IP: [] kvm_irq_map_gsi+0x7c
Hi Feng,
On 06/11/2015 12:51 PM, Feng Wu wrote:
> From: Eric Auger
>
> This patch adds and documents a new KVM_DEV_VFIO_DEVICE group
> and 2 device attributes: KVM_DEV_VFIO_DEVICE_FORWARD_IRQ,
> KVM_DEV_VFIO_DEVICE_UNFORWARD_IRQ. The purpose is to be able
> to set a VFIO device IRQ as forwarded o
On Thu, 2015-06-11 at 15:37 +0200, Jan Kiszka wrote:
> Hi Alex,
>
> just tried vfio-pci with user-space irqchip (qemu-system-x86_64 -device
> vfio-pci,host=... -enable-kvm -no-kvm-irqchip). This ends up in the
> following oops:
>
> [ 61.908453] BUG: unable to handle kernel NULL pointer derefere
Hi Eric,
thanks for the review!
On 06/09/2015 09:52 AM, Eric Auger wrote:
> On 05/29/2015 11:53 AM, Andre Przywara wrote:
>> The ARM GICv3 ITS controller requires a separate register frame to
>> cover ITS specific registers. Add a new VGIC address type and store
>> the address in a field in the v
Salut Eric,
On 06/09/2015 04:59 PM, Eric Auger wrote:
> On 05/29/2015 11:53 AM, Andre Przywara wrote:
>> As the actual LPI number in a guest can be quite high, but is mostly
>> assigned using a very sparse allocation scheme, bitmaps and arrays
>> for storing the virtual interrupt status are a wast
On 11/06/15 16:46, Andre Przywara wrote:
> Salut Eric,
>
> On 06/09/2015 04:59 PM, Eric Auger wrote:
>> On 05/29/2015 11:53 AM, Andre Przywara wrote:
>>> As the actual LPI number in a guest can be quite high, but is mostly
>>> assigned using a very sparse allocation scheme, bitmaps and arrays
>>>
On Thu, 2015-06-11 at 18:51 +0800, Feng Wu wrote:
> This patch adds the kvm-vfio interface for VT-d Posted-Interrupts.
> When guests update MSI/MSI-x information for an assigned-device,
> QEMU will use KVM_DEV_VFIO_DEVICE_POST_IRQ attribute to setup
> IRTE for VT-d PI. Userspace program can also us
On Thu, 2015-06-11 at 18:51 +0800, Feng Wu wrote:
> This patch defines macro __KVM_HAVE_ARCH_KVM_VFIO_POST and
> implement kvm_arch_vfio_update_pi_irte for x86 architecture.
>
What's vfio specific in any of this? It's obviously called from the
kvm-vfio device interface, but nothing below is vfio
On 05/29/2015 11:53 AM, Andre Przywara wrote:
> The properties and status of the GICv3 LPIs are hold in tables in
> (guest) memory. To achieve reasonable performance, we cache this
> data in our own data structures, so we need to sync those two views
> from time to time. This behaviour is well desc
Hello Andre,
On 05/29/2015 11:53 AM, Andre Przywara wrote:
> When userland wants to inject a MSI into the guest, we have to use
> our data structures to find the LPI number and the VCPU to receivce
receive
> the interrupt.
> Use the wrapper functions to iterate the linked lists and find the
> prope
The GIC Hypervisor Configuration Register is used to enable
the delivery of virtual interupts to a guest, as well as to
define in which conditions maintenance interrupts are delivered
to the host.
This register doesn't contain any information that we need to
read back (the EOIcount is utterly usel
On 06/11/2015 06:01 PM, Marc Zyngier wrote:
> On 11/06/15 16:46, Andre Przywara wrote:
>> Salut Eric,
>>
>> On 06/09/2015 04:59 PM, Eric Auger wrote:
>>> On 05/29/2015 11:53 AM, Andre Przywara wrote:
As the actual LPI number in a guest can be quite high, but is mostly
assigned using a ver
On 06/11/2015 01:51 PM, Feng Wu wrote:
From: Eric Auger
This patch adds and documents a new KVM_DEV_VFIO_DEVICE group
and 2 device attributes: KVM_DEV_VFIO_DEVICE_FORWARD_IRQ,
KVM_DEV_VFIO_DEVICE_UNFORWARD_IRQ. The purpose is to be able
to set a VFIO device IRQ as forwarded or not forwarded.
th
> -Original Message-
> From: Eric Auger [mailto:eric.au...@linaro.org]
> Sent: Thursday, June 11, 2015 9:38 PM
> To: Wu, Feng; kvm@vger.kernel.org; linux-ker...@vger.kernel.org
> Cc: pbonz...@redhat.com; mtosa...@redhat.com;
> alex.william...@redhat.com
> Subject: Re: [v4 08/16] KVM: kvm-
> -Original Message-
> From: Avi Kivity [mailto:avi.kiv...@gmail.com]
> Sent: Friday, June 12, 2015 3:59 AM
> To: Wu, Feng; kvm@vger.kernel.org; linux-ker...@vger.kernel.org
> Cc: pbonz...@redhat.com; mtosa...@redhat.com;
> alex.william...@redhat.com; eric.au...@linaro.org
> Subject: Re:
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Friday, June 12, 2015 1:16 AM
> To: Wu, Feng
> Cc: kvm@vger.kernel.org; linux-ker...@vger.kernel.org; pbonz...@redhat.com;
> mtosa...@redhat.com; eric.au...@linaro.org
> Subject: Re: [v4 13/16] KVM: x
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Friday, June 12, 2015 1:15 AM
> To: Wu, Feng
> Cc: kvm@vger.kernel.org; linux-ker...@vger.kernel.org; pbonz...@redhat.com;
> mtosa...@redhat.com; eric.au...@linaro.org
> Subject: Re: [v4 12/16] KVM: k
This patch defines a new function pointer struct (kvm_pmu_ops) to
support vPMU for both Intel and AMD. The functions pointers defined in
this new struct will be linked with Intel and AMD functions later. In the
meanwhile the struct that maps from event_sel bits to PERF_TYPE_HARDWARE
events is renam
This patch enables AMD guest VM to access (R/W) PMU related MSRs, which
include PERFCTR[0..3] and EVNTSEL[0..3].
Reviewed-by: Joerg Roedel
Tested-by: Joerg Roedel
Reviewed-by: Radim Krčmář
Signed-off-by: Wei Huang
---
arch/x86/kvm/x86.c | 51 +--
This patch splits existing vPMU code into a common vPMU interface (pmc.c)
and Intel specific vPMU code (pmu_intel.c) using the following steps:
- Part of arechitectural vPMU code is extracted and moved to pmu_intel.c
file. They are hooked up with the newly-defined intel_pmu_ops, which will
be
Currently KVM only supports vPMU for Intel CPUs. This patchset enables
KVM vPMU support for AMD platform by creating a common PMU interface
for x86. By refractoring, PMU related MSR accesses from guest VMs
are dispatched to corresponding functions defined in arch specific
files.
This patchset is d
This patch replaces the empty AMD vPMU functions (in pmu_amd.c) with real
implementation.
Reviewed-by: Joerg Roedel
Tested-by: Joerg Roedel
Signed-off-by: Wei Huang
---
arch/x86/kvm/pmu_amd.c | 122 ++---
1 file changed, 116 insertions(+), 6 deletion
https://bugzilla.kernel.org/show_bug.cgi?id=99861
Bug ID: 99861
Summary: KVM: Linux host warns "user requested TSC rate below
hardware speed" on the Baytrail-I platform when start
a guest
Product: Virtualization
V
https://bugzilla.kernel.org/show_bug.cgi?id=99861
--- Comment #1 from Lan Tianyu ---
Created attachment 179781
--> https://bugzilla.kernel.org/attachment.cgi?id=179781&action=edit
draft fix patch
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