Re: nVMX MSR load/store feature

2014-12-14 Thread Paolo Bonzini
On 14/12/2014 02:17, Eugene Korenevsky wrote: > Hi there, > > Please DO NOT take v3 version of patchset in account. It contains bug > (missing check for MSR load/store area size in > `nested_vmx_check_msr_switch`). This bug has been fixed in v4 version > of patchset. > > Now MSR load/store feat

using cgroups with KVM

2014-12-14 Thread mad Engineer
hello all, i am trying to limit RAM usage of guests using memory cgroup. testing on a virtual machine with Nested virtualization enabled. What happens when memory.usage_in_bytes = memory.limit_in_bytes ? Is it going to swap extra memory? Thanks for your help -- To unsubscribe from th

Re: [PATCH v2 6/6] arm/arm64: KVM: Require in-kernel vgic for the arch timers

2014-12-14 Thread Marc Zyngier
On Sat, Dec 13 2014 at 11:17:29 AM, Christoffer Dall wrote: > It is curently possible to run a VM with architected timers support > without creating an in-kernel VGIC, which will result in interrupts from > the virtual timer going nowhere. > > To address this issue, move the architected timers in

Re: [PATCH v2 5/6] arm/arm64: KVM: Initialize the vgic on-demand when injecting IRQs

2014-12-14 Thread Marc Zyngier
On Sat, Dec 13 2014 at 11:17:28 AM, Christoffer Dall wrote: > Userspace assumes that it can wire up IRQ injections after having > created all VCPUs and after having created the VGIC, but potentially > before starting the first VCPU. This can currently lead to lost IRQs > because the state of tha

Re: [PATCH v2 6/6] arm/arm64: KVM: Require in-kernel vgic for the arch timers

2014-12-14 Thread Christoffer Dall
On Sun, Dec 14, 2014 at 11:33:04AM +, Marc Zyngier wrote: > On Sat, Dec 13 2014 at 11:17:29 AM, Christoffer Dall > wrote: > > It is curently possible to run a VM with architected timers support > > without creating an in-kernel VGIC, which will result in interrupts from > > the virtual timer

Problem with KVM when using XSAVES in host

2014-12-14 Thread Nadav Amit
I encountered an interesting and annoying problem when KVM uses XSAVES/XRSTORS. The problem results from the fact XSAVES does not save the exact value of XINUSE[1]. See Intel SDM 13.10 “Operation of XSAVES”: “...if RFBM[1] = 1 and MXCSR does not have the value 1F80H, XSAVEC writes XSTATE_BV[1] as

Re: Problem with KVM when using XSAVES in host

2014-12-14 Thread Paolo Bonzini
On 14/12/2014 15:31, Nadav Amit wrote: > This behaviour hurts the “equivalence property” - the VM does not behave as > bare-metal system. Moreover, it may hurt the VM performance if the VM uses > XSAVEOPT (and not XSAVES), has MXCSR with value different than the reset > value of 1F80H and has all

Re: nested KVM slower than QEMU with gnumach guest kernel

2014-12-14 Thread Samuel Thibault
Hello, Just FTR, it seems that the overhead is due to gnumach somtimes using the PIC quite a lot. It used not to be too much a concern with just kvm, but kvm on kvm becomes too expensive for that. I've fixed gnumach into being a lot more reasonable, and the performance issues got away. Samuel -

Re: [PATCH] KVM: x86: reset RVI upon system reset

2014-12-14 Thread Zhang Haoyu
On 2014-12-12 18:27:14, Paolo Bonzini wrote: > > >On 12/12/2014 10:56, Zhang Haoyu wrote: >> Strange, I didn't find this commit in >> https://git.kernel.org/cgit/virt/kvm/kvm.git/log/ >> but found it from the repository downloaded by git clone >> git://git.kernel.org/pub/scm/virt/kvm/kvm.git > >

[PATCH v15 00/11] KVM//x86/arm/arm64: dirty page logging for ARMv7/8 (3.18.0-rc2)

2014-12-14 Thread Mario Smarduch
Patch series adds support for armv7/8 dirty page logging. Also we move towards generic dirty page logging interface and move some common code to generic layer currently shared by x86, armv7 and armv8. armv7/8 Dirty page logging implementation overivew- - initially write protects memory region 2

[PATCH v15 01/11] KVM: Add architecture-defined TLB flush support

2014-12-14 Thread Mario Smarduch
Allow architectures to override the generic kvm_flush_remote_tlbs() function via HAVE_KVM_ARCH_TLB_FLUSH_ALL. ARMv7 will need this to provide its own TLB flush interface. Reviewed-by: Christoffer Dall Reviewed-by: Marc Zyngier Reviewed-by: Paolo Bonzini Signed-off-by: Mario Smarduch --- virt/

[PATCH v15 02/11] KVM: Add generic support for dirty page logging

2014-12-14 Thread Mario Smarduch
kvm_get_dirty_log() provides generic handling of dirty bitmap, currently reused by several architectures. Building on that we intrdoduce kvm_get_dirty_log_protect() adding write protection to mark these pages dirty for future write access, before next KVM_GET_DIRTY_LOG ioctl call from user space.

[PATCH v15 03/11] KVM: x86: switch to kvm_get_dirty_log_protect

2014-12-14 Thread Mario Smarduch
From: Paolo Bonzini We now have a generic function that does most of the work of kvm_vm_ioctl_get_dirty_log, now use it. Acked-by: Christoffer Dall Signed-off-by: Mario Smarduch --- arch/x86/include/asm/kvm_host.h | 3 -- arch/x86/kvm/Kconfig| 1 + arch/x86/kvm/mmu.c

[PATCH v15 04/11] KVM: arm: Add ARMv7 API to flush TLBs

2014-12-14 Thread Mario Smarduch
This patch adds ARMv7 architecture TLB Flush function. Acked-by: Marc Zyngier Acked-by: Christoffer Dall Signed-off-by: Mario Smarduch --- arch/arm/include/asm/kvm_asm.h | 1 + arch/arm/include/asm/kvm_host.h | 12 arch/arm/kvm/Kconfig| 1 + arch/arm/kvm/interrupts.

[PATCH v15 05/11] KVM: arm: Add initial dirty page locking support

2014-12-14 Thread Mario Smarduch
Add support for initial write protection of VM memslots. This patch series assumes that huge PUDs will not be used in 2nd stage tables, which is always valid on ARMv7 Signed-off-by: Mario Smarduch --- arch/arm/include/asm/kvm_host.h | 2 + arch/arm/include/asm/kvm_mmu.h| 21

[PATCH v15 06/11] KVM: arm: dirty logging write protect support

2014-12-14 Thread Mario Smarduch
Add support to track dirty pages between user space KVM_GET_DIRTY_LOG ioctl calls. We call kvm_get_dirty_log_protect() function to do most of the work. Reviewed-by: Marc Zyngier Signed-off-by: Mario Smarduch --- arch/arm/kvm/Kconfig | 1 + arch/arm/kvm/arm.c | 34

[PATCH v15 07/11] KVM: arm: page logging 2nd stage fault handling

2014-12-14 Thread Mario Smarduch
This patch adds support for handling 2nd stage page faults during migration, it disables faulting in huge pages, and dissolves huge pages to page tables. In case migration is canceled huge pages are used again. Also since last version an issues was found on SMP host running SMP Guest and clearin

[PATCH v15 09/11] KVM: arm64: Add HYP interface to flush VM Stage 1/2 TLB entires

2014-12-14 Thread Mario Smarduch
This patch adds support for arm64 hyp interface to flush all TLBs associated with VMID. Reviewed-by: Christoffer Dall Signed-off-by: Mario Smarduch --- arch/arm64/kvm/hyp.S | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S in

[PATCH v15 08/11] KVM: arm64: ARMv8 header changes for page logging

2014-12-14 Thread Mario Smarduch
This patch adds arm64 helpers to write protect pmds/ptes and retrieve permissions while logging dirty pages. Also adds prototype to write protect a memory slot and adds a pmd define to check for read-only pmds. Reviewed-by: Christoffer Dall Signed-off-by: Mario Smarduch --- arch/arm64/include/a

[PATCH v15 10/11] KVM: arm/arm64: Enable Dirty Page logging for ARMv8

2014-12-14 Thread Mario Smarduch
This patch enables ARMv8 ditry page logging support. Plugs ARMv8 into generic layer through Kconfig symbol, and drops earlier ARM64 constraints to enable logging at architecture layer. Signed-off-by: Mario Smarduch --- arch/arm/include/asm/kvm_host.h | 12 arch/arm/kvm/arm.c

[PATCH v15 11/11] KVM: arm/arm64: Add support to dissolve huge PUD

2014-12-14 Thread Mario Smarduch
This patch adds the same support for PUD huge page as for PMD. Huge PUD is write protected for initial memory region write protection. Code to dissolve huge PUD is supported in user_mem_abort(). At this time this code has not been tested, but similar approach to current ARMv8 page logging test i