Here are three small fixes for the PPC Book 3S code. The first should
go into 3.16 if possible, I think, or if not, certainly 3.17. The
remaining two are less urgent and should go into 3.17.
The patch series is against Alex Graf's kvm-ppc-queue branch.
Paul.
Documentation/virtual/kvm/api.txt
At present, kvmppc_ld calls kvmppc_xlate, and if kvmppc_xlate returns
any error indication, it returns -ENOENT, which is taken to mean an
HPTE not found error. However, the error could have been a segment
found (no SLB entry) or a permission error. Similarly,
kvmppc_pte_to_hva currently does perm
From: Alexey Kardashevskiy
Unfortunately, the LPCR got defined as a 32-bit register in the
one_reg interface. This is unfortunate because KVM allows userspace
to control the DPFD (default prefetch depth) field, which is in the
upper 32 bits. The result is that DPFD always get set to 0, which
re
This does for PR KVM what c9438092cae4 ("KVM: PPC: Book3S HV: Take SRCU
read lock around kvm_read_guest() call") did for HV KVM, that is,
eliminate a "suspicious rcu_dereference_check() usage!" warning by
taking the SRCU lock around the call to kvmppc_rtas_hcall().
It also fixes a return of RESUME
This series aims to increase the range of instructions that KVM on PPC
can emulate and reduce code duplication by using the existing
instruction emulation code from arch/powerpc/lib/sstep.c for KVM.
The ultimate goal is to make PR KVM run faster on the kind of
instruction sequences that we get in
This replaces the gpr, pc, ctr, lr, xer, cr and trap fields in the
struct vcpu_arch with a regs field, which is a struct pt_regs.
Similarly, it replaces gpr_tm, cr_tm, lr_tm, and ctr_tm with a
regs_tm field. This then necessitates changes to the accessors
in kvm_book3s.h and kvm_booke.h, and chang
This changes kvmppc_emulate_instruction() to use the common instruction
decoding code from arch/powerpc/lib/sstep.c. This expands the set of
instructions that we recognize to include all of the integer load and
store instructions except for the string (lsw*, stsw*) and multiple
(lmw, stmw) instruc
This splits out the instruction analysis part of emulate_step() into
a separate analyse_instr() function, which decodes the instruction,
but doesn't execute any load or store instructions. It does execute
integer instructions and branches which can be executed purely by
updating register values in
The size field of the op.type word is now the total number of bytes
to be loaded or stored.
Also implement mcrf.
Signed-off-by: Paul Mackerras
---
arch/powerpc/lib/sstep.c | 66
1 file changed, 56 insertions(+), 10 deletions(-)
diff --git a/arch
At present, kvmppc_handle_load and kvmppc_handle_store only handle
emulated MMIO loads and stores. This extends them to be able to handle
loads and stores to guest memory as well. This is so that
kvmppc_emulate_instruction can be used to emulate loads and stores
in cases other than when an attemp
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