On Tue, May 27, 2014 at 06:30:23PM -0700, Mario Smarduch wrote:
> On 05/27/2014 01:19 PM, Christoffer Dall wrote:
> > On Thu, May 15, 2014 at 11:27:31AM -0700, Mario Smarduch wrote:
> >> This patch adds support for handling 2nd stage page faults during
> >> migration,
> >> it disables faulting in
Hi,
In kvm_set_msr_common(), I see that the follow piece of code will
handle the write operation to the register MSR_K7_HWCR.
case MSR_K7_HWCR:
data &= ~(u64)0x40; /* ignore flush filter disable */
data &= ~(u64)0x100; /* ignore ignne emulation enable */
data &= ~(u6
Linus,
The following changes since commit 89ca3b881987f5a4be4c5dbaa7f0df12bbdde2fd:
Linux 3.15-rc4 (2014-05-04 18:14:42 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/virt/kvm/kvm.git tags/for-linus
for you to fetch changes up to a4e91d04b86504f145cc5f766c26093
On Tue, May 27, 2014 at 02:55:21PM -0700, Mario Smarduch wrote:
> On 05/27/2014 01:12 PM, Christoffer Dall wrote:
> > On Thu, May 15, 2014 at 11:27:30AM -0700, Mario Smarduch wrote:
[...]
> >> +
> >> + /* If pgd, pud, pmd not present and you cross pmd range check next
> >> + * index.
> >> +
On 25/05/14 16:34, Christoffer Dall wrote:
> On Tue, May 20, 2014 at 05:55:36PM +0100, Marc Zyngier wrote:
>> This patch series adds debug support, a key feature missing from the
>> KVM/arm64 port.
>>
>> The main idea is to keep track of whether the debug registers are
>> "dirty" (changed by the gu
On Wed, May 28, 2014 at 10:56:45AM +0100, Marc Zyngier wrote:
> On 25/05/14 16:34, Christoffer Dall wrote:
> > On Tue, May 20, 2014 at 05:55:36PM +0100, Marc Zyngier wrote:
> >> This patch series adds debug support, a key feature missing from the
> >> KVM/arm64 port.
> >>
> >> The main idea is to k
On 28/05/14 10:58, Christoffer Dall wrote:
> On Wed, May 28, 2014 at 10:56:45AM +0100, Marc Zyngier wrote:
>> On 25/05/14 16:34, Christoffer Dall wrote:
>>> On Tue, May 20, 2014 at 05:55:36PM +0100, Marc Zyngier wrote:
This patch series adds debug support, a key feature missing from the
K
On 25/05/14 16:34, Christoffer Dall wrote:
> On Tue, May 20, 2014 at 05:55:39PM +0100, Marc Zyngier wrote:
>> Add handlers for all the AArch64 debug registers that are accessible
>> from EL0 or EL1. The trapping code keeps track of the state of the
>> debug registers, allowing for the switch code t
On 25/05/14 16:34, Christoffer Dall wrote:
> On Tue, May 20, 2014 at 05:55:40PM +0100, Marc Zyngier wrote:
>> As we're about to trap a bunch of CP14 registers, let's rework
>> the CP15 handling so it can be generalized and work with multiple
>> tables.
>>
>> Reviewed-by: Anup Patel
>> Signed-off-b
https://bugzilla.kernel.org/show_bug.cgi?id=76331
--- Comment #5 from Matt ---
Hi Alex,
Great news !
Yesterday I had the opportunity to recompile my kernel with your suggested fix
in intel-iommu driver : dmar_domain->gaw = min(dmar_domain->gaw, addr_width);
After multiple tests I can confirm th
Hi,
Is there any work in progress on releasing VCPUs while the VM is still
in progress (Hot unplugging) ?
The following patches were not accepted.
Thanks
Anshul Makkar
www.justkernel.com
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In virtualized environment there are mainly three problems
related to spinlocks that affect performance.
1. LHP (lock holder preemption)
2. Lock Waiter Preemption (LWP)
3. Starvation/fairness
Though ticketlocks solve the fairness problem, it worsens LWP, LHP problems.
pv-ticketlocks tried to addr
On 26.05.14 11:48, Paul Mackerras wrote:
This series of patches fixes a few bugs that have been found in
testing HV KVM recently. It also adds workarounds for a couple of
POWER8 PMU bugs, fixes the definition of KVM_REG_PPC_WORT, and adds
some things that were missing from Documentation/virtual
On Wed, 28 May 2014 13:59:31 +0200
Anshul Makkar wrote:
> Hi,
>
> Is there any work in progress on releasing VCPUs while the VM is still
> in progress (Hot unplugging) ?
As far as I know nobody works on it yet.
>
> The following patches were not accepted.
>
> Thanks
> Anshul Makkar
> www.just
On 26.05.14 14:17, Paul Mackerras wrote:
This provides a way for userspace controls which PAPR hcalls get
handled in the kernel. Each hcall can be individually enabled or
disabled for in-kernel handling, except for H_RTAS. The exception
for H_RTAS is because userspace can already control wheth
On 26.05.14 14:17, Paul Mackerras wrote:
This adds code to check that when the KVM_CAP_PPC_ENABLE_HCALL
capability is used to enable or disable in-kernel handling of an
hcall, that the hcall is actually implemented by the kernel.
If not an EINVAL error is returned.
Signed-off-by: Paul Mackerras
On 26.05.14 14:17, Paul Mackerras wrote:
From: Michael Neuling
This adds support for the H_SET_MODE hcall. This hcall is a
multiplexer that has several functions, some of which are called
rarely, and some which are potentially called very frequently.
Here we add support for the functions that
On Tue, May 27, 2014 at 11:24:19AM +0100, Marc Zyngier wrote:
> The recent introduction of bi-endianness on arm/arm64 had the
> odd effect of breaking virtio-pci support on these platforms, as the
> device endian field defaults to being VIRTIO_ENDIAN_HOST, which
> is the wrong thing to have on a bi
On 17.05.14 07:36, Paul Mackerras wrote:
On Thu, May 15, 2014 at 02:43:53PM +0200, Alexander Graf wrote:
On LPAR guest systems Linux enables the shadow SLB to indicate to the
hypervisor a number of SLB entries that always have to be available.
Today we go through this shadow SLB and disable al
Hi Paolo, David, Andreas,
On 26/04/14 10:37, Paolo Bonzini wrote:
> Il 26/04/2014 00:34, James Hogan ha scritto:
>> So yes, you could technically manage without (4) by using (2) ((4) was
>> implemented first), but I think it probably still has some value since
>> you can
>> do it with a single ioc
We didn't make use of SLB entry 0 because ... of no good reason. SLB entry 0
will always be used by the Linux linear SLB entry, so the fact that slbia
does not invalidate it doesn't matter as we overwrite SLB 0 on exit anyway.
Just enable use of SLB entry 0 for our shadow SLB code.
Signed-off-by:
On LPAR guest systems Linux enables the shadow SLB to indicate to the
hypervisor a number of SLB entries that always have to be available.
Today we go through this shadow SLB and disable all ESID's valid bits.
However, pHyp doesn't like this approach very much and honors us with
fancy machine chec
On 25/05/14 16:35, Christoffer Dall wrote:
> On Tue, May 20, 2014 at 05:55:43PM +0100, Marc Zyngier wrote:
>> Add handlers for all the AArch32 debug registers that are accessible
>> from EL0 or EL1. The code follow the same strategy as the AArch64
>> counterpart with regards to tracking the dirty s
On 25/05/14 16:36, Christoffer Dall wrote:
> On Tue, May 20, 2014 at 05:55:45PM +0100, Marc Zyngier wrote:
>> Enable trapping of the debug registers, preventing the guests to
>> mess with the host state (and allowing guests to use the debug
>> infrastructure as well).
>>
>> Reviewed-by: Anup Patel
Il 28/05/2014 16:21, James Hogan ha scritto:
The implementation in QEMU that I've settled upon makes do with just
COUNT_CTL and COUNT_RESUME, but with a slight kernel modification so
that COUNT_RESUME is writeable (to any positive monotonic nanosecond
value <= now). It works fairly cleanly and co
Running a 3.14.4 x86-64 SMP guest kernel on qemu-2.0, with kvm enabled and
-cpu host on a 3.14.4 AMD Opteron host, I'm seeing a reliable kernel panic from
the guest shortly after boot. I think is happening in kvm_unlock_kick() in the
paravirt_ops code:
divide error: [#1] PREEMPT SMP
Modules
On 05/28/2014 01:09 AM, Christoffer Dall wrote:
> On Tue, May 27, 2014 at 06:30:23PM -0700, Mario Smarduch wrote:
>> On 05/27/2014 01:19 PM, Christoffer Dall wrote:
>>> On Thu, May 15, 2014 at 11:27:31AM -0700, Mario Smarduch wrote:
This patch adds support for handling 2nd stage page faults du
On 05/28/2014 02:08 AM, Christoffer Dall wrote:
> On Tue, May 27, 2014 at 02:55:21PM -0700, Mario Smarduch wrote:
>> On 05/27/2014 01:12 PM, Christoffer Dall wrote:
>>> On Thu, May 15, 2014 at 11:27:30AM -0700, Mario Smarduch wrote:
>
> [...]
>
+
+ /* If pgd, pud, pmd not present and y
>emslot dirty_bitmap during and after write protect.
>
>>
>> -Christoffer
Regarding huge pud that's causing some design problems, should huge PUD
pages be considered at all?
Thanks,
Mario
>>
>
> ___
> kvmarm mailing list
> kvm...@lists.cs.columbia.
This should fix following warnings
builtin-stat.c:93:3: warning: format '%llu' expects argument of type 'long
long unsigned int', but argument 2 has type '__u64' [-Wformat]
builtin-run.c:188:4: warning: format '%Lu' expects argument of type 'long long
unsigned int', but argument 3 has type '__
Hi,
This is v3 of my patch set to run lkvm on MIPS.
It's rebased on v3.13-rc1-1436-g1fc83c5 of
git://github.com/penberg/linux-kvm.git
Diffstat is:
tools/kvm/Makefile |9 +-
tools/kvm/arm/fdt.c |7 -
tools/kvm/arm/include/arm-common/kvm
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
tools/kvm/kvm.c |1 +
1 file changed, 1 insertion(+)
diff --git a/tools/kvm/kvm.c b/tools/kvm/kvm.c
index d7d2e84..7bd20d3 100644
--- a/tools/kvm/kvm.c
+++ b/tools/kvm/kvm.c
@@ -286,6 +286,7 @@ int kvm__init(
Signed-off-by: Andreas Herrmann
---
tools/kvm/include/kvm/kvm.h |1 +
tools/kvm/kvm.c | 11 +++
2 files changed, 12 insertions(+)
diff --git a/tools/kvm/include/kvm/kvm.h b/tools/kvm/include/kvm/kvm.h
index f1b71a0..58cb73b 100644
--- a/tools/kvm/include/kvm/kvm.h
+++ b
In order to use it in other C files (in addition to term.c).
Signed-off-by: Andreas Herrmann
---
tools/kvm/include/kvm/term.h |2 ++
tools/kvm/term.c |1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/kvm/include/kvm/term.h b/tools/kvm/include/kvm/term.
This is is usually 0 for most archs. On mips we have two types.
TE (type 0) and MIPS-VZ (type 1). Default to 1 on mips.
Signed-off-by: Andreas Herrmann
---
tools/kvm/arm/include/arm-common/kvm-arch.h |2 ++
tools/kvm/kvm.c |2 +-
tools/kvm/mips/include/kvm/kvm
... to get rid of its function definition from archs that don't
support it.
Signed-off-by: Andreas Herrmann
---
tools/kvm/arm/fdt.c |7 ---
tools/kvm/kvm.c |6 ++
tools/kvm/powerpc/kvm.c |7 ---
3 files changed, 6 insertions(+), 14 deletions(-)
diff --git a/t
From: David Daney
So far this was tested with host running KVM using MIPS-VZ (on Cavium
Octeon3). A paravirtualized mips kernel was used for the guest.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
tools/kvm/mips/include/kvm/barrier.h | 20 +++
tools/kvm/mips/includ
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
tools/kvm/Makefile |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/tools/kvm/Makefile b/tools/kvm/Makefile
index b872651..880d580 100644
--- a/tools/kvm/Makefile
+++ b/tools/kvm/Make
From: David Daney
It doesn't work on big endian hosts as is.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
tools/kvm/pci.c| 16 +---
tools/kvm/virtio/pci.c |6 +++---
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/tools/kvm/pci.c b/t
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
tools/kvm/mips/kvm.c | 200 ++
1 file changed, 200 insertions(+)
[andreas.herrmann:
* Fixed compile warnings]
diff --git a/tools/kvm/mips/kvm.c b/tools/kvm
No caller is currently using the return value but better return
number of bytes written instead of 0 in case of an error.
Cc: Sergei Shtylyov
Signed-off-by: Andreas Herrmann
---
tools/kvm/term.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/kvm/term.c b/tools/kvm/
From: David Daney
It is a performance enhancement. When running in a simulator, each
system call to write a character takes a lot of time. Batching them
up decreases the overhead (in the root kernel) of each virtio console
write.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
Hello,
Some more basic questions..
1. How can I ensure that memory for the a guest is available and
reserved? In other words, I bring up a Linux VM which has 4G
allocated, I want to make sure it has all the 4G available right away.
I saw references to balloon driver, it seemed like that was more f
From: David Daney
Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.
Add r4k_fpu.o to handle low level FPU initialization.
Modify octeon_switch.S to save the FPU registers. And include
r4k_switch.S to pick up more FPU support.
Get rid of "#define
ome rework.
To built a mips_paravirt guest kernel it's easiest to start with
mips_paravirt_defconfig, check/modify CPU selection (defconfig has
CPU_MIPS64_R2), and kick off kernel built.
Patches are against linux-next/master as of today (next-20140528).
(To make use of __BITFIELD_FIELD macro.)
From: David Daney
CVMSEG is related to the CPU core not the SoC system. So needs to be
configurable there.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/cavium-octeon/Kconfig | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --
From: David Daney
They are a property of the SoC not the CPU itself.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/Kconfig | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 125edd4..d540945 1
From: David Daney
The TLB handlers cannot handle this case, so disable it for now.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/include/asm/cpu-features.h |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/cpu-featu
From: David Daney
The fast handler only supports 64-bit kernels.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/mm/tlbex.c |8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index f99ec587..af91f
From: David Daney
This returns the CPUNum from the low order Ebase bits.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/include/asm/mipsregs.h |9 +
arch/mips/kernel/cpu-probe.c |2 +-
2 files changed, 10 insertions(+), 1 deletion(-)
[andreas.her
From: David Daney
These are needed to boot a generic mips64r2 kernel on OCTEONIII.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/include/asm/r4kcache.h |2 ++
arch/mips/mm/c-r4k.c | 48 ++
2 files changed, 46 ins
Signed-off-by: Andreas Herrmann
---
arch/mips/configs/mips_paravirt_defconfig | 103 +
1 file changed, 103 insertions(+)
create mode 100644 arch/mips/configs/mips_paravirt_defconfig
diff --git a/arch/mips/configs/mips_paravirt_defconfig
b/arch/mips/configs/mips_par
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/Kconfig|1 +
arch/mips/paravirt/Kconfig |6 ++
arch/mips/pci/Makefile |2 +-
arch/mips/pci/pci-virtio-guest.c | 131 ++
4
From: David Daney
For para-virtualized guests running under KVM or other equivalent
hypervisor.
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
.../asm/mach-paravirt/cpu-feature-overrides.h | 36 ++
arch/mips/include/asm/mach-paravirt/irq.h | 19 +
.../include
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Andreas Herrmann
---
arch/mips/Kbuild.platforms |1 +
arch/mips/Kconfig | 19 +++
2 files changed, 20 insertions(+)
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index 6e23912..f5
Otherwise __builtin_unreachable might be called.
Signed-off-by: Andreas Herrmann
---
arch/mips/include/asm/cpu-type.h |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index e3308b4..b4e2bd8 100644
--- a/arch/mips/include/a
From: David Daney
Introduce kvm_hypercall[0-3].
Define three new hypercalls for MIPS: GET_CLOCK_FREQ, EXIT_VM, and
CONSOLE_OUTPUT.
[andreas.herrmann:
* Properly define hypercalls and HC numbers for MIPS
in kvm_para.h header files]
Signed-off-by: David Daney
Signed-off-by: Andreas Herrman
On Tue, May 27, 2014 at 09:07:42PM -0600, Bjorn Helgaas wrote:
> On Tue, May 20, 2014 at 08:53:21AM -0600, Alex Williamson wrote:
> > The driver_override field allows us to specify the driver for a device
> > rather than relying on the driver to provide a positive match of the
> > device. This sho
On 05/28/2014 08:16 AM, Raghavendra K T wrote:
This patch looks very promising.
> TODO:
> - we need an intelligent way to nullify the effect of batching for baremetal
> (because extra cmpxchg is not required).
On (larger?) NUMA systems, the unfairness may be a nice performance
benefit, reducing
On Wed, May 21, 2014 at 02:44:49PM +0100, James Hogan wrote:
> On 20/05/14 15:47, Andreas Herrmann wrote:
> > Signed-off-by: Andreas Herrmann
>
> Does it make sense to provide a _machine_restart too?
Hmm, I've not seen a real need for this so far.
(Halting the guest and relaunching it from the s
On Tue, May 20, 2014 at 08:53:21AM -0600, Alex Williamson wrote:
> The driver_override field allows us to specify the driver for a device
> rather than relying on the driver to provide a positive match of the
> device. This shortcuts the existing process of looking up the vendor
> and device ID, a
On Thu, May 22, 2014 at 10:17:07PM +0200, Andreas Herrmann wrote:
> On Wed, May 21, 2014 at 12:42:52PM +0100, James Hogan wrote:
> > On 20/05/14 15:47, Andreas Herrmann wrote:
> > > From: David Daney
> > >
> > > Signed-off-by: David Daney
> > > Signed-off-by: Andreas Herrmann
> > > ---
> > > a
On Wed, May 28, 2014 at 2:55 PM, Rik van Riel wrote:
>
> Or maybe cmpxchg is cheap once you already own the cache line
> exclusively?
A locked cmpxchg ends up being anything between ~15-50 cycles
depending on microarchitecture if things are already exclusively in
the cache (with the P4 being an o
On Wed, 28 May 2014, Linus Torvalds wrote:
>
> If somebody has a P4 still, that's likely the worst case by far.
I do, but I'm only using it during winter and only if the ia64 machine
does not provide sufficient heating. So you have to wait at least half
a year until I'm able to test it.
--
To uns
On Thursday 29 May 2014 00:04:18 Andreas Herrmann wrote:
> On Wed, May 21, 2014 at 02:44:49PM +0100, James Hogan wrote:
> > On 20/05/14 15:47, Andreas Herrmann wrote:
> > > Signed-off-by: Andreas Herrmann
> >
> > Does it make sense to provide a _machine_restart too?
>
> Hmm, I've not seen a real
On 05/28/2014 06:19 PM, Linus Torvalds wrote:
> If somebody has a P4 still, that's likely the worst case by far.
I'm sure cmpxchg isn't the only thing making P4 the worst case :)
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Little bit more details on this question -
For 2nd stage 3-level tables PUD blocks don't exist - although
it appears you can have a PGD block but I don't see any
support for that. But should the code still work as if PUDs
(4-level table) are used and check for pud_huge()?
Looking at ARMv8 there
On Wed, May 28, 2014 at 03:27:32PM +0200, Alexander Graf wrote:
>
> On 26.05.14 14:17, Paul Mackerras wrote:
> >+6.8 KVM_CAP_PPC_ENABLE_HCALL
> >+
> >+Architectures: ppc
> >+Parameters: args[0] is the PAPR hcall number
> >+args[1] is 0 to disable, 1 to enable in-kernel handling
> >+
> >+Th
Alex,
> > +static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
> > +unsigned long resource, unsigned long value1,
> > +unsigned long value2)
> > +{
> > + switch (resource) {
> > + case H_SET_MODE_RESOURCE_SET_CIABR:
> > +
Hi Gleb,
On 05/23/2014 05:43 PM, Gleb Natapov wrote:
> CCing Paolo.
>
> On Tue, May 20, 2014 at 01:45:55PM +0800, Gu Zheng wrote:
>> Hi Gleb,
>> Excuse me for offline noisy.
> You will get much quicker response if you'll post to the list :)
Got it.:)
>
>> There was a patch(from Chen Fan, last
>>>1. How can I ensure that memory for the a guest is available and reserved?
>>>In other words, I bring up a Linux VM which has 4G allocated, I want to make
>>>sure it has all the 4G available right away.
I saw references to balloon driver, it seemed like that was more for dynamic
memory exchan
This adds support for the H_SET_MODE hcall. This hcall is a
multiplexer that has several functions, some of which are called
rarely, and some which are potentially called very frequently.
Here we add support for the functions that set the debug registers
CIABR (Completed Instruction Address Breakp
> Am 29.05.2014 um 07:27 schrieb Paul Mackerras :
>
>> On Wed, May 28, 2014 at 03:27:32PM +0200, Alexander Graf wrote:
>>
>>> On 26.05.14 14:17, Paul Mackerras wrote:
>>> +6.8 KVM_CAP_PPC_ENABLE_HCALL
>>> +
>>> +Architectures: ppc
>>> +Parameters: args[0] is the PAPR hcall number
>>> +a
On Wed, May 28, 2014 at 05:46:39PM +0530, Raghavendra K T wrote:
> In virtualized environment there are mainly three problems
> related to spinlocks that affect performance.
> 1. LHP (lock holder preemption)
> 2. Lock Waiter Preemption (LWP)
> 3. Starvation/fairness
>
> Though ticketlocks solve t
> Hello,
> Some more basic questions..
>
> 1. How can I ensure that memory for the a guest is available and
> reserved? In other words, I bring up a Linux VM which has 4G
> allocated, I want to make sure it has all the 4G available right away.
> I saw references to balloon driver, it seemed like t
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