On 2011-06-06 08:30, Gerd Hoffmann wrote:
>Hi,
>
>> As Jan points out though, is a dynamic PCI region really needed?
>> Those that need a large PCI region are also likely to need a large
>> amount of memory. Maybe the space for PCI should just be increased.
>
> Just changing it will not work
Hi,
As Jan points out though, is a dynamic PCI region really needed?
Those that need a large PCI region are also likely to need a large
amount of memory. Maybe the space for PCI should just be increased.
Just changing it will not work as it will break live migration.
I think one option is
On Wed, Jun 01, 2011 at 11:20:29PM +0900, Isaku Yamahata wrote:
> On Wed, Jun 01, 2011 at 09:30:12AM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> >> 0xE000 is hard-coded in the DSDT for both piix and q35 as below.
> >> If the range is determined dynamically, the area also needs to be
> >> update
On Wed, Jun 01, 2011 at 04:40:15PM +0200, Rudolf Marek wrote:
> >Having a brief look at the coreboot code it seems static stuff (compiled by
> >iasl) and dynamic bits are combined into the final dsdt table, is that
> >correct?
>
> Yes the dsdt is static, it has just external references to ssdt
>
Having a brief look at the coreboot code it seems static stuff (compiled by
iasl) and dynamic bits are combined into the final dsdt table, is that correct?
Yes the dsdt is static, it has just external references to ssdt which is
dynamically generated using the acpigen.
Acpigen can generate th
On Wed, 2011-06-01 at 16:31 +0200, Jan Kiszka wrote:
> On 2011-06-01 16:20, Isaku Yamahata wrote:
> > On Wed, Jun 01, 2011 at 09:30:12AM +0200, Gerd Hoffmann wrote:
> >> Hi,
> >>
> >>> 0xE000 is hard-coded in the DSDT for both piix and q35 as below.
> >>> If the range is determined dynamicall
On 2011-06-01 16:20, Isaku Yamahata wrote:
> On Wed, Jun 01, 2011 at 09:30:12AM +0200, Gerd Hoffmann wrote:
>> Hi,
>>
>>> 0xE000 is hard-coded in the DSDT for both piix and q35 as below.
>>> If the range is determined dynamically, the area also needs to be
>>> updated somehow dynamically.
>>>
On Wed, Jun 01, 2011 at 09:30:12AM +0200, Gerd Hoffmann wrote:
> Hi,
>
>> 0xE000 is hard-coded in the DSDT for both piix and q35 as below.
>> If the range is determined dynamically, the area also needs to be
>> updated somehow dynamically.
>>
>> ...
>> Name (_CRS, ResourceTemplat
On 06/01/11 12:20, Rudolf Marek wrote:
Sorry I forgot to include all addresses.
I don't know how much work it would be to generate the DSDT
dynamically from
Qemu, but IMHO that's the sanest way to make things flexible. We could
probably even extract most information from the Qdev tree.
Well I
On 06/01/2011 02:16 PM, Alexander Graf wrote:
>>
>
> Generating the DSDT dynamically is hard, but the DSDT itself is dynamic.
You can make any function talk to the firmware configuration interface and return
results that depend on the information there.
Does that hold true for nodes as well?
On 01.06.2011, at 13:13, Avi Kivity wrote:
> On 06/01/2011 12:56 PM, Alexander Graf wrote:
>> On 01.06.2011, at 09:30, Gerd Hoffmann wrote:
>>
>> > Hi,
>> >
>> >> 0xE000 is hard-coded in the DSDT for both piix and q35 as below.
>> >> If the range is determined dynamically, the area also
On 06/01/2011 12:56 PM, Alexander Graf wrote:
On 01.06.2011, at 09:30, Gerd Hoffmann wrote:
> Hi,
>
>> 0xE000 is hard-coded in the DSDT for both piix and q35 as below.
>> If the range is determined dynamically, the area also needs to be
>> updated somehow dynamically.
>>
>> ...
>>
Sorry I forgot to include all addresses.
I don't know how much work it would be to generate the DSDT dynamically from
Qemu, but IMHO that's the sanest way to make things flexible. We could
probably even extract most information from the Qdev tree.
Well I have written for coreboot a ACPI byteco
On 01.06.2011, at 09:30, Gerd Hoffmann wrote:
> Hi,
>
>> 0xE000 is hard-coded in the DSDT for both piix and q35 as below.
>> If the range is determined dynamically, the area also needs to be
>> updated somehow dynamically.
>>
>> ...
>> Name (_CRS, ResourceTemplate ()
>> ...
>>
Hi,
0xE000 is hard-coded in the DSDT for both piix and q35 as below.
If the range is determined dynamically, the area also needs to be
updated somehow dynamically.
...
Name (_CRS, ResourceTemplate ()
...
DWordMemory (ResourceProducer, PosDecode, MinFixed, Max
On Mon, May 30, 2011 at 09:34:07AM +0200, Gerd Hoffmann wrote:
> Hi,
>
>> If I am not mistaken then the graphics card needs 2 bars, one with 256MB
>> and one with 128K. The sound card then needs 1 bar with 16K of PCI memory.
>> How big is the PCI memory with seabios?
>
> Some comments on that (ap
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