On Tue, Feb 28, 2012 at 07:38:34PM +0200, Avi Kivity wrote:
> On 02/28/2012 07:36 PM, David Ahern wrote:
> > I was to suggest the reverse: since this patch addesses an AMD bug,
> > why not push those functions into perf_event_amd.c and make them
> > dependent on CONFIG_CPU_SUP_AMD as well.
>
> It
On 02/28/2012 07:36 PM, David Ahern wrote:
> On 2/28/12 10:24 AM, Avi Kivity wrote:
>> On 02/28/2012 05:55 PM, Joerg Roedel wrote:
>>>
>>> __init int amd_pmu_init(void)
>>> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
>>> index 5fa553b..773fee2 100644
>>> --- a/arch/x86/kvm/svm.c
>>> +++
On 2/28/12 10:24 AM, Avi Kivity wrote:
On 02/28/2012 05:55 PM, Joerg Roedel wrote:
__init int amd_pmu_init(void)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 5fa553b..773fee2 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -29,6 +29,7 @@
#include
#include
+#incl
On 02/28/2012 05:55 PM, Joerg Roedel wrote:
>
> __init int amd_pmu_init(void)
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 5fa553b..773fee2 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -29,6 +29,7 @@
> #include
> #include
>
> +#include
> #include
>
It turned out that a performance counter on AMD does not
count at all when the GO or HO bit is set in the control
register and SVM is disabled in EFER.
This patch works around this issue by masking out the HO bit
in the performance counter control register when SVM is not
enabled.
The GO bit is n
