On 08/18/2015 10:57 PM, Paolo Bonzini wrote:
On 18/08/2015 11:30, Avi Kivity wrote:
KVM_USER_EXIT in practice should be so rare (at least with in-kernel
LAPIC) that I don't think this matters. KVM_USER_EXIT is relatively
uninteresting, it only exists to provide an alternative to signals
On 08/17/2015 04:15 PM, Paolo Bonzini wrote:
On 16/08/2015 13:27, Avi Kivity wrote:
On 08/05/2015 07:33 PM, Radim Krčmář wrote:
The guest can use KVM_USER_EXIT instead of a signal-based exiting to
userspace. Availability depends on KVM_CAP_USER_EXIT.
Only x86 is implemented so far.
Signed
On 08/05/2015 07:33 PM, Radim Krčmář wrote:
The guest can use KVM_USER_EXIT instead of a signal-based exiting to
userspace. Availability depends on KVM_CAP_USER_EXIT.
Only x86 is implemented so far.
Signed-off-by: Radim Krčmář
---
v2:
* use vcpu ioctl instead of vm one [4/5]
* shrink k
On 06/12/2015 06:41 PM, Alex Williamson wrote:
On Fri, 2015-06-12 at 00:23 +, Wu, Feng wrote:
-Original Message-
From: Avi Kivity [mailto:avi.kiv...@gmail.com]
Sent: Friday, June 12, 2015 3:59 AM
To: Wu, Feng; kvm@vger.kernel.org; linux-ker...@vger.kernel.org
Cc: pbonz...@redhat.com
On 06/11/2015 01:51 PM, Feng Wu wrote:
From: Eric Auger
This patch adds and documents a new KVM_DEV_VFIO_DEVICE group
and 2 device attributes: KVM_DEV_VFIO_DEVICE_FORWARD_IRQ,
KVM_DEV_VFIO_DEVICE_UNFORWARD_IRQ. The purpose is to be able
to set a VFIO device IRQ as forwarded or not forwarded.
th
On 05/27/2015 08:05 PM, Paolo Bonzini wrote:
This brings together the remaining parts of SMM. For now I've left the
"weird" interaction between SMM and NMI blocking, and I'm using the same
format for the state save area (which is also the one used by QEMU) as
the RFC.
It builds on the previous
On 05/27/2015 12:30 PM, Paolo Bonzini wrote:
On 26/05/2015 23:25, Christopher Covington wrote:
On 05/25/2015 08:53 AM, Paolo Bonzini wrote:
On 22/05/2015 13:12, Daniel P. Berrange wrote:
In
particular I don't see why we need to have a SATA controller and ISA/LPC
bridge in every virt machine
On 05/27/2015 05:06 AM, Steve Rutherford wrote:
On Sun, May 24, 2015 at 07:46:03PM +0300, Avi Kivity wrote:
On 05/13/2015 04:47 AM, Steve Rutherford wrote:
Adds KVM_EXIT_IOAPIC_EOI which passes the interrupt vector up to
userspace.
Uses a per VCPU exit bitmap to decide whether or not the
On 05/08/2015 02:20 PM, Paolo Bonzini wrote:
This adds an arch-specific memslot flag that hides slots unless the
VCPU is in system management mode.
Some care is needed in order to limit the overhead of x86_gfn_to_memslot
when compared with gfn_to_memslot. Thankfully, we have __gfn_to_memslot
an
On 05/13/2015 04:47 AM, Steve Rutherford wrote:
Adds KVM_EXIT_IOAPIC_EOI which passes the interrupt vector up to
userspace.
Uses a per VCPU exit bitmap to decide whether or not the IOAPIC needs
to be informed (which is identical to the EOI_EXIT_BITMAP field used
by modern x86 processors, but can
On 05/21/2015 07:21 PM, Paolo Bonzini wrote:
On 21/05/2015 17:48, Avi Kivity wrote:
Lovely!
Note you have memcpy.o instead of memcpy.c.
Doh, and it's not used anyway. Check the repository, and let me know if
OSv boots with it (it probably needs ACPI; Linux doesn't boot virtio
wi
On 05/21/2015 04:51 PM, Paolo Bonzini wrote:
Some of you may have heard about the "Clear Containers" initiative from
Intel, which couple KVM with various kernel tricks to create extremely
lightweight virtual machines. The experimental Clear Containers setup
requires only 18-20 MB to launch a vir
On 04/13/2015 08:57 PM, Jan Kiszka wrote:
On 2015-04-13 19:48, Avi Kivity wrote:
I think that Xen does (or did) something along the lines of disabling
IST usage (by playing with the descriptors in the IDT) and then
re-enabling them when exiting to userspace.
So we would reuse that active stack
On 04/13/2015 08:41 PM, Avi Kivity wrote:
On 04/13/2015 08:35 PM, Jan Kiszka wrote:
On 2015-04-13 19:29, Avi Kivity wrote:
On 04/13/2015 10:01 AM, Jan Kiszka wrote:
On 2015-04-07 07:43, Jan Kiszka wrote:
On 2015-04-05 19:12, Valentine Sinitsyn wrote:
Hi Jan,
On 05.04.2015 13:31, Jan Kiszka
On 04/13/2015 08:35 PM, Jan Kiszka wrote:
On 2015-04-13 19:29, Avi Kivity wrote:
On 04/13/2015 10:01 AM, Jan Kiszka wrote:
On 2015-04-07 07:43, Jan Kiszka wrote:
On 2015-04-05 19:12, Valentine Sinitsyn wrote:
Hi Jan,
On 05.04.2015 13:31, Jan Kiszka wrote:
studying the VM exit logic of
On 04/13/2015 10:01 AM, Jan Kiszka wrote:
On 2015-04-07 07:43, Jan Kiszka wrote:
On 2015-04-05 19:12, Valentine Sinitsyn wrote:
Hi Jan,
On 05.04.2015 13:31, Jan Kiszka wrote:
studying the VM exit logic of Jailhouse, I was wondering when AMD's
vmload/vmsave can be avoided. Jailhouse as well as
7;t route PIC interrupts through the local APIC if the local APIC
config says so. By Ari Kivity.
Maybe Avi Kivity knows this guy.
ths? That should have been Thiemo Seufer (IIRC), but he just committed
the code back then (and is no longer with us, sadly).
Oh… I am sorry - I didn’t know about th
On 03/10/2015 12:47 PM, Paolo Bonzini wrote:
On 09/03/2015 20:49, Avi Kivity wrote:
Yes, and it checked that MAXPHYADDR != 52 before. If you want to set
only one bit, making that bit 51 makes sense anyway for simplicity, so
it is still 99.9% academic. Once processors appear with MAXPHYADDR
On 03/09/2015 09:33 PM, Paolo Bonzini wrote:
On 09/03/2015 18:08, Avi Kivity wrote:
Is the issue emulating a higher MAXPHYADDR on the guest than is
available on the host? I don't think there's any need to support that.
No, indeed. The only problem is that the failure mode is quit
On 03/09/2015 09:38 PM, Paolo Bonzini wrote:
On 09/03/2015 20:19, Avi Kivity wrote:
I can't think of one with reasonable performance either. Perhaps the
maintainers could raise the issue with Intel. It looks academic but it
can happen in real life -- KVM for example used to rely on res
On 03/09/2015 09:07 PM, Nadav Amit wrote:
Avi Kivity wrote:
On 03/09/2015 07:51 PM, Nadav Amit wrote:
Avi Kivity wrote:
On 03/03/2015 11:52 AM, Paolo Bonzini wrote:
In this
case, the VM might expect exceptions when PTE bits which are higher than the
maximum (reported) address width are
On 03/09/2015 07:51 PM, Nadav Amit wrote:
Avi Kivity wrote:
On 03/03/2015 11:52 AM, Paolo Bonzini wrote:
In this
case, the VM might expect exceptions when PTE bits which are higher than the
maximum (reported) address width are set, and it would not get such
exceptions. This problem can
On 03/03/2015 11:52 AM, Paolo Bonzini wrote:
In this
case, the VM might expect exceptions when PTE bits which are higher than the
maximum (reported) address width are set, and it would not get such
exceptions. This problem can easily be experienced by small change to the
existing KVM unit-tests.
On 11/10/2014 02:15 PM, Paolo Bonzini wrote:
On 10/11/2014 11:45, Gleb Natapov wrote:
I tried making also the other shared MSRs the same between guest and
host (STAR, LSTAR, CSTAR, SYSCALL_MASK), so that the user return notifier
has nothing to do. That saves about 4-500 cycles on inl_from_qem
On 09/02/2014 07:46 PM, Paolo Bonzini wrote:
*/
if (unlikely(real_gfn == UNMAPPED_GVA))
goto error;
@@ -1974,10 +1974,28 @@ static void nested_svm_inject_npf_exit(struct kvm_vcpu
*vcpu,
{
struct vcpu_svm *svm = to_svm(vcpu);
- svm->vmcb->con
On 08/18/2014 01:51 PM, Paolo Bonzini wrote:
Il 18/08/2014 12:26, Avi Kivity ha scritto:
On 08/18/2014 01:20 PM, Paolo Bonzini wrote:
Il 18/08/2014 11:50, Wanpeng Li ha scritto:
fpu_activate hook is introduced by commit 6b52d186 (KVM: Activate fpu on
clts), however, there is no user
On 08/18/2014 01:20 PM, Paolo Bonzini wrote:
Il 18/08/2014 11:50, Wanpeng Li ha scritto:
fpu_activate hook is introduced by commit 6b52d186 (KVM: Activate fpu on
clts), however, there is no user currently, this patch drop it.
Reviewed-by: Yang Zhang
Signed-off-by: Wanpeng Li
---
arch/x86/i
On 07/11/2014 11:40 PM, Paolo Bonzini wrote:
Il 11/07/2014 22:05, Alex Williamson ha scritto:
Which will return 'true' for this whether I specify Aligned or not. If
the standard convention is to make it explicit, I'm happy to add the
extra flag, but I think we already #GP on unaligned as imple
On 06/24/2014 07:45 PM, Marcelo Tosatti wrote:
On Sun, Jun 22, 2014 at 09:02:25PM +0200, Andi Kleen wrote:
First, it's not sufficient to pin the debug store area, you also
have to pin the guest page tables that are used to map the debug
store. But even if you do that, as soon as the guest fork
On 05/30/2014 04:12 AM, Andi Kleen wrote:
From: Andi Kleen
PEBS (Precise Event Bases Sampling) profiling is very powerful,
allowing improved sampling precision and much additional information,
like address or TSX abort profiling. cycles:p and :pp uses PEBS.
This patch enables PEBS profiling i
On 06/19/2014 09:26 PM, Marcelo Tosatti wrote:
On Thu, Jun 19, 2014 at 11:01:06AM +0300, Avi Kivity wrote:
On 06/19/2014 02:12 AM, mtosa...@redhat.com wrote:
Allow vcpus to pin spte translations by:
1) Creating a per-vcpu list of pinned ranges.
2) On mmu reload request:
- Fault
On 06/19/2014 02:12 AM, mtosa...@redhat.com wrote:
Allow vcpus to pin spte translations by:
1) Creating a per-vcpu list of pinned ranges.
2) On mmu reload request:
- Fault ranges.
- Mark sptes with a pinned bit.
- Mark shadow pages as pinned.
3) Then modify the followin
On 01/28/2014 01:27 AM, Benjamin Herrenschmidt wrote:
On Wed, 2014-01-22 at 17:29 +, Peter Maydell wrote:
Basically if it would be on real bus, get byte value
that corresponds to phys_addr + 0 address place
it into data[0], get byte value that corresponds to
phys_addr + 1 address place it in
On 01/22/2014 12:22 PM, Peter Maydell wrote:
On 22 January 2014 05:39, Victor Kamensky wrote:
Hi Guys,
Christoffer and I had a bit heated chat :) on this
subject last night. Christoffer, really appreciate
your time! We did not really reach agreement
during the chat and Christoffer asked me to
On 11/28/2013 01:31 PM, Paolo Bonzini wrote:
Il 28/11/2013 12:23, Gleb Natapov ha scritto:
Unless what ? :) Unless reader is scheduled out?
Yes. Or unless my brain is scheduled out in the middle of a sentence.
So we will have to disable preemption in a reader to prevent big latencies for
a w
On 11/28/2013 01:22 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 01:18:54PM +0200, Avi Kivity wrote:
On 11/28/2013 01:02 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 12:12:55PM +0200, Avi Kivity wrote:
On 11/28/2013 12:11 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 11:49:00AM +0200
On 11/28/2013 01:02 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 12:12:55PM +0200, Avi Kivity wrote:
On 11/28/2013 12:11 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 11:49:00AM +0200, Avi Kivity wrote:
On 11/28/2013 11:19 AM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 09:55:42AM +0100
On 11/28/2013 01:10 PM, Paolo Bonzini wrote:
Il 28/11/2013 12:09, Gleb Natapov ha scritto:
- if there are no callbacks, but there are readers, synchronize_srcu
busy-loops for some time checking if the readers complete. After a
while (20 us for synchronize_srcu, 120 us for
synchronize_srcu_exped
On 11/28/2013 12:40 PM, Paolo Bonzini wrote:
Il 28/11/2013 11:16, Avi Kivity ha scritto:
The QRCU I linked would work great latency-wise (it has roughly the same
latency of an rwsem but readers are lock-free). However, the locked
operations in the read path would hurt because of cache misses
On 11/28/2013 11:53 AM, Paolo Bonzini wrote:
Il 28/11/2013 10:49, Avi Kivity ha scritto:
Linux is safe, it does interrupt migration from within the interrupt
handler. If you do that before the device-specific EOI, you won't get
another interrupt until programming the MSI is complete
On 11/28/2013 12:11 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 11:49:00AM +0200, Avi Kivity wrote:
On 11/28/2013 11:19 AM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 09:55:42AM +0100, Paolo Bonzini wrote:
Il 28/11/2013 07:27, Zhanghaoyu (A) ha scritto:
Without synchronize_rcu you could
On 11/28/2013 11:19 AM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 09:55:42AM +0100, Paolo Bonzini wrote:
Il 28/11/2013 07:27, Zhanghaoyu (A) ha scritto:
Without synchronize_rcu you could have
VCPU writes to routing table
e = entry from IRQ routing t
On 11/26/2013 06:28 PM, Paolo Bonzini wrote:
Il 26/11/2013 17:24, Gleb Natapov ha scritto:
VCPU writes to routing table
e = entry from IRQ routing table
kvm_irq_routing_update(kvm, new);
VCPU resumes execution
On 11/26/2013 06:24 PM, Gleb Natapov wrote:
On Tue, Nov 26, 2013 at 04:20:27PM +0100, Paolo Bonzini wrote:
Il 26/11/2013 16:03, Gleb Natapov ha scritto:
I understood the proposal was also to eliminate the synchronize_rcu(),
so while new interrupts would see the new routing table, interrupts
alr
On 11/26/2013 06:11 PM, Michael S. Tsirkin wrote:
On Tue, Nov 26, 2013 at 06:06:26PM +0200, Avi Kivity wrote:
On 11/26/2013 05:58 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:35, Avi Kivity ha scritto:
If we want to ensure, we need to use a different mechanism for
synchronization than the global
On 11/26/2013 05:58 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:35, Avi Kivity ha scritto:
If we want to ensure, we need to use a different mechanism for
synchronization than the global RCU. QRCU would work; readers are not
wait-free but only if there is a concurrent synchronize_qrcu, which
On 11/26/2013 05:28 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:25, Avi Kivity ha scritto:
If we want to ensure, we need to use a different mechanism for
synchronization than the global RCU. QRCU would work; readers are not
wait-free but only if there is a concurrent synchronize_qrcu, which
On 11/26/2013 05:20 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:03, Gleb Natapov ha scritto:
I understood the proposal was also to eliminate the synchronize_rcu(),
so while new interrupts would see the new routing table, interrupts
already in flight could pick up the old one.
Isn't that always th
On 11/26/2013 05:03 PM, Gleb Natapov wrote:
On Tue, Nov 26, 2013 at 04:54:44PM +0200, Avi Kivity wrote:
On 11/26/2013 04:46 PM, Paolo Bonzini wrote:
Il 26/11/2013 15:36, Avi Kivity ha scritto:
No, this would be exactly the same code that is running now:
mutex_lock(&
On 11/26/2013 04:46 PM, Paolo Bonzini wrote:
Il 26/11/2013 15:36, Avi Kivity ha scritto:
No, this would be exactly the same code that is running now:
mutex_lock(&kvm->irq_lock);
old = kvm->irq_routing;
kvm_irq_routing_updat
On Mon, Nov 25, 2013 at 8:11 AM, Xiao Guangrong
wrote:
>
> On Nov 23, 2013, at 3:14 AM, Marcelo Tosatti wrote:
I'm not really following, but note that parent_pte predates EPT (and
the use of rcu in kvm), so all the complexity that is the result of
trying to pack as many list entries into a cac
On Thu, May 30, 2013 at 7:34 PM, Paolo Bonzini wrote:
> Il 30/05/2013 17:34, Paolo Bonzini ha scritto:
>> Il 30/05/2013 16:35, Paolo Bonzini ha scritto:
>>> The x86-64 extended low-byte registers were fetched correctly from reg,
>>> but not from mod/rm.
>>>
>>> This fixes another bug in the boot o
On Tue, Feb 26, 2013 at 10:12 AM, Gleb Natapov wrote:
>>
> But do not see how to implement efficiently without interface change. The
> idea is basically to register ACK notifier for RTC interrupt but terminate
> it in the kernel instead of reporting to userspace. Kernel should know
> somehow what
On Mon, Feb 25, 2013 at 7:43 PM, Gleb Natapov wrote:
>
>> > 3. Do not report KVM_IRQ_LINE_STATUS capability and move RTC to use EOI
>> > notifiers for interrupt reinjection. This requires us to add interface
>> > for reporting EOI to userspace. This is not in the scope of this
>> > patchset. Cons:
>>
> I see a couple of possible solutions:
> 1. Do what Avi said. Make KVM_IRQ_LINE_STATUS be synchronous. Cons:
> current QEMU uses KVM_IRQ_LINE_STATUS always and it means that it
> will be slow on newer kernels
You could backport the qemu change, verify that it builds, and push it
to stable bran
On Sun, Feb 24, 2013 at 9:15 PM, Jan Kiszka wrote:
>>
>> They all need consistency checks, otherwise userspace or the guest and
>> inject inconsistent values and perhaps exploit the host.
>
> To my understanding, the hardware does this for us: If we try to enter
> the guest (L1, L2) with invalid C
I didn't really follow, but is the root cause the need to keep track
of interrupt coalescing? If so we can recommend that users use
KVM_IRQ_LINE when coalescing is unneeded, and move interrupt injection
with irq coalescing support to vcpu context.
It's not pleasant to cause a performance regressi
On Sun, Feb 24, 2013 at 12:49 PM, Jan Kiszka wrote:
> On 2013-02-24 11:11, Avi Kivity wrote:
>> On Sun, Feb 24, 2013 at 11:40 AM, Jan Kiszka wrote:
>>>>>> We have the same problem in KVM_SET_SREGS.
>>>>>
>>>>> I don't see the pro
On Sun, Feb 24, 2013 at 11:40 AM, Jan Kiszka wrote:
We have the same problem in KVM_SET_SREGS.
>>>
>>> I don't see the problem. kvm_arch_vcpu_ioctl_set_sregs open-codes the
>>> state update, not applying any transition checks.
>>
>> That's the problem. We have this open coding in three diffe
On Sun, Feb 24, 2013 at 11:01 AM, Jan Kiszka wrote:
> On 2013-02-24 09:56, Avi Kivity wrote:
>> On Sat, Feb 23, 2013 at 11:57 PM, Jan Kiszka wrote:
>>> On 2013-02-23 22:45, Nadav Har'El wrote:
>>>> On Sat, Feb 23, 2013, Jan Kiszka wrote about "[PATCH] K
), to verify you're not missing any
>> important side-effect of kvm_set_cr0.
>>
>> Also, if I remember correctly, during nVMX's review, Avi Kivity asked
>> in several places that when I called vmx_set_cr0, I should instead call
>> kvm_set_cr0(), because it does some
On Thu, Feb 21, 2013 at 10:58 AM, Zhang, Yang Z wrote:
> Thanks. Here is code after changing, please review it:
>
> asm(
> "mov %0, %%" _ASM_DX " \n\t"
> #ifdef CONFIG_X86_64
> "mov %%" _ASM_SP ", %%" _ASM_BX " \n\t"
>
On Wed, Feb 20, 2013 at 3:10 PM, Zhang, Yang Z wrote:
push %%cs
>>> "push %%cs" is invalid in x86_64.
>>
>> Oops. 'push[lq] $__KERNEL_CS' then.
> Is this right? Just copy it from other file.
>
> #define __STR(X) #X
> #define STR(X) __STR(X)
>
> #ifdef CONFIG_X86_64
>
On Wed, Feb 20, 2013 at 4:46 AM, Zhang, Yang Z wrote:
>>>
>>> +static void vmx_handle_external_intr(struct kvm_vcpu *vcpu) +{ +
>>> u32 exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO); + + /* +
>>>* If external interrupt exists, IF bit is set in rflags/eflags on
>>> the +* interr
On Tue, Feb 19, 2013 at 3:39 PM, Yang Zhang wrote:
> From: Yang Zhang
>
> The "acknowledge interrupt on exit" feature controls processor behavior
> for external interrupt acknowledgement. When this control is set, the
> processor acknowledges the interrupt controller to acquire the
> interrupt ve
Signed-off-by: Avi Kivity
---
x86/emulator.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/x86/emulator.c b/x86/emulator.c
index a128e13..96576e5 100644
--- a/x86/emulator.c
+++ b/x86/emulator.c
@@ -583,9 +583,9 @@ static void test_imul(ulong *mem
(). This avoids increasing register pressure on
i386.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 18c86b5..aa8516e 100644
--- a/arch/x86/kvm/emulate.c
+++ b
This makes OpAccHi useful.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index d51f6f4..fe91e70 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 198 -
1 file changed, 198 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 89f56bb..a706e52 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 35 ---
1 file changed, 16 insertions(+), 19 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index fe91e70..0f0c15e 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index a706e52..2f895c2 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -847,6 +847,8 @@ FASTOP2W
Since DIV and IDIV can generate exceptions, we need an additional output
parameter indicating whether an execption has occured. To avoid increasing
register pressure on i386, we use %rsi, which is already allocated for
the fastop code pointer.
Signed-off-by: Avi Kivity
---
arch/x86/kvm
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index aa8516e..d51f6f4 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -139,6 +139,7
Some instructions write back the source operand, not just the destination.
Add support for doing this via the decode flags.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 47 ++-
1 file changed, 26 insertions(+), 21 deletions(-)
diff --git a
nice code size reduction:
60147 0 0 60147eaf3 arch/x86/kvm/emulate.o.before
56899 0 0 56899de43 arch/x86/kvm/emulate.o.after
Avi Kivity (8):
KVM: x86 emulator: add support for writing back the source operand
KVM: x86 emulator: decode extended accumulator
On Sat, Jan 26, 2013 at 1:46 AM, Stephen Rothwell wrote:
> On Fri, 25 Jan 2013 08:53:58 -0800 Randy Dunlap wrote:
>>
>> Seeing lots of this error on i386:
>>
>> arch/x86/kvm/emulate.c:1016: Error: unsupported for `push'
>
> Caused by commit 9ae9febae950 ("KVM: x86 emulator: covert SETCC to
> fast
'pushq' doesn't exist on i386. Replace with 'push', which should work
since the operand is a register.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate
On Wed, Jan 23, 2013 at 2:21 AM, Marcelo Tosatti wrote:
> Missing signed off by.
Signed-off-by: Avi Kivity
--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 62014dc..45ddec8 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -441,6 +441,8
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 76 +-
1 file changed, 26 insertions(+), 50 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index edb09e9c..62014dc 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86
Make fastop opcodes usable in other emulations.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 70 +-
1 file changed, 35 insertions(+), 35 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 45ddec8..d06354d
---
arch/x86/kvm/emulate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index d06354d..e99fb72 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2209,7 +2209,7 @@ static int em_cmpxchg(struct x86_emulat
This is a bit of a special case since we don't have the usual
byte/word/long/quad switch; instead we switch on the condition code embedded
in the instruction.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 60 --
1 file change
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 24 +++-
1 file changed, 7 insertions(+), 17 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index e13138d..edb09e9c 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2055,6
SHL, SHR, ROL, ROR, RCL, RCR, SAR, SAL
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 72 ++
1 file changed, 31 insertions(+), 41 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index a21773f..a94b1d7 100644
After this, only the diffcult MUL and DIV case remains.
Changes from v1:
- make SHLD/SHRD more consistent with the others
- fix SETcc misordering
Avi Kivity (8):
KVM: x86 emulator: Convert SHLD, SHRD to fastop
KVM: x86 emulator: convert shift/rotate instructions to fastop
KVM: x86
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 33 +
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 619a33d..a21773f 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 76 +-
1 file changed, 26 insertions(+), 50 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index d89e88f..7ff83d9 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 7ff83d9..c7578d0 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -441,6 +441,8
Make fastop opcodes usable in other emulations.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 70 +-
1 file changed, 35 insertions(+), 35 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index c7578d0..da2b903
This is a bit of a special case since we don't have the usual
byte/word/long/quad switch; instead we switch on the condition code embedded
in the instruction.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 60 --
1 file change
---
arch/x86/kvm/emulate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index da2b903..1bb0af2 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2209,7 +2209,7 @@ static int em_cmpxchg(struct x86_emulat
SHL, SHR, ROL, ROR, RCL, RCR, SAR, SAL
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 72 ++
1 file changed, 31 insertions(+), 41 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 2189c6a..d641178 100644
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 24 +++-
1 file changed, 7 insertions(+), 17 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index f6f615e..d89e88f 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2055,6
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 33 +
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 619a33d..2189c6a 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
After this, only the diffult MUL and DIV case remains.
Avi Kivity (8):
KVM: x86 emulator: Streamline SHLD, SHRD
KVM: x86 emulator: convert shift/rotate instructions to fastop
KVM: x86 emulator: covert SETCC to fastop
KVM: x86 emulator: convert INC/DEC to fastop
KVM: x86 emulator
Opcodes:
TEST
CMP
ADD
ADC
SUB
SBB
XOR
OR
AND
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 112 +++--
1 file changed, 34 insertions(+), 78 deletions(-)
diff --git a/arch
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 2af0c44..09dbdc5 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2050,17 +2050,8
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 09dbdc5..3b5d4dd 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -465,6 +465,17 @@ static void
Instead of disabling writeback via OP_NONE, just specify NoWrite.
Signed-off-by: Avi Kivity
---
arch/x86/kvm/emulate.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 42c53c8..fe113fb 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch
1 - 100 of 14281 matches
Mail list logo
