Thanks Jan.
On Mon, May 26, 2014 at 6:44 PM, Jan Kiszka wrote:
> On 2014-05-26 15:51, Arthur Chunqi Li wrote:
>> Hi there,
>>
>> External interrupts are injected in function vcpu_enter_guest, with
>> checking KVM_REQ_EVENT. If there are more than one interrupts in
? So only NMI is injected in this vmexit, thus when
will the other external events injected? I don't see any extra setting
of KVM_REQ_EVENT to handle the lower priority interrupts injection in
KVM.
Thanks,
Arthur
--
Arthur Chunqi Li
Department of Computer Science
School of EECS
Peking Unive
On Thu, May 15, 2014 at 2:39 PM, Jan Kiszka wrote:
> On 2014-05-15 07:54, Arthur Chunqi Li wrote:
>> Hi Jan and there,
>>
>> I want to disable IDE BMDMA in Qemu/KVM and let guest OS uses only PIO
>> mode. Are there any configurations in Qemu or KVM to disable the
disable IDE BMDMA from guest's boot time?
Thanks,
Arthur
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Peking University
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More ma
lated information?
Thanks,
Arthur
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Peking University
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just parse
the EPT paging structure and cannot distinguish Accessed or Dirty in
it.
Thanks ahead,
Arthur
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the body
kvm->tm_turn, vcpu->vcpu_id, pfn, gfn);
}
mmu_set_spte(vcpu, iterator.sptep, ACC_ALL,
write, &emulate, level, gfn, pfn,
prefault, map_writable);
direct_pte_prefetch(vcpu, iterator.sptep);
++vcpu->stat.pf_fixed;
break;
}
--
Arthur Chunqi L
On Fri, Dec 20, 2013 at 7:58 PM, Paolo Bonzini wrote:
> Il 20/12/2013 10:15, Arthur Chunqi Li ha scritto:
>> Hi Paolo,
>>
>> When using EPT in KVM, does every vcpu has an EPT paging structure or
>> all vcpus share one?
>
> All MMU structures are in vcpu->ar
Bonzini wrote:
> Il 20/12/2013 10:15, Arthur Chunqi Li ha scritto:
>> Hi Paolo,
>>
>> When using EPT in KVM, does every vcpu has an EPT paging structure or
>> all vcpus share one?
>
> All MMU structures are in vcpu->arch.mmu and vcpu->arch.nested_mmu, so
>
Hi Paolo,
When using EPT in KVM, does every vcpu has an EPT paging structure or
all vcpus share one?
Thanks,
Arthur
On Wed, Nov 20, 2013 at 6:41 PM, Paolo Bonzini wrote:
> Il 20/11/2013 08:55, Arthur Chunqi Li ha scritto:
>> Hi Paolo,
>>
>> Currently I can trap every
Hi Paolo,
On Tue, Dec 17, 2013 at 8:28 PM, Paolo Bonzini wrote:
> Il 17/12/2013 12:43, Arthur Chunqi Li ha scritto:
>> Hi Paolo,
>>
>> Thanks very much. And...(see below)
>>
>> On Tue, Dec 17, 2013 at 7:21 PM, Paolo Bonzini wrote:
>>> Il 17/12/2013 0
On Tue, Dec 17, 2013 at 8:43 PM, Jan Kiszka wrote:
> On 2013-12-17 12:31, Arthur Chunqi Li wrote:
>> Hi Jan,
>>
>> On Tue, Dec 17, 2013 at 7:21 PM, Jan Kiszka wrote:
>>> On 2013-12-17 10:32, Arthur Chunqi Li wrote:
>>>> Hi Jan and Paolo,
>>>
Hi Paolo,
Thanks very much. And...(see below)
On Tue, Dec 17, 2013 at 7:21 PM, Paolo Bonzini wrote:
> Il 17/12/2013 07:11, Arthur Chunqi Li ha scritto:
>> Hi Paolo,
>>
>> Since VCPU is managed the same as a process in kernel, how can I know
>> the status (running,
Hi Jan,
On Tue, Dec 17, 2013 at 7:21 PM, Jan Kiszka wrote:
> On 2013-12-17 10:32, Arthur Chunqi Li wrote:
>> Hi Jan and Paolo,
>>
>> I've tried to use preemption timer in KVM to trap vcpu regularly, but
>> there's something unexpected. I run a VM with 4 vcpus
frequency.
Could u help me explain this phenomenon?
Thanks,
Arthur
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Mo
kernel thread send a message to force vcpu1 trap to
VMM? How can I do this?
Thanks very much,
Arthur
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/disable) it?
Thanks,
Arthur
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Hi Paolo,
Currently I can trap every first write/read to a memory page from
guest VM (add codes in tdp_page_fault). If I want to trace every
memory access to a page, how can I achieve such goal in KVM?
Thanks,
Arthur
--
Arthur Chunqi Li
Department of Computer Science
School of EECS
Peking
Hi Paolo,
On Thu, Oct 31, 2013 at 6:54 PM, Paolo Bonzini wrote:
> Il 31/10/2013 10:07, Arthur Chunqi Li ha scritto:
>> Sorry to disturb you with so many trivial questions in KVM EPT memory
>> management and thanks for your patience.
>
> No problem, please remain onlist tho
Hi Paolo,
On Tue, Oct 29, 2013 at 8:55 PM, Paolo Bonzini wrote:
> Il 29/10/2013 06:39, Arthur Chunqi Li ha scritto:
>> What is the dirty page tracking code path? I find a obsoleted flag
>> "dirty_page_log_all" in the very previous codes, but I cannot get the
>>
On Tue, Oct 29, 2013 at 8:55 PM, Paolo Bonzini wrote:
> Il 29/10/2013 06:39, Arthur Chunqi Li ha scritto:
>> What is the dirty page tracking code path? I find a obsoleted flag
>> "dirty_page_log_all" in the very previous codes, but I cannot get the
>> most recent
Hi Paolo,
On Fri, Oct 25, 2013 at 8:43 AM, Paolo Bonzini wrote:
> Il 24/10/2013 08:55, Arthur Chunqi Li ha scritto:
>> Hi Paolo,
>>
>> Thanks for your reply.
>>
>> On Wed, Oct 23, 2013 at 2:21 PM, Paolo Bonzini wrote:
>>> Il 21/10/2013 08:56,
Hi Paolo,
Thanks for your reply.
On Wed, Oct 23, 2013 at 2:21 PM, Paolo Bonzini wrote:
> Il 21/10/2013 08:56, Arthur Chunqi Li ha scritto:
>> Hi there,
>>
>> I noticed that kvm_mmu_reload() is called every time in vcpu enter,
>> and kvm_mmu_load() is called in thi
, kvm_mmu_unload() is called to invalid root_hpa,
but this condition cannot cover all occasions.
Thanks,
Arthur
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Department of Computer Science
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Hi Jan,
On Fri, Oct 11, 2013 at 12:12 AM, Jan Kiszka wrote:
> On 2013-10-02 20:47, Jan Kiszka wrote:
>> On 2013-09-30 11:08, Jan Kiszka wrote:
>>> On 2013-09-26 17:04, Paolo Bonzini wrote:
>>>> Il 16/09/2013 10:11, Arthur Chunqi Li ha scritto:
>>>>>
Add some comments on the framework of nested VMX testing, and guides of
how to write new test cases.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.c | 30 ++
x86/vmx_tests.c | 13 +
2 files changed, 43 insertions(+)
diff --git a/x86/vmx.c b/x86
Add some comments on the framework of nested VMX testing, and guides of
how to write new test cases.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.c | 25 +
x86/vmx_tests.c | 13 +
2 files changed, 38 insertions(+)
diff --git a/x86/vmx.c b/x86/vmx.c
X.
With this patch, nested VMX preemption timer features are fully
supported.
Signed-off-by: Arthur Chunqi Li
---
ChangeLog to v4:
Format changes and remove a flag in nested_vmx.
arch/x86/include/uapi/asm/msr-index.h |1 +
arch/x86/kvm/vmx.c
On Sun, Sep 15, 2013 at 8:31 PM, Gleb Natapov wrote:
> On Fri, Sep 06, 2013 at 10:04:51AM +0800, Arthur Chunqi Li wrote:
>> This patch contains the following two changes:
>> 1. Fix the bug in nested preemption timer support. If vmexit L2->L0
>> with some reasons not em
On Sat, Sep 14, 2013 at 1:15 AM, Paolo Bonzini wrote:
> Il 06/09/2013 04:04, Arthur Chunqi Li ha scritto:
>> This patch contains the following two changes:
>> 1. Fix the bug in nested preemption timer support. If vmexit L2->L0
>> with some reasons not emulated by L1, preem
On Sat, Sep 14, 2013 at 3:44 PM, Jan Kiszka wrote:
> On 2013-09-13 19:15, Paolo Bonzini wrote:
>> Il 06/09/2013 04:04, Arthur Chunqi Li ha scritto:
>>> +preempt_val_l1 = delta_tsc_l1 >> preempt_scale;
>>> +if (preempt_val_l2 <= preempt_val_l1)
reserved
Invalid host EFER - LMA & LME
Invalid CS selector field - RPL
Invalid TR selector field - RPL
You can find detailed description of these cases in Intel SDM 26.1 and 26.2.
Arthur
On Fri, Sep 13, 2013 at 2:35 PM, Arthur Chunqi Li wrote:
> This series implement a framework to capture ear
crash test environment and affect the following tests. They are hoped to
uncomment
after related bugs are fixed.
Arthur Chunqi Li (2):
kvm-unit-tests: VMX: Add vmentry failed handler to framework
kvm-unit-tests: VMX: Add test cases for vmentry checks
lib/x86/vm.h|3 +
x86/vmx.c
.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.h | 22 +-
x86/vmx_tests.c | 647 +++
2 files changed, 668 insertions(+), 1 deletion(-)
diff --git a/x86/vmx.h b/x86/vmx.h
index 469b4dc..aeee602 100644
--- a/x86/vmx.h
+++ b/x86/vmx.h
-off-by: Arthur Chunqi Li
---
lib/x86/vm.h|3 +++
x86/vmx.c | 34 --
x86/vmx.h | 15 +--
x86/vmx_tests.c | 31 +--
4 files changed, 57 insertions(+), 26 deletions(-)
diff --git a/lib/x86/vm.h b/lib/x86
Hi Jan and maillist,
Does nest VMX support vmexit MSR store/load and vmenter MSR load now?
I tried to set "VM-exit MSR-store address" with valid address and set
"VM-exit MSR-store count" to 1, then the vmenter fails. Anything else
should I set to use these features?
Arthur
On Wed, Sep 11, 2013 at 9:03 PM, Gleb Natapov wrote:
> On Wed, Sep 11, 2013 at 03:01:07PM +0200, Paolo Bonzini wrote:
>> Il 11/09/2013 14:53, Gleb Natapov ha scritto:
>> >> > I was trying to recreate MOV-SS blocking vmentry fail (Intel SDM 26.1,
>> >> > 5. a). Here the manual refers to Table 24-3,
On Wed, Sep 11, 2013 at 8:53 PM, Gleb Natapov wrote:
> On Wed, Sep 11, 2013 at 08:49:28PM +0800, Arthur Chunqi Li wrote:
>> Hi Gleb, Paolo and related folks,
>>
>> I was trying to recreate MOV-SS blocking vmentry fail (Intel SDM 26.1,
>> 5. a). Here the manual refers
Chunqi Li
Department of Computer Science
School of EECS
Peking University
Beijing, China
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based
on vmx?
Thanks,
Arthur
On Wed, Sep 11, 2013 at 11:11 AM, Arthur Chunqi Li wrote:
> This patch just contains two minor changes to EPT framwork.
> 1. Reorder macro definition
> 2. Fix bug of setting CPU_EPT without check.
>
> Signed-off-by: Arthur Chunqi Li
> ---
> x
This patch just contains two minor changes to EPT framwork.
1. Reorder macro definition
2. Fix bug of setting CPU_EPT without check.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.h |2 +-
x86/vmx_tests.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/x86/vmx.h
);
>> /*
>>* If we did fpu_activate()/fpu_deactivate() during L2's run, we need
>>* to apply the same changes to L1's vmcs. We just set cr0 correctly,
>> --
>> 1.7.3.4
>
> --
> Gleb.
--
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On Mon, Sep 9, 2013 at 8:29 PM, Gleb Natapov wrote:
> On Mon, Sep 09, 2013 at 12:53:02PM +0200, Paolo Bonzini wrote:
>> Il 09/09/2013 12:22, SPA ha scritto:
>> > Thanks Paolo.
>> >
>> > Is there a way where reads would trap ?
>> >
>> > I explored a bit on PM_PRESENT_MASK. Though its not READ bit,
ot; is not used and will return unexpected
value when read.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.c | 13 ++---
x86/vmx_tests.c |2 --
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/x86/vmx.c b/x86/vmx.c
index 87d1d55..9db4ef4 100644
--- a/x86/vmx.c
+++ b
On Mon, Sep 9, 2013 at 12:57 PM, Arthur Chunqi Li wrote:
> Some test cases for nested EPT features, including:
> 1. EPT basic framework tests: read, write and remap.
> 2. EPT misconfigurations test cases: page permission mieconfiguration
> and memory type misconfiguration
> 3. EPT
On Mon, Sep 9, 2013 at 9:56 PM, Paolo Bonzini wrote:
> Il 09/09/2013 06:57, Arthur Chunqi Li ha scritto:
>> Some test cases for nested EPT features, including:
>> 1. EPT basic framework tests: read, write and remap.
>> 2. EPT misconfigurations test cases: page permission mi
On Mon, Sep 9, 2013 at 8:51 PM, Paolo Bonzini wrote:
> Il 05/09/2013 11:22, Arthur Chunqi Li ha scritto:
>> Hi Jan, Gleb and Paolo,
>>
>> It suddenly occurred to me that, if guest's PIN_PREEMPT disabled while
>> EXI_SAVE_PREEMPT_VALUE enabled, what will happen? T
On Mon, Sep 9, 2013 at 3:17 PM, Jan Kiszka wrote:
> On 2013-09-09 06:57, Arthur Chunqi Li wrote:
>> This series of patches provide the framework of nested EPT and some test
>> cases for nested EPT features.
>>
>> Arthur Chunqi Li (2):
>> kvm-unit-tests: VMX: Th
This series of patches provide the framework of nested EPT and some test
cases for nested EPT features.
Arthur Chunqi Li (2):
kvm-unit-tests: VMX: The framework of EPT for nested VMX testing
kvm-unit-tests: VMX: Test cases for nested EPT
x86/vmx.c | 159
Signed-off-by: Arthur Chunqi Li
---
x86/vmx_tests.c | 266 +++
1 file changed, 266 insertions(+)
diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
index c1b39f4..a0b9824 100644
--- a/x86/vmx_tests.c
+++ b/x86/vmx_tests.c
@@ -1,4 +1,36 @@
#include
The framework of EPT for nested VMX, including functions to build up
EPT paging structures, read/set EPT PTEs and setup a range of 1:1 map
EPT.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.c | 159 +++--
x86/vmx.h | 76
r will never trigger if the value is large enough.
3. Some other aspects are tested, e.g. preempt without save, preempt
when value is 0.
Signed-off-by: Arthur Chunqi Li
---
ChangeLog to v1:
1. Add test of EXI_SAVE_PREEMPT enable and PIN_PREEMPT disable
2. Add test of PIN_PREEMPT enable and EXI_SAVE_P
X.
With this patch, nested VMX preemption timer features are fully
supported.
Signed-off-by: Arthur Chunqi Li
---
ChangeLog to v3:
Move nested_adjust_preemption_timer to the latest place just before vmenter.
Some minor changes.
arch/x86/include/uapi/asm/msr-index.h |1 +
arch/
On Thu, Sep 5, 2013 at 7:05 PM, Zhang, Yang Z wrote:
> Arthur Chunqi Li wrote on 2013-09-05:
>> > Arthur Chunqi Li wrote on 2013-09-05:
>> >> On Thu, Sep 5, 2013 at 3:45 PM, Zhang, Yang Z
>> >>
>> >> wrote:
>> >> > Arthur Chunqi Li
On Thu, Sep 5, 2013 at 5:24 PM, Zhang, Yang Z wrote:
> Arthur Chunqi Li wrote on 2013-09-05:
>> On Thu, Sep 5, 2013 at 3:45 PM, Zhang, Yang Z
>> wrote:
>> > Arthur Chunqi Li wrote on 2013-09-04:
>> >> This patch contains the following two changes:
>> &g
Hi Jan, Gleb and Paolo,
It suddenly occurred to me that, if guest's PIN_PREEMPT disabled while
EXI_SAVE_PREEMPT_VALUE enabled, what will happen? The preempt value in
vmcs will not be affected, yes?
This cases fails to test in this patch.
Arthur
On Wed, Sep 4, 2013 at 11:26 PM, Arthur Chun
On Thu, Sep 5, 2013 at 3:45 PM, Zhang, Yang Z wrote:
> Arthur Chunqi Li wrote on 2013-09-04:
>> This patch contains the following two changes:
>> 1. Fix the bug in nested preemption timer support. If vmexit L2->L0 with some
>> reasons not emulated by L1, preemption timer
mush,
Arthur
On Mon, Sep 2, 2013 at 5:38 PM, Arthur Chunqi Li wrote:
> There must have some minor revisions to be done in this patch, so this
> is mainly a RFC mail.
>
> Besides, I'm not quite clear what we should test in nested EPT
> modules, and I bet writers of nested EPT mu
r will never trigger if the value is large enough.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.h |3 ++
x86/vmx_tests.c | 117 +++
2 files changed, 120 insertions(+)
diff --git a/x86/vmx.h b/x86/vmx.h
index 28595d8..ebc8cfd 100644
---
X.
With this patch, nested VMX preemption timer features are fully
supported.
Signed-off-by: Arthur Chunqi Li
---
This series depends on queue.
arch/x86/include/uapi/asm/msr-index.h |1 +
arch/x86/kvm/vmx.c| 51 ++---
2 files changed, 48 ins
it is means when set and clear. I always get the exit qualification
with this bit set, how to design a violation with this bit clear?
Thanks,
Arthur
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Department of Computer Science
School of EECS
Peking University
Beijing, China
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On Tue, Sep 3, 2013 at 7:48 PM, Gleb Natapov wrote:
> On Tue, Sep 03, 2013 at 07:45:47PM +0800, Arthur Chunqi Li wrote:
>> On Tue, Sep 3, 2013 at 7:19 PM, Gleb Natapov wrote:
>> > On Mon, Aug 12, 2013 at 08:35:57PM +0800, Arthur Chunqi Li wrote:
>> >> Hi Gleb a
On Tue, Sep 3, 2013 at 7:19 PM, Gleb Natapov wrote:
> On Mon, Aug 12, 2013 at 08:35:57PM +0800, Arthur Chunqi Li wrote:
>> Hi Gleb and Paolo,
>> There are some corner cases when testing I/O bitmaps, and I don't know
>> the exact action of HW.
>>
> A little bi
ow to
test nested EPT is welcome.
Please help me CC EPT-related guys if anyone knows.
Thanks,
Arthur
On Mon, Sep 2, 2013 at 5:26 PM, Arthur Chunqi Li wrote:
> Add a framework of EPT in nested VMX testing, including a set of
> functions to construct and read EPT paging structures and a si
Add a framework of EPT in nested VMX testing, including a set of
functions to construct and read EPT paging structures and a simple
read/write test of EPT remapping from guest to host.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.c | 132 --
x86
Hi Gleb, Paolo and Jan,
Would you please review this series of codes when you can spare time?
Jan has review it and, of course, further suggestions are welcomed.
Arthur
On Thu, Aug 15, 2013 at 7:45 PM, Arthur Chunqi Li wrote:
> Add a series of test cases for nested VMX in kvm-unit-te
se tell me and CC the
authors for more detailed discussion.
Thanks,
Arthur
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On Mon, Aug 26, 2013 at 3:23 PM, Jan Kiszka wrote:
> On 2013-08-25 17:26, Arthur Chunqi Li wrote:
>> This patch contains the following two changes:
>> 1. Fix the bug in nested preemption timer support. If vmexit L2->L0
>> with some reasons not emulated by L1, preemption
X.
With this patch, nested VMX preemption timer features are fully
supported.
Signed-off-by: Arthur Chunqi Li
---
arch/x86/kvm/vmx.c | 49 -
1 file changed, 44 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
On Sun, Aug 25, 2013 at 4:53 PM, Jan Kiszka wrote:
> On 2013-08-25 10:41, Arthur Chunqi Li wrote:
>> On Sun, Aug 25, 2013 at 4:18 PM, Abel Gordon wrote:
>>>
>>>
>>> kvm-ow...@vger.kernel.org wrote on 25/08/2013 10:54:13 AM:
>>>
>>>> From:
of nested VMX
> preemption
>> >>> timer
>> >>>> Sent by: kvm-ow...@vger.kernel.org
>> >>>>
>> >>>> On 2013-08-24 20:44, root wrote:
>> >>>>> This patch contains the following two changes:
>> >>>
t; with some reasons not emulated by L1, preemption timer value should
>> >>> be save in such exits.
>> >>> 2. Add support of "Save VMX-preemption timer value" VM-Exit controls
>> >>> to nVMX.
>> >>>
>>
On Sun, Aug 25, 2013 at 3:44 PM, Jan Kiszka wrote:
> On 2013-08-25 09:37, Arthur Chunqi Li wrote:
>> On Sun, Aug 25, 2013 at 3:28 PM, Jan Kiszka wrote:
>>> On 2013-08-25 09:24, Arthur Chunqi Li wrote:
>>>> On Sun, Aug 25, 2013 at 2:44 PM, Jan Kiszka wrote:
>>
emulated by L1, preemption timer value should
>> > be save in such exits.
>> > 2. Add support of "Save VMX-preemption timer value" VM-Exit controls
>> > to nVMX.
>> >
>> > With this patch, nested VMX preemption timer features are fully
>> &
On Sun, Aug 25, 2013 at 3:28 PM, Jan Kiszka wrote:
> On 2013-08-25 09:24, Arthur Chunqi Li wrote:
>> On Sun, Aug 25, 2013 at 2:44 PM, Jan Kiszka wrote:
>>> On 2013-08-24 20:44, root wrote:
>>>> This patch contains the following two changes:
>>>> 1. Fix
hould
>> be save in such exits.
>> 2. Add support of "Save VMX-preemption timer value" VM-Exit controls
>> to nVMX.
>>
>> With this patch, nested VMX preemption timer features are fully
>> supported.
>>
>> Signed-off-by: Arthur Chunqi Li
>
Add a series of test cases for nested VMX in kvm-unit-tests.
Arthur Chunqi Li (4):
kvm-unit-tests: VMX: Add test cases for PAT and EFER
kvm-unit-tests: VMX: Add test cases for CR0/4 shadowing
kvm-unit-tests: VMX: Add test cases for I/O bitmaps
kvm-unit-tests: VMX: Add test cases for
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.c |3 +-
x86/vmx.h |7 +++
x86/vmx_tests.c | 152 +++
3 files changed, 160 insertions(+), 2 deletions(-)
diff --git a/x86/vmx.c b/x86/vmx.c
index ca36d35..c346070 100644
--- a/x86
Add test cases for I/O bitmaps, including corner cases.
Test includes: pass & trap, in & out, different I/O width, low & high
I/O bitmap, partial I/O pass, overrun (inl 0x).
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.h |6 +--
x86/vmx_te
Add test cases for ENT_LOAD_PAT, ENT_LOAD_EFER, EXI_LOAD_PAT,
EXI_SAVE_PAT, EXI_LOAD_EFER, EXI_SAVE_PAT flags in enter/exit
control fields.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.h |7 +++
x86/vmx_tests.c | 185 +++
2 files
from shadowed value).
Signed-off-by: Arthur Chunqi Li
---
lib/x86/vm.h|4 +
x86/vmx_tests.c | 218 +++
2 files changed, 222 insertions(+)
diff --git a/lib/x86/vm.h b/lib/x86/vm.h
index eff6f72..6e0ce2b 100644
--- a/lib/x86/vm.h
+++ b/lib
On Thu, Aug 15, 2013 at 4:23 PM, Jan Kiszka wrote:
> On 2013-08-15 10:20, Arthur Chunqi Li wrote:
>> On Thu, Aug 15, 2013 at 4:13 PM, Jan Kiszka wrote:
>>> On 2013-08-15 10:09, Arthur Chunqi Li wrote:
>>>> On Thu, Aug 15, 2013 at 3:58 PM, Jan Kiszka wrote:
>
On Thu, Aug 15, 2013 at 4:40 PM, Jan Kiszka wrote:
> On 2013-08-15 10:35, Arthur Chunqi Li wrote:
>> On Thu, Aug 15, 2013 at 4:20 PM, Jan Kiszka wrote:
>>> On 2013-08-15 10:16, Arthur Chunqi Li wrote:
>>>> On Thu, Aug 15, 2013 at 4:06 PM, Jan Kiszka wrote:
>
On Thu, Aug 15, 2013 at 4:20 PM, Jan Kiszka wrote:
> On 2013-08-15 10:16, Arthur Chunqi Li wrote:
>> On Thu, Aug 15, 2013 at 4:06 PM, Jan Kiszka wrote:
>>> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>>>> Add test cases for instruction interception, includin
On Thu, Aug 15, 2013 at 4:13 PM, Jan Kiszka wrote:
> On 2013-08-15 10:09, Arthur Chunqi Li wrote:
>> On Thu, Aug 15, 2013 at 3:58 PM, Jan Kiszka wrote:
>>> On 2013-08-15 09:51, Arthur Chunqi Li wrote:
>>>> On Thu, Aug 15, 2013 at 3:40 PM, Jan Kiszka wrote:
>
On Thu, Aug 15, 2013 at 4:06 PM, Jan Kiszka wrote:
> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>> Add test cases for instruction interception, including three types:
>> 1. Primary Processor-Based VM-Execution Controls (HLT/INVLPG/MWAIT/
>> RDPMC/RDTSC/MONITOR/PAUSE)
>
On Thu, Aug 15, 2013 at 3:58 PM, Jan Kiszka wrote:
> On 2013-08-15 09:51, Arthur Chunqi Li wrote:
>> On Thu, Aug 15, 2013 at 3:40 PM, Jan Kiszka wrote:
>>> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>>>> Add test cases for I/O bitmaps, including corner cases.
&g
On Thu, Aug 15, 2013 at 3:48 PM, Jan Kiszka wrote:
> On 2013-08-15 09:41, Arthur Chunqi Li wrote:
>> On Thu, Aug 15, 2013 at 3:17 PM, Jan Kiszka wrote:
>>> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>>>> Add test cases for ENT_LOAD_PAT, ENT_LOAD_EFER, E
On Thu, Aug 15, 2013 at 3:47 PM, Jan Kiszka wrote:
> On 2013-08-15 09:40, Arthur Chunqi Li wrote:
>> On Thu, Aug 15, 2013 at 3:30 PM, Jan Kiszka wrote:
>>> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>>>> Add testing for CR0/4 shadowing.
>>>
>>&g
On Thu, Aug 15, 2013 at 3:40 PM, Jan Kiszka wrote:
> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>> Add test cases for I/O bitmaps, including corner cases.
>
> Would be good to briefly list the corner cases here.
>
>>
>> Signed-off-by: Arthur Chunqi Li
>
On Thu, Aug 15, 2013 at 3:17 PM, Jan Kiszka wrote:
> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>> Add test cases for ENT_LOAD_PAT, ENT_LOAD_EFER, EXI_LOAD_PAT,
>> EXI_SAVE_PAT, EXI_LOAD_EFER, EXI_SAVE_PAT flags in enter/exit
>> control fields.
>>
>>
On Thu, Aug 15, 2013 at 3:30 PM, Jan Kiszka wrote:
> On 2013-08-13 17:56, Arthur Chunqi Li wrote:
>> Add testing for CR0/4 shadowing.
>
> A few sentences on the test strategy would be good.
>
>>
>> Signed-off-by: Arthur Chunqi Li
>> ---
>> lib/x86/v
Add testing for CR0/4 shadowing.
Signed-off-by: Arthur Chunqi Li
---
lib/x86/vm.h|4 +
x86/vmx_tests.c | 218 +++
2 files changed, 222 insertions(+)
diff --git a/lib/x86/vm.h b/lib/x86/vm.h
index eff6f72..6e0ce2b 100644
--- a/lib/x86
Add test cases for instruction interception, including three types:
1. Primary Processor-Based VM-Execution Controls (HLT/INVLPG/MWAIT/
RDPMC/RDTSC/MONITOR/PAUSE)
2. Secondary Processor-Based VM-Execution Controls (WBINVD)
3. No control flag (CPUID/INVD)
Signed-off-by: Arthur Chunqi Li
---
x86
Add test cases for ENT_LOAD_PAT, ENT_LOAD_EFER, EXI_LOAD_PAT,
EXI_SAVE_PAT, EXI_LOAD_EFER, EXI_SAVE_PAT flags in enter/exit
control fields.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.h |7 +++
x86/vmx_tests.c | 185 +++
2 files
Add test cases for I/O bitmaps, including corner cases.
Signed-off-by: Arthur Chunqi Li
---
x86/vmx.h |6 +-
x86/vmx_tests.c | 167 +++
2 files changed, 170 insertions(+), 3 deletions(-)
diff --git a/x86/vmx.h b/x86/vmx.h
index
Add a series of test cases for nested VMX in kvm-unit-tests.
Arthur Chunqi Li (4):
kvm-unit-tests: VMX: Add test cases for PAT and EFER
kvm-unit-tests: VMX: Add test cases for CR0/4 shadowing
kvm-unit-tests: VMX: Add test cases for I/O bitmaps
kvm-unit-tests: VMX: Add test cases for
ot;If an I/O
operation “wraps around” the 16-bit I/O-port space (accesses ports
H and H), the I/O instruction causes a VM exit." I cannot find
the exact reaction of this case.
Do you have any ideas about these?
Arthur
--
Arthur Chunqi Li
Department of Computer Science
School
t; Signed-off-by: Jan Kiszka
Tested-by: Arthur Chunqi Li
Should cooperate with patch
http://www.mail-archive.com/kvm@vger.kernel.org/msg94349.html,
VM_EXIT_SAVE_IA32_PAT and VM_EXIT_LOAD_IA32_PAT should be advertised.
> ---
>
> Arthur, please add your tested-by also officially.
Advertise VM_EXIT_SAVE_IA32_PAT and VM_EXIT_LOAD_IA32_PAT.
Signed-off-by: Arthur Chunqi Li
---
arch/x86/kvm/vmx.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 396572d..c45adea 100644
--- a/arch/x86/kvm/vmx.c
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