.
Suggested-by: Dave Jiang
Signed-off-by: Zhangfei Gao
---
drivers/misc/uacce/uacce.c | 17 +
include/linux/uacce.h | 2 ++
2 files changed, 19 insertions(+)
diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
index ffced4d..1bcc5e6 100644
--- a/drivers/misc
Add Zhangfei Gao and Zhou Wang as maintainers for uacce
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 38fe2f3..22e647f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17039,6
Add Zhangfei Gao and Zhou Wang as maintainers for uacce
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
Add list, suggested by Dave
MAINTAINERS | 12
1 file changed, 12 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 38fe2f3..b5bdef8 100644
--- a/MAINTAINERS
.
Suggested-by: Dave Jiang
Signed-off-by: Zhangfei Gao
---
v2: Unmap before put_queue, where memory is freed, commented from Zaibo.
drivers/misc/uacce/uacce.c | 16
include/linux/uacce.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/drivers/misc/uacce/uacce.c b
plify the queue management.
The uacce_mm struct, that tracks all queues bound to an mm, was only
used by the mm_exit() callback. Remove it.
Signed-off-by: Jean-Philippe Brucker
Thanks Jean for doing this.
Tested-by: Zhangfei Gao
Except one line.
-static void uacce_mm_put(struct uacce_que
On 2020/4/14 下午11:05, Eric Auger wrote:
This version fixes an issue observed by Shameer on an SMMU 3.2,
when moving from dual stage config to stage 1 only config.
The 2 high 64b of the STE now get reset. Otherwise, leaving the
S2TTB set may cause a C_BAD_STE error.
This series can be found at:
plify the queue management.
The uacce_mm struct, that tracks all queues bound to an mm, was only
used by the mm_exit() callback. Remove it.
Signed-off-by: Jean-Philippe Brucker
Thanks Jean
Acked-by: Zhangfei Gao
---
v1->v2: clear q->handle after unbi
UAWEI, 0xa250, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
Zhangfei Gao (2):
iommu/of: Let pci_fixup_final access iommu_fwnode
ACPI/IORT: Let pci_fixup_final access iommu_fwnode
drivers/acpi/arm64/iort.c | 1 +
drivers/iommu/of_iommu.c | 1 +
2 fil
Calling pci_fixup_final after of_pci_iommu_init, which alloc
iommu_fwnode. Some platform devices appear as PCI but are
actually on the AMBA bus, and they need fixup in
drivers/pci/quirks.c handling iommu_fwnode.
So calling pci_fixup_final after iommu_fwnode is allocated.
Signed-off-by: Zhangfei
Calling pci_fixup_final after iommu_fwspec_init, which alloc
iommu_fwnode. Some platform devices appear as PCI but are
actually on the AMBA bus, and they need fixup in
drivers/pci/quirks.c handling iommu_fwnode.
So calling pci_fixup_final after iommu_fwnode is allocated.
Signed-off-by: Zhangfei
Hi, Joerg
On 2020/5/12 下午12:08, Zhangfei Gao wrote:
Some platform devices appear as PCI but are
actually on the AMBA bus, and they need fixup in
drivers/pci/quirks.c handling iommu_fwnode.
So calling pci_fixup_final after iommu_fwnode is allocated.
For example:
Hisilicon platform device need
_huawei_pcie_sva);
[1] https://www.spinics.net/lists/iommu/msg44591.html
[2] https://www.spinics.net/lists/linux-pci/msg94559.html
Zhangfei Gao (2):
PCI: Introduce PCI_FIXUP_IOMMU
iommu: calling pci_fixup_iommu in iommu_fwspec_init
drivers/iommu/iommu.c | 4
drivers/pci/quirks.c
all devices in fixup final list will be
reprocessed.
Suggested-by: Joerg Roedel
Signed-off-by: Zhangfei Gao
---
drivers/pci/quirks.c | 7 +++
include/asm-generic/vmlinux.lds.h | 3 +++
include/linux/pci.h | 8
3 files changed, 18 insertions(+)
diff --git a
Calling pci_fixup_iommu in iommu_fwspec_init, which alloc
iommu_fwnode. Some platform devices appear as PCI but are
actually on the AMBA bus, and they need fixup in
drivers/pci/quirks.c handling iommu_fwnode.
So calling pci_fixup_iommu after iommu_fwnode is allocated.
Signed-off-by: Zhangfei Gao
On 2020/5/25 下午9:43, Joerg Roedel wrote:
On Tue, May 12, 2020 at 12:08:29PM +0800, Zhangfei Gao wrote:
Some platform devices appear as PCI but are
actually on the AMBA bus, and they need fixup in
drivers/pci/quirks.c handling iommu_fwnode.
So calling pci_fixup_final after iommu_fwnode is
Hi, Christoph
On 2020/5/26 下午10:46, Christoph Hellwig wrote:
On Tue, May 26, 2020 at 07:49:08PM +0800, Zhangfei Gao wrote:
Some platform devices appear as PCI but are actually on the AMBA bus,
and they need fixup in drivers/pci/quirks.c handling iommu_fwnode.
Here introducing PCI_FIXUP_IOMMU
On 2020/5/27 下午5:53, Arnd Bergmann wrote:
On Wed, May 27, 2020 at 11:00 AM Greg Kroah-Hartman
wrote:
On Tue, May 26, 2020 at 07:49:07PM +0800, Zhangfei Gao wrote:
Some platform devices appear as PCI but are actually on the AMBA bus,
Why would these devices not just show up on the AMBA bus
Hi, Bjorn
On 2020/5/28 上午2:18, Bjorn Helgaas wrote:
On Tue, May 26, 2020 at 07:49:07PM +0800, Zhangfei Gao wrote:
Some platform devices appear as PCI but are actually on the AMBA bus,
and they need fixup in drivers/pci/quirks.c handling iommu_fwnode.
Here introducing PCI_FIXUP_IOMMU, which is
On 2020/5/27 下午5:01, Greg Kroah-Hartman wrote:
On Tue, May 26, 2020 at 07:49:09PM +0800, Zhangfei Gao wrote:
Calling pci_fixup_iommu in iommu_fwspec_init, which alloc
iommu_fwnode. Some platform devices appear as PCI but are
actually on the AMBA bus, and they need fixup in
drivers/pci
On 2020/6/2 上午1:41, Bjorn Helgaas wrote:
On Thu, May 28, 2020 at 09:33:44AM +0200, Joerg Roedel wrote:
On Wed, May 27, 2020 at 01:18:42PM -0500, Bjorn Helgaas wrote:
Is this slowdown significant? We already iterate over every device
when applying PCI_FIXUP_FINAL quirks, so if we used the exi
Hi, Bjorn
On 2020/6/6 上午7:19, Bjorn Helgaas wrote:
On Thu, Jun 04, 2020 at 09:33:07PM +0800, Zhangfei Gao wrote:
On 2020/6/2 上午1:41, Bjorn Helgaas wrote:
On Thu, May 28, 2020 at 09:33:44AM +0200, Joerg Roedel wrote:
On Wed, May 27, 2020 at 01:18:42PM -0500, Bjorn Helgaas wrote:
Is this
Hi, Bjorn
On 2020/6/9 上午12:41, Bjorn Helgaas wrote:
On Mon, Jun 08, 2020 at 10:54:15AM +0800, Zhangfei Gao wrote:
On 2020/6/6 上午7:19, Bjorn Helgaas wrote:
On Thu, Jun 04, 2020 at 09:33:07PM +0800, Zhangfei Gao wrote:
On 2020/6/2 上午1:41, Bjorn Helgaas wrote:
On Thu, May 28, 2020 at 09:33
On 2020/6/10 上午12:49, Bjorn Helgaas wrote:
On Tue, Jun 09, 2020 at 11:15:06AM +0200, Arnd Bergmann wrote:
On Tue, Jun 9, 2020 at 6:02 AM Zhangfei Gao wrote:
On 2020/6/9 上午12:41, Bjorn Helgaas wrote:
On Mon, Jun 08, 2020 at 10:54:15AM +0800, Zhangfei Gao wrote:
On 2020/6/6 上午7:19, Bjorn
On 2020/6/11 下午9:44, Bjorn Helgaas wrote:
+++ b/drivers/iommu/iommu.c
@@ -2418,6 +2418,10 @@ int iommu_fwspec_init(struct device *dev, struct
fwnode_handle *iommu_fwnode,
fwspec->iommu_fwnode = iommu_fwnode;
fwspec->ops = ops;
dev_iommu_fwspec_set(dev, fwspe
Signed-off-by: Zhangfei Gao
---
drivers/misc/uacce/uacce.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
index 107028e..aa91f69 100644
--- a/drivers/misc/uacce/uacce.c
+++ b/drivers/misc/uacce/uacce.c
@@ -179,14 +179,6
e manages the IOMMU interface for the accelerator
device, so the device driver can export some of the resources to the user
space. Uacce than can make sure the device and the process have the same
address space.
References
==
.. [1] https://lwn.net/Articles/774411/
Kenneth Lee (2):
uacce: A
the
hardware resource by interact with the queue file. By mmap the queue
file space to user space, the process can directly put requests to the
hardware without syscall to the kernel space.
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 160 +++
1 file changed, 160 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices/uacce.rst
b/Documentation
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 253 ++--
drivers/crypto/hisilicon/qm.h | 13 +-
drivers/crypto/hisilicon/zip/zip_main.c | 39
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 159 +++
1 file changed, 159 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices/uacce.rst
b/Documentation
the same
address space.
References
==
.. [1] https://lwn.net/Articles/774411/
Kenneth Lee (2):
uacce: Add documents for uacce
uacce: add uacce driver
Zhangfei Gao (1):
crypto: hisilicon - register zip engine to uacce
Documentation/ABI/testing/sysfs-driver-uacce | 53 +++
Documentat
7;-- uacce_queue
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 53 +++
drivers/misc/Kconfig | 1 +
drivers/misc/Makefi
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 256 ++--
drivers/crypto/hisilicon/qm.h | 11 ++
drivers/crypto/hisilicon/zip/zip_main.c | 38
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 159 +++
1 file changed, 159 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices/uacce.rst
b/Documentation
the same
address space.
References
==
.. [1] https://lwn.net/Articles/774411/
Kenneth Lee (2):
uacce: Add documents for uacce
uacce: add uacce driver
Zhangfei Gao (1):
crypto: hisilicon - register zip engine to uacce
Documentation/ABI/testing/sysfs-driver-uacce | 53 +++
Documentat
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 256 ++--
drivers/crypto/hisilicon/qm.h | 11 ++
drivers/crypto/hisilicon/zip/zip_main.c | 38
7;-- uacce_queue
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 53 +++
drivers/misc/Kconfig | 1 +
drivers/misc/Makefi
Uacce than can make sure the device and the process have the same
address space.
References
======
.. [1] https://lwn.net/Articles/774411/
Subject: [PATCH 0/3] *** SUBJECT HERE ***
Kenneth Lee (2):
uacce: Add documents for uacce
uacce: add uacce driver
Zhangfei Gao (2):
crypto: hisil
7;-- uacce_queue
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 37 ++
drivers/misc/Kconfig | 1 +
drivers/misc/Makefi
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 234 +++-
drivers/crypto/hisilicon/qm.h | 11 ++
drivers/crypto/hisilicon/zip/zip_main.c | 16
Remove the module_param uacce_mode, which is not used currently.
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_main.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/hisilicon/zip
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 176 +++
1 file changed, 176 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices/uacce.rst
b/Documentation
ce. Uacce than can make sure the device and the process have the same
address space.
References
==
.. [1] https://lwn.net/Articles/774411/
Kenneth Lee (2):
uacce: Add documents for uacce
uacce: add uacce driver
Zhangfei Gao (2):
crypto: hisilicon - Remove module_param uacce
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 176 +++
1 file changed, 176 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices/uacce.rst
b/Documentation
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 236 +++-
drivers/crypto/hisilicon/qm.h | 11 ++
drivers/crypto/hisilicon/zip/zip_main.c | 16
Remove the module_param uacce_mode, which is not used currently.
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_main.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/hisilicon/zip
7;-- uacce_queue
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 37 ++
drivers/misc/Kconfig | 1 +
drivers/misc/Makefi
tor
device, so the device driver can export some of the resources to the user
space. Uacce than can make sure the device and the process have the same
address space.
References
==
.. [1] https://lwn.net/Articles/774411/
Kenneth Lee (2):
uacce: Add documents for uacce
uacce: add uacce driver
Zhan
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 176 +++
1 file changed, 176 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices/uacce.rst
b/Documentation
Remove the module_param uacce_mode, which is not used currently.
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_main.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/hisilicon/zip
7;-- uacce_queue
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 37 ++
drivers/misc/Kconfig | 1 +
drivers/misc/Makefi
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 236 +++-
drivers/crypto/hisilicon/qm.h | 11 ++
drivers/crypto/hisilicon/zip/zip_main.c | 16
x27;-- uacce_queue
Reviewed-by: Jonathan Cameron
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 39 ++
drivers/misc/Kconfig
Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 176 +++
1 file changed, 176 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices
Register qm to uacce framework for user crypto driver
Reviewed-by: Jonathan Cameron
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 236 +++-
drivers/crypto/hisilicon/qm.h | 11 ++
drivers/crypto
ke sure the device and the process have the same
address space.
References
==
.. [1] https://lwn.net/Articles/774411/
Kenneth Lee (2):
uacce: Add documents for uacce
uacce: add uacce driver
Zhangfei Gao (2):
crypto: hisilicon - Remove module_param uacce_mode
crypto: hisilicon -
Remove the module_param uacce_mode, which is not used currently.
Reviewed-by: Jonathan Cameron
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_main.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a
Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 176 +++
1 file changed, 176 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a/Documentation/misc-devices
ate a software solution on
this assumption. Uacce manages the IOMMU interface for the accelerator
device, so the device driver can export some of the resources to the user
space. Uacce than can make sure the device and the process have the same
address space.
References
==
.. [1] https://l
Remove the module_param uacce_mode, which is not used currently.
Reviewed-by: Jonathan Cameron
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_main.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a
x27;-- uacce_queue
Reviewed-by: Jonathan Cameron
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 39 ++
drivers/misc/Kconfig
Register qm to uacce framework for user crypto driver
Reviewed-by: Jonathan Cameron
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 239 +++-
drivers/crypto/hisilicon/qm.h | 11 ++
drivers/crypto
Cameron
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Zhangfei Gao
---
Documentation/misc-devices/uacce.rst | 176 +++
1 file changed, 176 insertions(+)
create mode 100644 Documentation/misc-devices/uacce.rst
diff --git a
ce than can make sure the device and the process have the same
address space.
References
==
.. [1] https://lwn.net/Articles/774411/
Kenneth Lee (2):
uacce: Add documents for uacce
uacce: add uacce driver
Zhangfei Gao (2):
crypto: hisilicon - Remove module_param uacce_mode
crypto:
Remove the module_param uacce_mode, which is not used currently.
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jonathan Cameron
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_main.c | 31 +
1 file changed, 6 insertions(+), 25
Register qm to uacce framework for user crypto driver
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jonathan Cameron
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 239 +++-
drivers/crypto/hisilicon/qm.h | 11
uacce_queue
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jonathan Cameron
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Signed-off-by: Zhou Wang
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Zhangfei Gao
---
Documentation/ABI/testing/sysfs-driver-uacce | 39 ++
drivers/misc/Kconfi
Hi, Bjorn
On 2020/6/16 上午7:52, Bjorn Helgaas wrote:
On Sat, Jun 13, 2020 at 10:30:56PM +0800, Zhangfei Gao wrote:
On 2020/6/11 下午9:44, Bjorn Helgaas wrote:
+++ b/drivers/iommu/iommu.c
@@ -2418,6 +2418,10 @@ int iommu_fwspec_init(struct device *dev, struct
fwnode_handle *iommu_fwnode
Hi, Joerg
On 2020/6/22 下午7:55, Joerg Roedel wrote:
On Thu, Jun 04, 2020 at 09:33:07PM +0800, Zhangfei Gao wrote:
+++ b/drivers/iommu/iommu.c
@@ -2418,6 +2418,10 @@ int iommu_fwspec_init(struct device *dev, struct
fwnode_handle *iommu_fwnode,
fwspec->iommu_fwnode = iommu_fwn
Hi, Fenghua
I got an issue when testing nginx with 5.18-rc1/2 on aarch64 system,
After debugging I found it is caused by this patchset.
In the test, when accessing https, crypto driver will be used with sva feature,
and nginx is testing multi-threads.
Test cmd:
sudo sbin/nginx
lynx https://l
On Sat, 23 Apr 2022 at 19:13, zhangfei@foxmail.com
wrote:
>
> Hi, Jean
>
> On 2022/4/22 下午11:50, Jean-Philippe Brucker wrote:
> > On Fri, Apr 22, 2022 at 09:15:01PM +0800, zhangfei@foxmail.com wrote:
> >>> I'm trying to piece together what happens from the kernel point of view.
> >>>
> >>>
l be horrible if SVA is broke on 5.18.
Any suggestion?
Thanks
On 2022/4/24 上午10:58, Zhangfei Gao wrote:
On Sat, 23 Apr 2022 at 19:13, zhangfei@foxmail.com
wrote:
Hi, Jean
On 2022/4/22 下午11:50, Jean-Philippe Brucker wrote:
On Fri, Apr 22, 2022 at 09:15:01PM +0800, zhangfei@foxmail.co
2.819946] hisi_sec2 :76:00.0: QM mailbox is busy to start!
[ 152.825992] hisi_sec2 :76:00.0: Failed to dump sqc!
Signed-off-by: Zhangfei Gao
---
This patch partily revert Commit 701fac40384f ("iommu/sva: Assign a PASID to mm
on PASID
allocation and free it on mm exit") since i
Hi, Jean
On 2022/4/26 上午12:13, Jean-Philippe Brucker wrote:
Hi Jacob,
On Mon, Apr 25, 2022 at 08:34:44AM -0700, Jacob Pan wrote:
Hi Jean-Philippe,
On Mon, 25 Apr 2022 15:26:40 +0100, Jean-Philippe Brucker
wrote:
On Mon, Apr 25, 2022 at 07:18:36AM -0700, Dave Hansen wrote:
On 4/25/22 06:53
called only after mm->mm_count is zero. So freeing the PASID
in __mmdrop() guarantees the PASID is safely freed only after no device
is bound to the mm.
Fixes: 701fac40384f ("iommu/sva: Assign a PASID to mm on PASID allocation and free
it on mm exit")
Reported-by: Zhangfei Gao
Sugg
On 2022/4/26 下午12:36, Fenghua Yu wrote:
On Tue, Apr 26, 2022 at 12:28:00PM +0800, Zhangfei Gao wrote:
Hi, Jean
On 2022/4/26 上午12:13, Jean-Philippe Brucker wrote:
Hi Jacob,
On Mon, Apr 25, 2022 at 08:34:44AM -0700, Jacob Pan wrote:
Hi Jean-Philippe,
On Mon, 25 Apr 2022 15:26:40 +0100
mu-v3: Implement iommu_sva_bind/unbind()")
Signed-off-by: Jean-Philippe Brucker
Thanks Jean
Tested-by: Zhangfei Gao
---
v2: Add missing include
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers
) to __mmdrop().
This ensures that the IOMMU driver's existing mmgrab() keeps the PASID
allocated until it drops its mm reference.
Fixes: 701fac40384f ("iommu/sva: Assign a PASID to mm on PASID allocation and free
it on mm exit")
Reported-by: Zhangfei Gao
Tested-by: Zhangfei Gao
On 2022/4/29 上午9:39, Zhangfei Gao wrote:
On 2022/4/29 上午2:00, Fenghua Yu wrote:
The PASID is being freed too early. It needs to stay around until after
device drivers that might be using it have had a chance to clear it out
of the hardware.
As a reminder:
mmget() /mmput() refcount the
Hi, Jason
On 2022/5/11 上午2:13, Jason Gunthorpe via iommu wrote:
On Tue, May 10, 2022 at 06:52:06PM +0100, Robin Murphy wrote:
On 2022-05-10 17:55, Jason Gunthorpe via iommu wrote:
This control causes the ARM SMMU drivers to choose a stage 2
implementation for the IO pagetable (vs the stage 1 u
gned-off-by: Zhangfei Gao
---
drivers/misc/uacce/uacce.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
index 281c54003edc..b6219c6bfb48 100644
--- a/drivers/misc/uacce/uacce.c
+++ b/drivers/misc/ua
Hi, Jean
On 2022/6/15 下午11:16, Jean-Philippe Brucker wrote:
Hi,
On Fri, Jun 10, 2022 at 08:34:23PM +0800, Zhangfei Gao wrote:
The uacce parent's module can be removed when uacce is working,
which may cause troubles.
If rmmod/uacce_remove happens just after fops_open: bind_queue
On 2022/6/16 下午4:14, Jean-Philippe Brucker wrote:
On Thu, Jun 16, 2022 at 12:10:18PM +0800, Zhangfei Gao wrote:
diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
index 281c54003edc..b6219c6bfb48 100644
--- a/drivers/misc/uacce/uacce.c
+++ b/drivers/misc/uacce/uacce.c
On 2022/6/17 下午2:05, Zhangfei Gao wrote:
On 2022/6/16 下午4:14, Jean-Philippe Brucker wrote:
On Thu, Jun 16, 2022 at 12:10:18PM +0800, Zhangfei Gao wrote:
diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
index 281c54003edc..b6219c6bfb48 100644
--- a/drivers/misc/uacce
On 2022/6/17 下午4:20, Zhangfei Gao wrote:
On 2022/6/17 下午2:05, Zhangfei Gao wrote:
On 2022/6/16 下午4:14, Jean-Philippe Brucker wrote:
On Thu, Jun 16, 2022 at 12:10:18PM +0800, Zhangfei Gao wrote:
diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c
index 281c54003edc
On 2022/6/20 下午9:36, Greg Kroah-Hartman wrote:
On Mon, Jun 20, 2022 at 02:24:31PM +0100, Jean-Philippe Brucker wrote:
On Fri, Jun 17, 2022 at 02:05:21PM +0800, Zhangfei Gao wrote:
The refcount only ensures that the uacce_device object is not freed as
long as there are open fds. But
Hi, Greg
On 2022/6/21 下午3:44, Greg Kroah-Hartman wrote:
On Tue, Jun 21, 2022 at 03:37:31PM +0800, Zhangfei Gao wrote:
On 2022/6/20 下午9:36, Greg Kroah-Hartman wrote:
On Mon, Jun 20, 2022 at 02:24:31PM +0100, Jean-Philippe Brucker wrote:
On Fri, Jun 17, 2022 at 02:05:21PM +0800, Zhangfei Gao
On 2022/6/21 下午10:43, Lu Baolu wrote:
Add support for SVA domain allocation and provide an SVA-specific
iommu_domain_ops.
Signed-off-by: Lu Baolu
Reviewed-by: Jean-Philippe Brucker
Tested-by: Zhangfei Gao
Have tested the series on aarch64.
Thanks
---
drivers/iommu/arm/arm-smmu-v3
Hi, Will
On 2021/4/2 上午1:11, Will Deacon wrote:
On Thu, Apr 01, 2021 at 05:47:19PM +0200, Jean-Philippe Brucker wrote:
The SMMU provides a Stall model for handling page faults in platform
devices. It is similar to PCIe PRI, but doesn't require devices to have
their own translation cache. Instea
Add domain->nested to decide whether domain is in nesting mode,
since attr DOMAIN_ATTR_NESTING is removed in the patches:
7876a83 iommu: remove iommu_domain_{get,set}_attr
7e14754 iommu: remove DOMAIN_ATTR_NESTING
Signed-off-by: Zhangfei Gao
---
Nesting info is still required for vsva accord
On 2021/6/16 下午10:44, Christoph Hellwig wrote:
On Wed, Jun 16, 2021 at 10:38:02PM +0800, Zhangfei Gao wrote:
+++ b/include/linux/iommu.h
@@ -87,6 +87,7 @@ struct iommu_domain {
void *handler_token;
struct iommu_domain_geometry geometry;
void *iova_cookie;
+ int
On 2020/12/14 下午8:51, Jean-Philippe Brucker wrote:
On Thu, Nov 26, 2020 at 06:09:26PM +, Robin Murphy wrote:
On 2020-11-12 12:55, Jean-Philippe Brucker wrote:
Copy the dma-can-stall property into the fwspec structure.
Can't we just handle this as a regular device property? It's not part
t;device structure
dt-bindings: document stall property for IOMMU masters
ACPI/IORT: Enable stall support for platform devices
iommu/arm-smmu-v3: Add stall support for platform devices
Thanks Jean
I have tested on Hisilicon Kunpeng920 board.
Tested-by: Zha
enabling SVA for now. In the future, if
a device driver implementing a uacce interface doesn't need IOPF
support, it will need to tell the uacce module, for example with a new
flag.
Signed-off-by: Jean-Philippe Brucker
---
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Cc: Zhangfei Gao
Cc: Zhou
b.com/Linaro/qemu/tree/v6.1.0-rmr-v2-nested_smmuv3_v10
Though they are provided for test purpose,
Tested-by: Zhangfei Gao
Thanks
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On 2021/12/7 下午6:27, Eric Auger wrote:
Hi Zhangfei,
On 12/3/21 1:27 PM, Zhangfei Gao wrote:
Hi, Eric
On 2021/10/27 下午6:44, Eric Auger wrote:
This series brings the IOMMU part of HW nested paging support
in the SMMUv3.
The SMMUv3 driver is adapted to support 2 nested stages.
The IOMMU API
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