Hi Yong, Tuukka,
+CC IOMMU ML and Joerg. (Technically you should resend this patch
including them.)
On Tue, Jun 6, 2017 at 5:39 AM, Yong Zhi wrote:
> From: Tuukka Toivonen
>
> This driver translates Intel IPU3 internal virtual
> address to physical address.
Please see my comments inline.
>
>
Hi Yong, Tuukka,
Continuing from yesterday. Please see comments inline.
> On Tue, Jun 6, 2017 at 5:39 AM, Yong Zhi wrote:
[snip]
>> + ptr = ipu3_mmu_alloc_page_table(mmu_dom, false);
>> + if (!ptr)
>> + goto fail_page_table;
>> +
>> + /*
>> +* We always ma
Hi Yong,
+Robin, Joerg, IOMMU ML
Please see my comments inline.
On Tue, Jun 6, 2017 at 5:39 AM, Yong Zhi wrote:
> IPU3 mmu based DMA mapping driver
>
> Signed-off-by: Yong Zhi
> ---
> drivers/media/pci/intel/ipu3/Kconfig | 6 +
> drivers/media/pci/intel/ipu3/Makefile | 1 +
> d
Hi Alan,
On Thu, Jun 8, 2017 at 2:45 AM, Alan Cox wrote:
>> > + struct ipu3_mmu *mmu = to_ipu3_mmu(dev);
>> > + dma_addr_t daddr = iommu_iova_to_phys(mmu->domain, dma_handle);
>> > +
>> > + clflush_cache_range(phys_to_virt(daddr), size);
>>
>> You might need to consider another
Hi Sakari,
On Thu, Jun 8, 2017 at 6:59 AM, Sakari Ailus
wrote:
> Hi Tomasz,
>
> On Tue, Jun 06, 2017 at 07:13:19PM +0900, Tomasz Figa wrote:
>> Hi Yong, Tuukka,
>>
>> +CC IOMMU ML and Joerg. (Technically you should resend this patch
>> including them.)
>
>
On Thu, Jun 8, 2017 at 10:22 PM, Robin Murphy wrote:
> On 07/06/17 10:47, Tomasz Figa wrote:
>> Hi Yong,
>>
>> +Robin, Joerg, IOMMU ML
>>
>> Please see my comments inline.
>>
>> On Tue, Jun 6, 2017 at 5:39 AM, Yong Zhi wrote:
[snip]
>>>
On Fri, Jun 9, 2017 at 1:43 AM, Sakari Ailus wrote:
> Hi Tomasz,
>
> On Wed, Jun 07, 2017 at 05:35:13PM +0900, Tomasz Figa wrote:
>> Hi Yong, Tuukka,
>>
>> Continuing from yesterday. Please see comments inline.
>>
>> > On Tue, Jun 6, 2017 at 5:39 AM, Yo
On Fri, Jun 9, 2017 at 3:07 AM, Robin Murphy wrote:
> On 08/06/17 15:35, Tomasz Figa wrote:
>> On Thu, Jun 8, 2017 at 10:22 PM, Robin Murphy wrote:
>>> On 07/06/17 10:47, Tomasz Figa wrote:
>>>> Hi Yong,
>>>>
>>>> +Robin, Joerg, IOMMU ML
>
On Fri, Jun 9, 2017 at 8:16 PM, Sakari Ailus wrote:
> Hi Tomasz,
>
> On Fri, Jun 09, 2017 at 02:59:10PM +0900, Tomasz Figa wrote:
>> On Fri, Jun 9, 2017 at 1:43 AM, Sakari Ailus wrote:
>> >> >> +static void ipu3_mmu_domain_free(struct iommu_domain *dom)
&g
On Fri, Jun 9, 2017 at 5:26 PM, Tuukka Toivonen
wrote:
> Hi Tomasz,
>
> Couple of small comments below.
>
> On Wednesday, June 07, 2017 17:35:13 Tomasz Figa wrote:
>> >> +static void ipu3_mmu_domain_free(struct iommu_domain *dom)
>> >> +{
>&g
combination.
Fix this by checking for __GFP_DMA and __GFP_DMA32 in incoming GFP flags
and adding __GFP_HIGHMEM only if they are not present.
Signed-off-by: Tomasz Figa
---
drivers/iommu/dma-iommu.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/dma-iommu.c
attempts,
which are not critical.
Signed-off-by: Tomasz Figa
---
drivers/iommu/dma-iommu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
index 29965a092a69..8507987eed90 100644
--- a/drivers/iommu/dma-iommu.c
+++ b
On Tue, Jun 27, 2017 at 8:01 PM, Robin Murphy wrote:
> On 27/06/17 08:28, Tomasz Figa wrote:
>> Current implementation of __iommu_dma_alloc_pages() keeps adding
>> __GFP_HIGHMEM to GFP flags regardless of whether other zone flags are
>> already included in the incoming f
On Tue, Jun 27, 2017 at 9:26 PM, Robin Murphy wrote:
> On 27/06/17 12:17, Tomasz Figa wrote:
>> On Tue, Jun 27, 2017 at 8:01 PM, Robin Murphy wrote:
>>> On 27/06/17 08:28, Tomasz Figa wrote:
>>>> Current implementation of __iommu_dma_alloc_pages() keeps adding
&
combination.
Fix this by checking for __GFP_DMA and __GFP_DMA32 in incoming GFP flags
and adding __GFP_HIGHMEM only if they are not present.
Signed-off-by: Tomasz Figa
---
drivers/iommu/dma-iommu.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
Changes from v1:
- Update the comment
attempts,
which are not critical.
Signed-off-by: Tomasz Figa
Reviewed-by: Robin Murphy
---
drivers/iommu/dma-iommu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
Changes from v1:
- Fix typo in subject.
- Add Robin's Reviewed-by.
diff --git a/drivers/iommu/dma-iommu.c b/dr
remaining non-static functions in the file, so that loadable
modules can benefit from them. Use EXPORT_SYMBOL() for consistency with
other exports in the file.
Signed-off-by: Tomasz Figa
---
drivers/base/dma-mapping.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/base/dma-mapping.c b
There are some non-static functions potentially useful in IOMMU drivers
that do not have their symbols exported. Export them too, so that
loadable modules can benefit from them. Use EXPORT_SYMBOL_GPL() for
consistency with other exports in the file.
Signed-off-by: Tomasz Figa
---
drivers/iommu
-static functions in the file, so that loadable modules
can benefit from them. Use EXPORT_SYMBOL() for consistency with other
exports in the file.
Signed-off-by: Tomasz Figa
---
drivers/iommu/dma-iommu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/iommu/dma-iommu.c b
fetch https://chromium.googlesource.com/chromiumos/third_party/kernel
refs/changes/26/548626/4
git checkout FETCH_HEAD
The above is based on ChromeOS 4.4 kernel branch and has been used for
testing this series with code using it on real devices.
Tomasz Figa (5):
base: dma-mapping: Export
previously
remapped. It hides implementation details, can do more sanity checks
than find_vm_area() and can be exported for use in loadable modules.
Signed-off-by: Tomasz Figa
---
drivers/base/dma-mapping.c | 15 +++
include/linux/dma-mapping.h | 2 ++
2 files changed, 17 insertions
In case of loadable modules using dma-iommu helpers, it makes sense to
drop the reference to the iova cache on module exit. Add a helper called
iommu_dma_cleanup() that undoes the effects of iommu_dma_init(), so that
modules can be unloaded cleanly.
Signed-off-by: Tomasz Figa
---
drivers/iommu
ut was misled by
existing EXPORT_SYMBOL()s in the file. Will fix.
>
> On Wed, Jul 05, 2017 at 04:12:11PM +0900, Tomasz Figa wrote:
>> There is nothing wrong in having a loadable module implementing DMA API,
>> for example to be used for sub-devices registered by the module.
>>
On Thu, Jul 6, 2017 at 2:20 AM, Christoph Hellwig wrote:
> On Thu, Jul 06, 2017 at 12:22:35AM +0900, Tomasz Figa wrote:
>> Generally the user is a work in progress that should be posted in a
>> very near future. You can find a reference to our downstream tree at
>> chro
On Thu, Jul 6, 2017 at 1:22 AM, Robin Murphy wrote:
> On 05/07/17 08:12, Tomasz Figa wrote:
>> There is nothing wrong in having a loadable module implementing DMA API,
>> for example to be used for sub-devices registered by the module. However,
>> most of the functions from
On Thu, Jul 6, 2017 at 5:26 PM, Arnd Bergmann wrote:
> On Thu, Jul 6, 2017 at 3:44 AM, Tomasz Figa wrote:
>> On Thu, Jul 6, 2017 at 2:20 AM, Christoph Hellwig wrote:
>>> On Thu, Jul 06, 2017 at 12:22:35AM +0900, Tomasz Figa wrote:
>
>>> In general I thin
On Thu, Jul 6, 2017 at 5:34 PM, Tomasz Figa wrote:
> On Thu, Jul 6, 2017 at 5:26 PM, Arnd Bergmann wrote:
>> On Thu, Jul 6, 2017 at 3:44 AM, Tomasz Figa wrote:
>>> On Thu, Jul 6, 2017 at 2:20 AM, Christoph Hellwig wrote:
>>>> On Thu, Jul 06, 2017 at 12:22
On Thu, Jul 6, 2017 at 9:23 PM, Arnd Bergmann wrote:
> On Thu, Jul 6, 2017 at 10:36 AM, Tomasz Figa wrote:
>> On Thu, Jul 6, 2017 at 5:34 PM, Tomasz Figa wrote:
>>> On Thu, Jul 6, 2017 at 5:26 PM, Arnd Bergmann wrote:
>>>> On Thu, Jul 6, 2017 at 3:44 AM, Tomasz
On Thu, Jul 6, 2017 at 10:31 PM, Tomasz Figa wrote:
> On Thu, Jul 6, 2017 at 9:23 PM, Arnd Bergmann wrote:
>> On Thu, Jul 6, 2017 at 10:36 AM, Tomasz Figa wrote:
>>> On Thu, Jul 6, 2017 at 5:34 PM, Tomasz Figa wrote:
>>>> On Thu, Jul 6, 2017 at 5:26 PM, Arnd Berg
On Thu, Jul 6, 2017 at 11:02 PM, Arnd Bergmann wrote:
> On Thu, Jul 6, 2017 at 3:49 PM, Tomasz Figa wrote:
>> On Thu, Jul 6, 2017 at 10:31 PM, Tomasz Figa wrote:
>
>>> On the other hand, if it's strictly about base/dma-mapping, we might
>>> not need it inde
On Thu, Jul 6, 2017 at 11:10 PM, Christoph Hellwig wrote:
> On Thu, Jul 06, 2017 at 12:09:45PM +0100, Robin Murphy wrote:
>> I suppose another option is to just make the IOMMU and DMA ops a
>> self-contained non-modular driver mirroring the VT-d/AMD-Vi IOMMUs -
>> AFAICS it shouldn't have to be al
On Thu, Jul 6, 2017 at 11:17 PM, Tomasz Figa wrote:
> On Thu, Jul 6, 2017 at 11:10 PM, Christoph Hellwig wrote:
>> On Thu, Jul 06, 2017 at 12:09:45PM +0100, Robin Murphy wrote:
>>> I suppose another option is to just make the IOMMU and DMA ops a
>>> self-contained n
On Thu, Jul 6, 2017 at 11:27 PM, Arnd Bergmann wrote:
> On Thu, Jul 6, 2017 at 4:06 PM, Tomasz Figa wrote:
>> On Thu, Jul 6, 2017 at 11:02 PM, Arnd Bergmann wrote:
>>> On Thu, Jul 6, 2017 at 3:49 PM, Tomasz Figa wrote:
>>>> On Thu, Jul 6, 2017 at 10:31 PM, Tomasz
On Thu, Jul 6, 2017 at 11:35 PM, Arnd Bergmann wrote:
> On Thu, Jul 6, 2017 at 4:24 PM, Tomasz Figa wrote:
>> On Thu, Jul 6, 2017 at 11:17 PM, Tomasz Figa wrote:
>>> On Thu, Jul 6, 2017 at 11:10 PM, Christoph Hellwig wrote:
>>>> On Thu, Jul 06, 2017 at 12:09:
Hi Joerg,
On Wed, Jul 26, 2017 at 6:15 PM, Joerg Roedel wrote:
> On Tue, Jul 04, 2017 at 10:55:55PM +0900, Tomasz Figa wrote:
>> Current implementation of __iommu_dma_alloc_pages() keeps adding
>> __GFP_HIGHMEM to GFP flags regardless of whether other zone flags are
>> al
Hi Joerg,
On Wed, Jul 26, 2017 at 6:24 PM, Joerg Roedel wrote:
> On Tue, Jul 04, 2017 at 10:55:56PM +0900, Tomasz Figa wrote:
>> diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c
>> index bf23989b5158..6ed8c8f941d8 100644
>> --- a/drivers/iommu/dma-iommu.c
&
Hi Robin,
On Wed, Jul 19, 2017 at 10:37 PM, Robin Murphy wrote:
> On 19/07/17 04:12, Yong Zhi wrote:
>> From: Tomasz Figa
>>
>> This driver translates Intel IPU3 internal virtual
>> address to physical address.
>>
>> Signed-off-by: Tomasz Figa
>>
On Fri, Jul 21, 2017 at 7:09 AM, Sakari Ailus wrote:
> Hi Arnd,
>
> On Wed, Jul 19, 2017 at 09:24:41AM +0200, Arnd Bergmann wrote:
>> On Wed, Jul 19, 2017 at 5:12 AM, Yong Zhi wrote:
>> > From: Tomasz Figa
>> >
>> > This patch adds support for the IPU
On Friday 09 of August 2013 15:15:57 Cho KyongHo wrote:
> On Fri, 09 Aug 2013 00:26:51 +0200, Tomasz Figa wrote:
> > Hi KyongHo,
> >
> > On Thursday 08 of August 2013 18:38:35 Cho KyongHo wrote:
> > > Signed-off-by: Cho KyongHo
> > > ---
> > &g
Hi KyongHo,
On 09.03.2014 14:54, KyongHo Cho wrote:
On Thu, Mar 6, 2014 at 8:48 AM, Kyungmin Park wrote:
On Fri, Feb 14, 2014 at 9:17 AM, Cho KyongHo wrote:
-Original Message-
From: Olof Johansson [mailto:o...@lixom.net]
Sent: Friday, February 14, 2014 4:34 AM
On Mon, Feb 10, 2014 a
Hi KyongHo,
On 14.03.2014 06:06, Cho KyongHo wrote:
This adds gate clocks of all System MMUs and their master IPs
that are not apeared in clk-exynos5250.c and clk-exynos5420.c
Also fixes GATE_IP_ACP to 0x18800 and changed GATE_DA to GATE
for System MMU clocks in clk-exynos4.c
Signed-off-by: Cho
Hi KyongHo,
On 14.03.2014 06:06, Cho KyongHo wrote:
This patch adds dts entries for the System MMU devices found on
Exynos4 and Exynos5 SoC series and the System MMU binding
documentation.
CC: Rob Herring
CC: Sylwester Nawrocki
Signed-off-by: Cho KyongHo
---
.../bindings/iommu/samsung,exyn
Hi KyongHo,
On 14.03.2014 06:08, Cho KyongHo wrote:
Runtime power management by exynos-iommu driver independently from
master H/W's runtime pm is not useful for power saving since attaching
master H/W in probing time turns on its local power endlessly.
Thus this removes runtime pm API calls.
Run
Hi KyongHo,
On 14.03.2014 06:05, Cho KyongHo wrote:
System MMU driver is changed to control only a single instance of
System MMU at a time. Since a single instance of System MMU has only
a single clock descriptor for its clock gating, there is no need to
obtain two or more clock descriptors.
Hi KyongHo,
On 14.03.2014 06:05, Cho KyongHo wrote:
This patch uses managed device helper functions in the probe().
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 64 +-
1 file changed, 26 insertions(+), 38 deletions(-)
diff --git a/
Hi KyongHo,
On 14.03.2014 06:09, Cho KyongHo wrote:
This commit adds device tree support for System MMU.
Signed-off-by: Cho KyongHo
---
drivers/iommu/Kconfig|5 ++---
drivers/iommu/exynos-iommu.c | 21 +
2 files changed, 19 insertions(+), 7 deletions(-)
d
Hi KyongHo,
On 14.03.2014 06:09, Cho KyongHo wrote:
exynos-iommu driver must care about master H/W's gate clock as well as
System MMU's gate clock. To enhance readability of the source code,
macros to gate/ungate those clocks are defined.
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-i
Hi KyongHo,
On 14.03.2014 06:10, Cho KyongHo wrote:
This adds support for Suspend to RAM and Runtime Power Management.
Since System MMU is located in the same local power domain of its
master H/W, System MMU must be initialized before it is working if
its power domain was ever turned off. TLB i
Hi KyongHo,
On 14.03.2014 06:10, Cho KyongHo wrote:
Some master device descriptor like fimc-is which is an abstraction
of very complex H/W may have multiple System MMUs. For those devices,
the design of the link between System MMU and its master H/W is needed
to be reconsidered.
A link structur
On 18.03.2014 12:18, Sachin Kamat wrote:
On 18 March 2014 16:33, Cho KyongHo wrote:
On Fri, 14 Mar 2014 22:27:59 +0530, Sachin Kamat wrote:
Hi KyongHo,
On 14 March 2014 19:13, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:09, Cho KyongHo wrote:
exynos-iommu driver must care about
On 18.03.2014 14:01, Cho KyongHo wrote:
On Fri, 14 Mar 2014 17:12:03 +0100, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:10, Cho KyongHo wrote:
Some master device descriptor like fimc-is which is an abstraction
of very complex H/W may have multiple System MMUs. For those devices,
the
On 18.03.2014 10:56, Cho KyongHo wrote:
On Fri, 14 Mar 2014 13:59:00 +0100, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:08, Cho KyongHo wrote:
[snip]
-static bool __exynos_sysmmu_disable(struct sysmmu_drvdata *data)
+static void __sysmmu_disable_nocount(struct sysmmu_drvdata *data
On 18.03.2014 11:38, Cho KyongHo wrote:
On Fri, 14 Mar 2014 14:28:36 +0100, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:05, Cho KyongHo wrote:
This patch uses managed device helper functions in the probe().
Signed-off-by: Cho KyongHo
---
drivers/iommu/exynos-iommu.c | 64
On 18.03.2014 12:09, Cho KyongHo wrote:
On Fri, 14 Mar 2014 20:52:43 +0530, Sachin Kamat wrote:
Hi KyongHo,
On 14 March 2014 10:35, Cho KyongHo wrote:
This patch uses managed device helper functions in the probe().
Signed-off-by: Cho KyongHo
---
[snip]
+ data->clk = devm_clk_get(de
On 18.03.2014 11:52, Cho KyongHo wrote:
On Fri, 14 Mar 2014 14:39:33 +0100, Tomasz Figa wrote:
@@ -557,11 +558,23 @@ static int exynos_sysmmu_probe(struct platform_device
*pdev)
return 0;
}
-static struct platform_driver exynos_sysmmu_driver = {
- .probe
On 18.03.2014 12:23, Cho KyongHo wrote:
On Fri, 14 Mar 2014 17:07:53 +0100, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:10, Cho KyongHo wrote:
[snip]
@@ -677,11 +679,40 @@ static int __init exynos_sysmmu_probe(struct
platform_device *pdev)
platform_set_drvdata(pdev, data
On 19.03.2014 10:01, Sachin Kamat wrote:
On 19 March 2014 14:29, Cho KyongHo wrote:
On Tue, 18 Mar 2014 16:14:53 +0100, Tomasz Figa wrote:
On 18.03.2014 12:09, Cho KyongHo wrote:
On Fri, 14 Mar 2014 20:52:43 +0530, Sachin Kamat wrote:
Hi KyongHo,
On 14 March 2014 10:35, Cho KyongHo wrote
On 19.03.2014 02:03, Cho KyongHo wrote:
On Tue, 18 Mar 2014 16:09:50 +0100, Tomasz Figa wrote:
On 18.03.2014 10:56, Cho KyongHo wrote:
On Fri, 14 Mar 2014 13:59:00 +0100, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:08, Cho KyongHo wrote:
[snip]
@@ -637,11 +708,14 @@ static void
On 19.03.2014 01:39, Cho KyongHo wrote:
On Tue, 18 Mar 2014 15:26:48 +0100, Tomasz Figa wrote:
On 18.03.2014 14:01, Cho KyongHo wrote:
On Fri, 14 Mar 2014 17:12:03 +0100, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:10, Cho KyongHo wrote:
Some master device descriptor like fimc-is
On 19.03.2014 14:20, Tomasz Figa wrote:
On 19.03.2014 01:39, Cho KyongHo wrote:
On Tue, 18 Mar 2014 15:26:48 +0100, Tomasz Figa wrote:
On 18.03.2014 14:01, Cho KyongHo wrote:
On Fri, 14 Mar 2014 17:12:03 +0100, Tomasz Figa wrote:
Hi KyongHo,
On 14.03.2014 06:10, Cho KyongHo wrote:
Some
Hi Grant,
On 19.03.2014 18:03, Grant Grundler wrote:
On Wed, Mar 19, 2014 at 6:12 AM, Tomasz Figa wrote:
...
No. Proper Linux drivers must support deferred probing mechanism and there
should be no assumptions about probing orders. Using other initcall level
than module_initcall for particular
On 19.03.2014 19:37, Grant Grundler wrote:
On Wed, Mar 19, 2014 at 10:30 AM, Tomasz Figa wrote:
...
As I said, AFAIK the trend is to get rid of ordering by initcalls and make
sure that drivers can handle missing dependencies properly, even for
"services" such as DMA, GPIO, clocks
On 20.03.2014 11:03, Cho KyongHo wrote:
On Wed, 19 Mar 2014 13:08:42 +0100, Tomasz Figa wrote:
On 19.03.2014 10:01, Sachin Kamat wrote:
On 19 March 2014 14:29, Cho KyongHo wrote:
On Tue, 18 Mar 2014 16:14:53 +0100, Tomasz Figa wrote:
On 18.03.2014 12:09, Cho KyongHo wrote:
On Fri, 14 Mar
On 20.03.2014 11:22, Cho KyongHo wrote:
On Wed, 19 Mar 2014 16:14:57 +0100, Tomasz Figa wrote:
On 19.03.2014 14:20, Tomasz Figa wrote:
On 19.03.2014 01:39, Cho KyongHo wrote:
On Tue, 18 Mar 2014 15:26:48 +0100, Tomasz Figa wrote:
On 18.03.2014 14:01, Cho KyongHo wrote:
On Fri, 14 Mar 2014
On 21.03.2014 06:21, Cho KyongHo wrote:
On Thu, 20 Mar 2014 11:54:58 +0100, Tomasz Figa wrote:
On 20.03.2014 11:22, Cho KyongHo wrote:
On Wed, 19 Mar 2014 16:14:57 +0100, Tomasz Figa wrote:
On 19.03.2014 14:20, Tomasz Figa wrote:
On 19.03.2014 01:39, Cho KyongHo wrote:
On Tue, 18 Mar 2014
On 27.04.2014 09:37, Shaik Ameer Basha wrote:
From: Cho KyongHo
Some master device descriptor like fimc-is which is an abstraction
of very complex H/W may have multiple System MMUs. For those devices,
the design of the link between System MMU and its master H/W is needed
to be reconsidered.
A
On 06.05.2014 19:59, Joerg Roedel wrote:
On Wed, Apr 30, 2014 at 04:27:10PM +0530, Shaik Ameer Basha wrote:
This series is going on for quite a long time and most of the patches here
doesn't depend on dt bindings. As Exynos IOMMU h/w is introducing new versions
very frequently, maintaining and r
Hi Vivek,
On Fri, Jun 15, 2018 at 7:53 PM Vivek Gautam
wrote:
>
> Qualcomm SoCs have an additional level of cache called as
> System cache or Last level cache[1]. This cache sits right
> before the DDR, and is tightly coupled with the memory
> controller.
> The cache is available to all the clien
Hi Helen,
On Fri, Nov 23, 2018 at 8:31 AM Helen Koike wrote:
>
> Hi Tomasz,
>
> On 11/20/18 4:48 AM, Tomasz Figa wrote:
> > Hi Helen,
> >
> > On Tue, Nov 20, 2018 at 4:08 AM Helen Koike
> > wrote:
> >>
> >> From: Enric Balletbo i Serra
Hi Michael,
On Fri, Nov 23, 2018 at 1:58 PM Michael Zoran wrote:
>
> On Fri, 2018-11-23 at 11:27 +0900, Tomasz Figa wrote:
> >
> > The point here is not about setting and resetting the plane->fb
> > pointer. It's about what happens inside
> > drm_atomi
s an arm,smmu-v2 implementation with specific
> > > clock and power requirements.
> > > On msm8996, multiple cores, viz. mdss, video, etc. use this
> > > smmu. On sdm845, this smmu is used with gpu.
> > > Add bindings for the same.
> > >
> > > Signed-of
On Sat, Nov 24, 2018 at 3:34 AM Will Deacon wrote:
>
> On Fri, Nov 23, 2018 at 03:06:29PM +0530, Vivek Gautam wrote:
> > On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa wrote:
> > > On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam
> > > wrote:
> > > > On
Hi Gustavo,
On Tue, Nov 27, 2018 at 8:54 AM Gustavo Padovan
wrote:
>
> Hi Tomasz,
>
> On 11/23/18 12:27 AM, Tomasz Figa wrote:
> > Hi Helen,
> >
> > On Fri, Nov 23, 2018 at 8:31 AM Helen Koike
> > wrote:
> >> Hi Tomasz,
> >>
>
nce we don't currently have a better
> +* solution, and this code runs before the driver is probed and
> +* has a chance to intervene, use a simple blacklist to avoid
> +* ending up with iommu dma_ops:
> +*/
> + if (of_match_device(iommu_blacklist, dev
On Fri, Dec 7, 2018 at 6:25 PM Vivek Gautam wrote:
>
> Hi Robin,
>
> On Tue, Dec 4, 2018 at 8:51 PM Robin Murphy wrote:
> >
> > On 04/12/2018 11:01, Vivek Gautam wrote:
> > > Qualcomm SoCs have an additional level of cache called as
> > > System cache, aka. Last level cache (LLC). This cache sits
gned-off-by: Marek Szyprowski
> ---
> drivers/clk/samsung/clk-exynos4.c | 1 +
> include/dt-bindings/clock/exynos4.h | 10 +-
> 2 files changed, 6 insertions(+), 5 deletions(-)
Acked-by: Tomasz Figa
Best regards,
Tomasz
___
iommu
gned-off-by: Marek Szyprowski
> Acked-by: Tomasz Figa
> ---
> drivers/clk/samsung/clk-exynos4.c | 1 +
> include/dt-bindings/clock/exynos4.h | 10 +-
> 2 files changed, 6 insertions(+), 5 deletions(-)
>
Applied for next.
Best regards,
Tomasz
__
Add PM domain notifications
Tomasz Figa (1):
iommu: rockchip: Handle system-wide and runtime PM
Documentation/power/notifiers.txt | 14 +++
drivers/base/power/domain.c | 50 +
drivers/iommu/rockchip-iommu.c| 208 +++---
include/linux/pm_domain.h
rocki
[tf...@chromium.org: rebased]
Signed-off-by: Tomasz Figa
---
Documentation/power/notifiers.txt | 14 +++
drivers/base/power/domain.c | 50 +++
include/linux/pm_domain.h | 20
3 files changed, 84 insertions(+)
diff --
Hi Sylwester,
On Thu, Dec 11, 2014 at 7:36 PM, Sylwester Nawrocki
wrote:
>
> Hi Tomasz,
>
> On 11/12/14 09:26, Tomasz Figa wrote:
> > From: Sylwester Nawrocki
> >
> > This patch adds notifiers to the runtime PM/genpd subsystem. It is now
> > possible to regis
uses power domain notifications
to perform necessary IOMMU initialization. Race with runtime PM core
is avoided by protecting code accessing the hardware, including startup
and shutdown functions, with a spinlock with a check for power state
inside.
Signed-off-by: Tomasz Figa
---
drivers/iommu
Hi Ulf,
On Thu, Dec 11, 2014 at 8:58 PM, Ulf Hansson wrote:
> On 11 December 2014 at 09:26, Tomasz Figa wrote:
>> This patch modifies the rockchip-iommu driver to consider state of
>> the power domain the IOMMU is located in. When the power domain
>> is powered off, the IOM
Hi Rafael,
On Fri, Dec 12, 2014 at 5:48 AM, Rafael J. Wysocki wrote:
> On Thursday, December 11, 2014 04:51:37 PM Ulf Hansson wrote:
>> On 11 December 2014 at 16:31, Kevin Hilman wrote:
>> > [+ Laurent Pinchart]
>> >
>> > Tomasz Figa writes:
>> &g
On Sat, Dec 13, 2014 at 5:04 AM, Kevin Hilman wrote:
> Tomasz Figa writes:
>
> [...]
>
>> We have a power domain, which contains an IOMMU and an IP block, which
>> can do bus transactions through that IOMMU. Of course the IP block is
>> not aware of the IOMMU, becau
On Sat, Dec 13, 2014 at 5:47 AM, Laurent Pinchart
wrote:
> Hello,
>
> On Friday 12 December 2014 13:15:51 Tomasz Figa wrote:
>> On Fri, Dec 12, 2014 at 5:48 AM, Rafael J. Wysocki wrote:
>> > On Thursday, December 11, 2014 04:51:37 PM Ulf Hansson wrote:
>> >>
On Tue, Dec 16, 2014 at 4:53 AM, Laurent Pinchart
wrote:
> Hi Tomasz,
>
> On Monday 15 December 2014 11:39:01 Tomasz Figa wrote:
>> On Sat, Dec 13, 2014 at 5:47 AM, Laurent Pinchart wrote:
>> > On Friday 12 December 2014 13:15:51 Tomasz Figa wrote:
>> >> On Fr
his patch changes the mapping code to always zap the page table
after it is updated, which avoids the aforementioned race and also
zap the last page of the mapping to make sure that stale data is
not cached from an already existing mapping.
Signed-off-by: Tomasz Figa
Reviewed-by: Daniel Ku
On Mon, Feb 9, 2015 at 8:19 PM, Tomasz Figa wrote:
> Even though the code uses the dt_lock spin lock to serialize mapping
> operation from different threads, it does not protect from IOMMU
> accesses that might be already taking place and thus altering state
> of the IOTLB. Thi
Hi,
You can find part 2 of my comments inline.
On Fri, Mar 6, 2015 at 7:48 PM, wrote:
[snip]
> +static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
> +{
> + struct iommu_domain *domain = dev_id;
> + struct mtk_iommu_domain *mtkdomain = domain->priv;
> + struct mtk_iommu_
On Mon, Mar 9, 2015 at 11:46 PM, Yingjoe Chen wrote:
> On Mon, 2015-03-09 at 20:11 +0900, Tomasz Figa wrote:
> <...>
>> > +/*
>> > + * pimudev is a global var for dma_alloc_coherent.
>> > + * It is not accepatable, we will delete it if "domain_all
On Tue, Mar 10, 2015 at 12:41 PM, Yingjoe Chen
wrote:
> On Tue, 2015-03-10 at 02:00 +0900, Tomasz Figa wrote:
>> On Mon, Mar 9, 2015 at 11:46 PM, Yingjoe Chen
>> wrote:
>> > On Mon, 2015-03-09 at 20:11 +0900, Tomasz Figa wrote:
>> > <...>
>> >
Hi,
Please find next part of my comments inline.
On Fri, Mar 6, 2015 at 7:48 PM, wrote:
[snip]
> +/*
> + * pimudev is a global var for dma_alloc_coherent.
> + * It is not accepatable, we will delete it if "domain_alloc" is enabled
It looks like we indeed need to use dma_alloc_coherent() and
Sorry, I had to dig my way out through my backlog.
On Tue, Mar 3, 2015 at 10:36 PM, Joerg Roedel wrote:
> On Mon, Feb 09, 2015 at 08:19:21PM +0900, Tomasz Figa wrote:
>> Even though the code uses the dt_lock spin lock to serialize mapping
>> operation from different threads, it d
On Tue, Apr 14, 2015 at 3:31 PM, Yong Wu wrote:
>> >>
>> >> > +
>> >> > + piommu->protect_va = devm_kmalloc(piommu->dev,
>> >> > MTK_PROTECT_PA_ALIGN*2,
>> >>
>> >> style: Operators like * should have space on both sides.
>> >>
>> >> > + GFP_KERNEL);
On Wed, Apr 15, 2015 at 4:06 PM, Yong Wu wrote:
> On Wed, 2015-04-15 at 11:20 +0900, Tomasz Figa wrote:
>> On Tue, Apr 14, 2015 at 3:31 PM, Yong Wu wrote:
>> >> >>
>> >> >> > +
>> >> >> > + piommu->p
.
To fix both issues, this patch makes the mapping code zap first and last
(if they are different) IOVAs of new mapping after the page table is
updated.
Signed-off-by: Tomasz Figa
Reviewed-by: Daniel Kurtz
Tested-by: Heiko Stuebner
---
drivers/iommu/rockchip-iommu.c | 23
On Wed, Aug 21, 2019 at 8:05 PM Sakari Ailus
wrote:
>
> Hi Tomasz,
>
> On Wed, Aug 21, 2019 at 07:30:38PM +0900, Tomasz Figa wrote:
[snip]
> > Is it really correct to enable the clock before the regulators?
> >
> > According to the datasheet, it should be:
> >
Hi Dongchun,
On Tue, Sep 3, 2019 at 12:02 AM Dongchun Zhu wrote:
>
> Hi Tomasz,
>
> On Fri, 2019-08-23 at 17:17 +0900, Tomasz Figa wrote:
> > Hi Dongchun,
> >
> > On Mon, Jul 08, 2019 at 06:06:41PM +0800, dongchun@mediatek.com wrote:
> > > From: Dong
Hi Dongchun,
On Thu, Sep 5, 2019 at 4:22 PM wrote:
>
> From: Dongchun Zhu
>
> This patch adds a V4L2 sub-device driver for DW9768 lens voice coil,
> and provides control to set the desired focus.
>
> The DW9768 is a 10 bit DAC with 100mA output current sink capability
> from Dongwoon, designed f
On Thu, Sep 5, 2019 at 7:45 PM Sakari Ailus
wrote:
>
> Hi Dongchun,
>
> On Thu, Sep 05, 2019 at 05:41:05PM +0800, Dongchun Zhu wrote:
>
> ...
>
> > > > + ret = regulator_bulk_enable(OV02A10_NUM_SUPPLIES, ov02a10->supplies);
> > > > + if (ret < 0) {
> > > > + dev_err(dev, "Failed to enable
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