all busses that require
> input/output ID translations.
>
> Leave a wrapper function of_msi_map_rid() in place to keep
> existing PCI code mapping requester ID syntactically unchanged.
>
> No functional change intended.
>
> Signed-off-by: Lorenzo Pieralisi
> Cc: Rob Herrin
On Fri, May 22, 2020 at 3:42 AM Robin Murphy wrote:
>
> On 2020-05-22 00:10, Rob Herring wrote:
> > On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi
> > wrote:
> >>
> >> From: Laurentiu Tudor
> >>
> >> The existing bindings cannot be used t
On Fri, May 22, 2020 at 3:57 AM Diana Craciun OSS
wrote:
>
> On 5/22/2020 12:42 PM, Robin Murphy wrote:
> > On 2020-05-22 00:10, Rob Herring wrote:
> >> On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi
> >> wrote:
> >>>
> >>> From: Lauren
On Wed, May 27, 2020 at 9:43 AM Jim Quinlan wrote:
>
> Hi Nicolas,
>
> On Wed, May 27, 2020 at 11:00 AM Nicolas Saenz Julienne
> wrote:
> >
> > Hi Jim,
> > one thing comes to mind, there is a small test suite in
> > drivers/of/unittest.c
> > (specifically of_unittest_pci_dma_ranges()) you could
On Tue, May 26, 2020 at 03:12:39PM -0400, Jim Quinlan wrote:
> v2:
> Commit: "device core: Add ability to handle multiple dma offsets"
> o Added helper func attach_dma_pfn_offset_map() in address.c (Chistoph)
> o Helpers funcs added to __phys_to_dma() & __dma_to_phys() (Christoph)
> o Added w
On Sat, May 30, 2020 at 04:10:02PM +0800, Yong Wu wrote:
> From: Maoguang Meng
>
> Update binding document since the avc and vp8 hardware encoder in
> mt8173 are now separated. Separate "mediatek,mt8173-vcodec-enc" to
> "mediatek,mt8173-vcodec-vp8-enc" and "mediatek,mt8173-vcodec-avc-enc".
The h
On Tue, 09 Jun 2020 15:40:19 -0400, Jonathan Marek wrote:
> Add compatible strings for sm8150 and sm8250 iommus to documentation.
>
> Signed-off-by: Jonathan Marek
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
On Thu, 11 Jun 2020 20:10:29 +0900, Yoshihiro Shimoda wrote:
> Add support for r8a77961 (R-Car M3-W+).
>
> Signed-off-by: Yoshihiro Shimoda
> ---
> Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
so that they can be identified in the
> arm-smmu implementation specific code.
>
> Signed-off-by: Jordan Crouse
> ---
>
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rob Herring
_
-by: Will Deacon
One comment below, but for the DT parts:
Acked-by: Rob Herring
> ---
> arch/arm/include/asm/dma-mapping.h | 8
> drivers/of/platform.c | 31 +--
> include/linux/dma-mapping.h| 7 ++-
> 3 files changed,
; Signed-off-by: Will Deacon
Acked-by: Rob Herring
> ---
> arch/arm/include/asm/dma-mapping.h | 4 +++-
> drivers/of/platform.c | 21 ++---
> include/linux/dma-mapping.h| 8 +++-
> 3 files changed, 24 insertions(+), 9 deletions(-)
>
Adding Grant and Pantelis...
On Mon, Dec 1, 2014 at 10:57 AM, Will Deacon wrote:
> IOMMU drivers must be initialised before any of their upstream devices,
> otherwise the relevant iommu_ops won't be configured for the bus in
> question. To solve this, a number of IOMMU drivers use initcalls to
>
On Tue, Jan 6, 2015 at 2:16 PM, Mitchel Humpherys
wrote:
> On Tue, Jan 06 2015 at 06:15:07 AM, Will Deacon wrote:
>>> /* Invalidate the TLB, just in case */
>>> -writel_relaxed(0, gr0_base + ARM_SMMU_GR0_STLBIALL);
>>> writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH);
>>> wr
On Wed, Jan 7, 2015 at 12:49 PM, Murali Karicheri wrote:
> Function of_iommu_configure() is called from of_dma_configure() to
> setup iommu ops using DT property. This API is currently used for
> platform devices for which DMA configuration (including iommu ops)
> may come from device's parent. To
On Wed, Jan 7, 2015 at 12:49 PM, Murali Karicheri wrote:
> Move of_dma_configure() to device.c so that same function can be re-used
> for PCI devices to obtain DMA configuration from DT. Also add a second
> argument so that for PCI, DT node of root bus host bridge can be used to
> obtain the DMA c
+Andreas
On Wed, Jan 7, 2015 at 12:53 PM, Will Deacon wrote:
> On Wed, Jan 07, 2015 at 06:35:41PM +, Mitchel Humpherys wrote:
>> On Wed, Jan 07 2015 at 10:04:20 AM, Will Deacon wrote:
>> > On Wed, Jan 07, 2015 at 05:52:46PM +, Mitchel Humpherys wrote:
>> >> On Wed, Jan 07 2015 at 02:13:0
On Thu, Jan 8, 2015 at 4:24 PM, Arnd Bergmann wrote:
> On Thursday 08 January 2015 14:26:36 Murali Karicheri wrote:
>> On 01/08/2015 03:40 AM, Arnd Bergmann wrote:
>> > On Wednesday 07 January 2015 17:37:56 Rob Herring wrote:
>> >> On Wed, Jan 7, 2015 at 12:49 PM,
On Fri, Jan 23, 2015 at 12:19 PM, Murali Karicheri wrote:
> On 01/09/2015 10:34 AM, Rob Herring wrote:
>>
>> On Thu, Jan 8, 2015 at 4:24 PM, Arnd Bergmann wrote:
>>>
>>> On Thursday 08 January 2015 14:26:36 Murali Karicheri wrote:
>>>>
>
evice. Currently only dma-range is used for PCI and iommu is not
> supported. So return error if the device is PCI.
>
> Cc: Joerg Roedel
> Cc: Grant Likely
> Cc: Rob Herring
Acked-by: Rob Herring
> Cc: Will Deacon
> Cc: Russell King
> Cc: Arnd Bergmann
> Cc: S
> Cc: Joerg Roedel
> Cc: Grant Likely
> Cc: Rob Herring
> Cc: Bjorn Helgaas
> Cc: Will Deacon
> Cc: Russell King
> Cc: Arnd Bergmann
> Cc: Suravee Suthikulpanit
>
> Signed-off-by: Murali Karicheri
> ---
> drivers/of/device.c |9 -
> 1 file
implementing this.
>
> Cc: Joerg Roedel
> Cc: Grant Likely
> Cc: Rob Herring
Acked-by: Rob Herring
> Cc: Will Deacon
> Cc: Russell King
> Cc: Arnd Bergmann
> Cc: Suravee Suthikulpanit
>
> Acked-by: Bjorn Helgaas
> Signed-off-by: Murali Kari
DTS. So add a work around to
>> >> catch this and fix.
>> >>
>> >> Cc: Joerg Roedel
>> >> Cc: Grant Likely
>> >> Cc: Rob Herring
>> >> Cc: Bjorn Helgaas
>> >> Cc: Will Deacon
>> >> Cc: Russell King
On Wed, Jan 28, 2015 at 5:32 PM, Laurent Pinchart
wrote:
> Hi Will,
>
> On Wednesday 28 January 2015 13:32:19 Will Deacon wrote:
>> On Wed, Jan 28, 2015 at 01:15:10PM +, Laurent Pinchart wrote:
>> > On Wednesday 28 January 2015 12:29:42 Will Deacon wrote:
>> >> On Wed, Jan 28, 2015 at 12:23:03
n the DMA
> configuration for the slave PCI device.
>
> Tested-by: Suravee Suthikulpanit (AMD Seattle)
> Signed-off-by: Murali Karicheri
> Signed-off-by: Bjorn Helgaas
> Reviewed-by: Catalin Marinas
> Acked-by: Will Deacon
> CC: Joerg Roedel
> CC: Grant Likely
> CC: Rob
t;of_private.h"
>
> @@ -1195,6 +1196,12 @@ void __init early_init_dt_scan_nodes(void)
> of_scan_flat_dt(early_init_dt_scan_memory, NULL);
> }
>
> +void __init early_init_dt_get_dma_zone_size(void)
static
With that,
Reviewed-by: Rob Herring
> +{
> + if (of_fdt_
onst int __init of_fdt_machine_is_compatible(char *name)
No point in const return (though name could possibly be const), and
the return could be bool instead.
With that,
Reviewed-by: Rob Herring
> +{
> + unsigned long dt_root = of_get_flat_dt_r
.txt | 7 +++
> 1 file changed, 7 insertions(+)
>
Reviewed-by: Rob Herring
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a given device. These
> regions will be used to create 1:1 mappings in the IOMMU domain that
> the devices will be attached to.
>
> Cc: Rob Herring
> Cc: Frank Rowand
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Thierry Reding
&g
| 1 +
> drivers/pci/pci.c | 1 +
> drivers/pci/probe.c | 1 +
> include/linux/of_pci.h| 4 +---
> 6 files changed, 7 insertions(+), 3 deletions(-)
>
Acked-by: Rob Herring
__
On Sat, Aug 24, 2019 at 03:28:46PM +0200, Uwe Kleine-König wrote:
> Referencing device tree nodes from a property allows to pass arguments.
> This is for example used for referencing gpios. This looks as follows:
>
> gpio_ctrl: gpio-controller {
> #gpio-cells = <2>
>
| 1 +
> include/linux/of_pci.h| 5 ++---
> 9 files changed, 11 insertions(+), 3 deletions(-)
Reviewed-by: Rob Herring
On Sat, 24 Aug 2019 15:28:46 +0200, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?=
wrote:
> Referencing device tree nodes from a property allows to pass arguments.
> This is for example used for referencing gpios. This looks as follows:
>
> gpio_ctrl: gpio-controller {
> #gpio-c
Convert the Arm SMMv3 binding to the DT schema format.
Cc: Joerg Roedel
Cc: Mark Rutland
Cc: Will Deacon
Cc: Robin Murphy
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/iommu/arm,smmu-v3.txt | 77 -
.../bindings/iommu/arm,smmu-v3
binding. This issue remains.
Cc: Joerg Roedel
Cc: Mark Rutland
Cc: Will Deacon
Cc: Robin Murphy
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/iommu/arm,smmu.txt| 182 --
.../devicetree/bindings/iommu/arm,smmu.yaml | 229 +++
On Fri, Sep 20, 2019 at 9:17 AM Robin Murphy wrote:
>
> On 20/09/2019 14:48, Rob Herring wrote:
> > Convert the Arm SMMv3 binding to the DT schema format.
> >
> > Cc: Joerg Roedel
> > Cc: Mark Rutland
> > Cc: Will Deacon
> > Cc: Robin Murphy
> >
m.c | 53 +-----
> 1 file changed, 40 insertions(+), 13 deletions(-)
Reviewed-by: Rob Herring
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ted-by: Neil Armstrong
> Reviewed-by: Steven Price
> Signed-off-by: Robin Murphy
> ---
> drivers/iommu/io-pgtable-arm.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
Reviewed-by: Rob Herring
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in Murphy
> ---
> drivers/iommu/io-pgtable-arm.c | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Rob Herring
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On Tue, 24 Sep 2019 08:40:54 +0100, Biju Das wrote:
> Document RZ/G2N (R8A774B1) SoC bindings.
>
> Signed-off-by: Biju Das
> ---
> Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring
Convert the Arm SMMv3 binding to the DT schema format.
Cc: Joerg Roedel
Cc: Mark Rutland
Cc: Will Deacon
Cc: Robin Murphy
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Rob Herring
---
v2:
- Refine interrupt definition based on Robin's comments
.../devicetree/bindings/iommu/arm
On Tue, Oct 22, 2019 at 11:54 AM Robin Murphy wrote:
>
> On 14/10/2019 20:12, Rob Herring wrote:
> > Convert the Arm SMMv3 binding to the DT schema format.
> >
> > Cc: Joerg Roedel
> > Cc: Mark Rutland
> > Cc: Will Deacon
> > Cc: Robin Murphy
On Wed, Oct 30, 2019 at 02:51:12PM +, Will Deacon wrote:
> By conditionally dropping support for the legacy binding and exporting
> the newly introduced 'arm_smmu_impl_init()' function we can allow the
> ARM SMMU driver to be built as a module.
>
> Signed-off-by: Will Deacon
> ---
> drivers/
On Fri, Nov 1, 2019 at 12:08 PM Will Deacon wrote:
>
> Hi Rob,
>
> On Mon, Oct 14, 2019 at 02:12:56PM -0500, Rob Herring wrote:
> > Convert the Arm SMMv3 binding to the DT schema format.
> >
> > Cc: Joerg Roedel
> > Cc: Mark Rutland
> > Cc: Will D
> Signed-off-by: Chao Hao
> ---
> .../bindings/iommu/mediatek,iommu.txt | 2 +
> include/dt-bindings/memory/mt6779-larb-port.h | 217 ++
> 2 files changed, 219 insertions(+)
> create mode 100644 include/dt-bindings/memory/mt6779-larb-port.h
>
R
I devices can be deferred until after the IOMMU is
> available.
>
> Cc: Greg Kroah-Hartman
> Cc: Rob Herring
> Cc: Saravana Kannan
> Cc: Robin Murphy
> Signed-off-by: Will Deacon
> ---
>
> Applies against driver-core/driver-core-next.
> Tested on AMD Seattle
On Fri, Nov 22, 2019 at 8:55 AM Will Deacon wrote:
>
> [+Ard]
>
> Hi Rob,
>
> On Fri, Nov 22, 2019 at 08:47:46AM -0600, Rob Herring wrote:
> > On Wed, Nov 20, 2019 at 1:00 PM Will Deacon wrote:
> > >
> > > Commit 8e12257dead7 ("of: property: Add d
On Fri, Nov 22, 2019 at 10:13 AM Ard Biesheuvel
wrote:
>
> On Fri, 22 Nov 2019 at 17:01, Rob Herring wrote:
> >
> > On Fri, Nov 22, 2019 at 8:55 AM Will Deacon wrote:
> > >
> > > [+Ard]
> > >
> > > Hi Rob,
> > >
> > > On
drivers/acpi/arm64/iort.c| 2 +-
> drivers/net/ethernet/mellanox/mlx4/en_clock.c| 3 ++-
> drivers/of/device.c | 3 ++-
In any case,
Acked-by: Rob Herring
> drivers/pci/controller/cadence/pcie-cadence-ep.c | 3 ++-
> drivers/pci/con
mmu/arm,smmu.yaml | 6 ++
> 1 file changed, 6 insertions(+)
Reviewed-by: Rob Herring
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On Sun, 5 Jan 2020 18:45:05 +0800, Chao Hao wrote:
> This patch adds description for MT6779 IOMMU.
>
> MT6779 has two iommus, they are MM_IOMMU and APU_IOMMU which
> use ARM Short-Descriptor translation format.
>
> The MT6779 IOMMU hardware diagram is as below, it is only a brief
> diagram about
On Fri, 3 Jan 2020 17:26:31 +0100, Fabien Parent wrote:
> This commit adds IOMMU binding documentation for the MT8167 SoC.
>
> Signed-off-by: Fabien Parent
> ---
> Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | 1 +
> 1 file changed, 1 insertion(+)
>
power of 2 multiple we can use and then adjust the granule to
32x that size.
Cc: Eric Auger
Cc: Jean-Philippe Brucker
Cc: Will Deacon
Cc: Robin Murphy
Cc: Joerg Roedel
Signed-off-by: Rob Herring
---
drivers/iommu/arm-smmu-v3.c | 53 +
1 file changed, 53
Joerg Roedel
Signed-off-by: Rob Herring
---
drivers/iommu/arm-smmu-v3.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index effe72eb89e7..e91b4a098215 100644
--- a/drivers/iommu/arm-smmu-v3.c
On Wed, Jan 15, 2020 at 3:21 AM Auger Eric wrote:
>
> Hi Rob,
>
> On 1/13/20 3:39 PM, Rob Herring wrote:
> > Arm SMMUv3.2 adds support for TLB range invalidate operations.
> > Support for range invalidate is determined by the RIL bit in the IDR3
> > register.
>
On Wed, Jan 15, 2020 at 10:33 AM Auger Eric wrote:
>
> Hi Rob,
>
> On 1/15/20 3:02 PM, Rob Herring wrote:
> > On Wed, Jan 15, 2020 at 3:21 AM Auger Eric wrote:
> >>
> >> Hi Rob,
> >>
> >> On 1/13/20 3:39 PM, Rob Herring wrote:
> >>
On Thu, Jan 16, 2020 at 3:23 PM Auger Eric wrote:
>
> Hi Rob,
>
> On 1/16/20 5:57 PM, Rob Herring wrote:
> > On Wed, Jan 15, 2020 at 10:33 AM Auger Eric wrote:
> >>
> >> Hi Rob,
> >>
> >> On 1/15/20 3:02 PM, Rob Herring wrote:
&
: Rob Herring
---
drivers/iommu/arm-smmu-v3.c | 66 -
1 file changed, 65 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index e91b4a098215..0ee561db7149 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers
n50i-h6-iommu.yaml | 61
> +
> 1 file changed, 61 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml
>
Reviewed-by: Rob Herring
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On Thu, Feb 13, 2020 at 10:52 AM Jean-Philippe Brucker
wrote:
>
> Copy the ats-supported flag into the pci_host_bridge structure.
>
> Signed-off-by: Jean-Philippe Brucker
> ---
> drivers/pci/controller/pci-host-common.c | 1 +
> drivers/pci/of.c | 9 +
> include/l
On Thu, Jan 30, 2020 at 9:06 AM Auger Eric wrote:
>
> Hi Rob,
> On 1/17/20 10:16 PM, Rob Herring wrote:
> > Arm SMMUv3.2 adds support for TLB range invalidate operations.
> > Support for range invalidate is determined by the RIL bit in the IDR3
> > register.
> &g
n
simplify it and avoid passing in struct arm_smmu_cmdq_ent.
Cc: Jean-Philippe Brucker
Cc: Will Deacon
Cc: Robin Murphy
Cc: Joerg Roedel
Signed-off-by: Rob Herring
---
v2:
- Simplify arm_smmu_atc_inv_master()
- Rebase on v5.6-rc1
drivers/iommu/arm-smmu-v3.c | 38 ---
On Thu, Jan 30, 2020 at 11:34 AM Robin Murphy wrote:
>
> On 30/01/2020 3:06 pm, Auger Eric wrote:
> > Hi Rob,
> > On 1/17/20 10:16 PM, Rob Herring wrote:
> >> Arm SMMUv3.2 adds support for TLB range invalidate operations.
> >> Support for range invalidate is d
On Wed, Mar 16, 2016 at 11:42 AM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Getting the arguments of phandles is somewhat limited at the
> moement, because the number of arguments supported by core
> code is limited to MAX_PHANDLE_ARGS, which is set to 16
> currently.
>
> In case of the arm sm
-...@vger.kernel.org;
> >> ulf.hans...@linaro.org; Zhao Qiang; Russell King; Bhupesh Sharma; Joerg
> >> Roedel; Santosh Shilimkar; Scott Wood; Rob Herring; Claudiu Manoil; Kumar
> >> Gala; Yang-Leo Li; Xiaobo Xie
> >> Subject: Re: [v6, 5/5] mmc: sdhci-of-
On Thu, Mar 17, 2016 at 12:11 PM, Arnd Bergmann wrote:
> On Thursday 17 March 2016 12:06:40 Rob Herring wrote:
>> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
>> > b/Documentation/devicetree/bindings/soc/fsl/guts.txt
>> > similar
On Wed, Mar 09, 2016 at 06:08:49PM +0800, Yangbo Lu wrote:
> Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
> since it's used by not only PowerPC but also ARM. And add a specification
> for 'little-endian' property.
>
> Signed-off-by: Yangbo Lu
> ---
> Changes for v2:
>
On Tue, Mar 22, 2016 at 12:58 PM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Remove the usage of of_parse_phandle_with_args() and replace
> it by the phandle-iterator implementation so that we can
> parse out all of the potentially present 128 stream-ids.
>
> Signed-off-by: Joerg Roedel
> ---
On Tue, Mar 22, 2016 at 12:58 PM, Joerg Roedel wrote:
> Hi,
>
> here is an implementation of the iterator over phandles
> concept which Rob Herring suggested to me some time ago. My
> approach is a little bit different from what the diff showed
> back then, but it gets rid of
On Wed, Mar 23, 2016 at 6:54 AM, Joerg Roedel wrote:
> Hi Rob,
>
> On Tue, Mar 22, 2016 at 01:45:41PM -0500, Rob Herring wrote:
>> On Tue, Mar 22, 2016 at 12:58 PM, Joerg Roedel wrote:
>> > Please review. Patches are based on v4.5.
>>
>> Other than my one com
None
> ---
> Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt | 3 +++
> 1 file changed, 3 insertions(+)
> rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)
Acked-by: Rob Herring
___
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On Wed, Apr 06, 2016 at 07:59:31PM +0530, Sricharan R wrote:
> The driver currently works based on platform data. Remove this
> and add support for DT. A single master can have multiple ports
> connected to more than one iommu.
>
> master
> |
>
On Mon, Apr 4, 2016 at 10:49 AM, Joerg Roedel wrote:
> Hi,
>
> here is a new version of the implementation of the iterator
> over phandles concept which Rob Herring suggested to me some
> time ago. My approach is a little bit different from what
> the diff showed back then, but
On Mon, May 02, 2016 at 12:24:30AM +0530, Sricharan R wrote:
> The MSM IOMMU is an implementation compatible with the ARM VMSA short
> descriptor page tables. It provides address translation for bus masters
> outside
> of the CPU, each connected to the IOMMU through a port called micro-TLB.
> Addi
v8:
> - Added this patch
> Changes for v9:
> - Added a list for the possible compatibles
> Changes for v10:
> - None
> ---
> Documentation/devicetree/bindings/arm/fsl.txt | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
Acked-by: Rob Herring
_
On Mon, May 09, 2016 at 04:00:12PM +0800, honghui.zh...@mediatek.com wrote:
> From: Honghui Zhang
>
> This patch defines the local arbitor port IDs for mediatek SoC MT2701 and
> add descriptions of binding for mediatek generation one iommu and smi.
>
> Signed-off-by: Honghui Zhang
> ---
> .../
On Mon, May 16, 2016 at 12:18:56PM +0530, Sricharan R wrote:
> The MSM IOMMU is an implementation compatible with the ARM VMSA short
> descriptor page tables. It provides address translation for bus masters
> outside
> of the CPU, each connected to the IOMMU through a port called micro-TLB.
> Addi
> 4 files changed, 115 insertions(+), 8 deletions(-)
> create mode 100644 include/dt-bindings/memory/mt2701-larb-port.h
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ed micro-TLB.
> Adding the DT bindings for the same.
>
> Signed-off-by: Sricharan R
> ---
> .../devicetree/bindings/iommu/msm,iommu-v0.txt | 64
> ++
> 1 file changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iommu/msm
g routine up yet another layer into the general OF-PCI code,
> and further generalise it for either kind of lookup in either flavour
> of map property.
>
> CC: Rob Herring
> CC: Frank Rowand
> CC: Marc Zyngier
> Signed-off-by: Robin Murphy
> ---
>
> v2: No
g routine up yet another layer into the general OF-PCI code,
> and further generalise it for either kind of lookup in either flavour
> of map property.
>
> CC: Rob Herring
> CC: Frank Rowand
> Acked-by: Marc Zyngier
> Signed-off-by: Robin Murphy
I've only skimmed th
On Mon, Jul 25, 2016 at 10:09 AM, Robin Murphy wrote:
> Hi Lorenzo,
>
> On 20/07/16 12:23, Lorenzo Pieralisi wrote:
>> The iommu_fwspec structure, used to hold per device iommu configuration
>> data is not OF specific and therefore can be moved to a generic
>> and OF independent compilation unit.
On Tue, Aug 23, 2016 at 08:05:27PM +0100, Robin Murphy wrote:
> Document how the generic "iommus" binding should be used to describe ARM
> SMMU stream IDs instead of the old "mmu-masters" binding.
>
> CC: Rob Herring
> CC: Mark Rutland
> Signed-off-by:
On Mon, Sep 12, 2016 at 05:13:43PM +0100, Robin Murphy wrote:
> We're about to ratify our use of the generic binding, so document it.
>
> CC: Rob Herring
> CC: Mark Rutland
> Signed-off-by: Robin Murphy
>
> ---
>
> - Reference PCI "iommu-map" b
since V1:
> - Added Acked-by from Laurent - thanks!
>
> Now broken out, however earlier V1 posted as part of:
> [PATCH 0/3] iommu/ipmmu-vmsa: Initial r8a7796 support
>
> Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt |1 +
> 1
4 files changed, 102 insertions(+), 6 deletions(-)
> create mode 100644 include/dt-bindings/memory/mt2712-larb-port.h
Acked-by: Rob Herring
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ed, SW can NOT adjust it.
>
> Signed-off-by: Yong Wu
> ---
> Hi Rob,
> Comparing with the v1, I add larb8 and larb9 in this version.
> So I don't add your ACK here.
Thanks for the explanation. That's minor enough you could have kept it.
Acked-by: Rob Herring
On Tue, Sep 12, 2017 at 05:31:07PM +0530, Vivek Gautam wrote:
> ARM MMU-500 implements a TBU (uTLB) for each connected master
> besides a single TCU which controls and manages the address
> translations. Each of these TBUs can either be in the same
> power domain as the master, or they can have a i
On Thu, Sep 14, 2017 at 01:57:52PM +0100, Shameer Kolothum wrote:
> From: John Garry
>
> The HiSilicon erratum 161010801 describes the limitation of HiSilicon
> platforms
> hip06/hip07 to support the SMMU mappings for MSI transactions.
>
> On these platforms, GICv3 ITS translator is presented w
; Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt |1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring
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; Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt |1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring
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by: John Garry
> [Shameer: Modified to use compatible string for errata]
> Signed-off-by: Shameer Kolothum
> ---
> Documentation/arm64/silicon-errata.txt | 1 +
> Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 9 ++++++++-
>
On Wed, Oct 04, 2017 at 02:33:08PM +0200, Geert Uytterhoeven wrote:
> Use the preferred generic node name in the example.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied.
On Fri, Oct 06, 2017 at 02:31:39PM +0100, Jean-Philippe Brucker wrote:
> On ARM systems, some platform devices behind an IOMMU may support stall
> and PASID features. Stall is the ability to recover from page faults and
> PASID offers multiple process address spaces to the device. Together they
> a
On Mon, Oct 16, 2017 at 5:23 AM, Jean-Philippe Brucker
wrote:
> On 13/10/17 20:10, Rob Herring wrote:
>> On Fri, Oct 06, 2017 at 02:31:39PM +0100, Jean-Philippe Brucker wrote:
>>> On ARM systems, some platform devices behind an IOMMU may support stall
>>> and PASID fea
On Tue, Jan 09, 2018 at 03:31:48PM +0530, Vivek Gautam wrote:
> qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> clock and power requirements. This smmu core is used with
> multiple masters on msm8996, viz. mdss, video, etc.
> Add bindings for the same.
>
> Signed-off-by: Vivek Gautam
gned-off-by: Vivek Gautam
> ---
> .../devicetree/bindings/iommu/arm,smmu.txt | 43
> ++
> drivers/iommu/arm-smmu.c | 13 +++
> 2 files changed, 56 insertions(+)
Reviewed-by: Rob Herring
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On Wed, Jan 24, 2018 at 06:35:11PM +0800, Jeffy Chen wrote:
> From: Tomasz Figa
>
> Current code relies on master driver enabling necessary clocks before
> IOMMU is accessed, however there are cases when the IOMMU should be
> accessed while the master is not running yet, for example allocating
>
On Wed, Jan 31, 2018 at 1:52 AM, Tomasz Figa wrote:
> Hi Rob,
>
> On Wed, Jan 31, 2018 at 2:05 AM, Rob Herring wrote:
>> On Wed, Jan 24, 2018 at 06:35:11PM +0800, Jeffy Chen wrote:
>>> From: Tomasz Figa
>>>
>>> Current code relies on master driver ena
pasid-bits: Some masters support multiple address spaces for DMA, by
> + tagging DMA transactions with an address space identifier. By default,
> + this is 0, which means that the device only has one address space.
So 3 would mean 8 address spaces?
Maybe pasid-num-bits would be a bi
changed, 1 insertion(+)
Reviewed-by: Rob Herring
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