lity. Also remove adjacent error prints for
these soft failures, to prevent a kernel log spam, since -EMEDIUMTYPE is
clear enough to indicate an incompatability error.
Add kdocs describing this behavior.
Suggested-by: Jason Gunthorpe
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
dri
;t see an usage requiring such optimization as the only device
which imposes such non-coherency is Intel GPU which even doesn't
support hotplug/hot remove.
Signed-off-by: Jason Gunthorpe
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 4 +---
1 file change
-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 321 +---
1 file changed, 174 insertions(+), 147 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index b9ccb3cfac5d..3ffa4e2d9d18 100644
--- a/drivers/vfio
Gunthorpe
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 11be5f95580b..b9ccb3cfac5d 10
-967750ddf...@arm.com/
So remove the check in VFIO for simplicity.
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 32 +++-
1 file changed, 11 insertions(+), 21 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_t
On Fri, Jun 24, 2022 at 09:35:49AM +0800, Baolu Lu wrote:
> External email: Use caution opening links or attachments
>
>
> On 2022/6/24 04:00, Nicolin Chen wrote:
> > diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c
> > index e1cb51b9866c..5386d
On Fri, Jun 24, 2022 at 01:38:58PM +0800, Yong Wu wrote:
> > > > diff --git a/drivers/iommu/mtk_iommu_v1.c
> > > > b/drivers/iommu/mtk_iommu_v1.c
> > > > index e1cb51b9866c..5386d889429d 100644
> > > > --- a/drivers/iommu/mtk_iommu_v1.c
> > > > +++ b/drivers/iommu/mtk_iommu_v1.c
> > > > @@ -304,7
On Fri, Jun 24, 2022 at 03:19:43PM -0300, Jason Gunthorpe wrote:
> On Fri, Jun 24, 2022 at 06:35:49PM +0800, Yong Wu wrote:
>
> > > > It's not used in VFIO context. "return 0" just satisfy the iommu
> > > > framework to go ahead. and yes, here we only allow the shared
> > > > "mapping-domain" (All
On Thu, Jun 30, 2022 at 05:33:16PM +0800, Yong Wu wrote:
> External email: Use caution opening links or attachments
>
>
> On Wed, 2022-06-29 at 12:47 -0700, Nicolin Chen wrote:
> > On Fri, Jun 24, 2022 at 03:19:43PM -0300, Jason Gunthorpe wrote:
> > > On Fri, Jun 2
On Thu, Jun 30, 2022 at 09:21:42AM +0100, Robin Murphy wrote:
> External email: Use caution opening links or attachments
>
>
> On 2022-06-29 20:47, Nicolin Chen wrote:
> > On Fri, Jun 24, 2022 at 03:19:43PM -0300, Jason Gunthorpe wrote:
> > > On Fri, Jun 24, 2022 a
"num_non_pinned_groups++" in PATCH-5 to the common path between
domain-reusing and new-domain pathways, like the code previously did.
* Fixed a typo in EMEDIUMTYPE patch.
v1: https://lore.kernel.org/kvm/20220606061927.26049-1-nicol...@nvidia.com/
Jason Gunthorpe (1):
vfio/iommu_t
lity. Also remove adjacent error prints for
these soft failures, to prevent a kernel log spam, since -EMEDIUMTYPE is
clear enough to indicate an incompatability error.
Add kdocs describing this behavior.
Suggested-by: Jason Gunthorpe
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
dri
;t see an usage requiring such optimization as the only device
which imposes such non-coherency is Intel GPU which even doesn't
support hotplug/hot remove.
Signed-off-by: Jason Gunthorpe
Reviewed-by: Kevin Tian
Reviewed-by: Lu Baolu
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type
-967750ddf...@arm.com/
So remove the check in VFIO for simplicity.
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 32 +++-
1 file changed, 11 insertions(+), 21 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_t
: Jason Gunthorpe
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 321 +---
1 file changed, 174 insertions(+), 147 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index b9ccb3cfac5d..3ffa4e2d9d18 100644
--- a
Gunthorpe
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 11be5f95580b..b9ccb3cfac5d 10
On Fri, Jul 01, 2022 at 11:21:48AM +0100, Robin Murphy wrote:
> > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c
> > b/drivers/iommu/arm/arm-smmu/arm-smmu.c
> > index 2ed3594f384e..072cac5ab5a4 100644
> > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
> > +++ b/drivers/iommu/arm/arm-smmu/arm-smm
On Fri, Jul 01, 2022 at 07:17:38PM +0100, Robin Murphy wrote:
> External email: Use caution opening links or attachments
>
>
> On 01/07/2022 5:43 pm, Nicolin Chen wrote:
> > On Fri, Jul 01, 2022 at 11:21:48AM +0100, Robin Murphy wrote:
> >
> > > > diff --
main pathways, like the code previously did.
* Fixed a typo in EMEDIUMTYPE patch.
v1: https://lore.kernel.org/kvm/20220606061927.26049-1-nicol...@nvidia.com/
Jason Gunthorpe (1):
vfio/iommu_type1: Prefer to reuse domains vs match enforced cache
coherency
Nicolin Chen (4):
iommu: Return
;t see an usage requiring such optimization as the only device
which imposes such non-coherency is Intel GPU which even doesn't
support hotplug/hot remove.
Signed-off-by: Jason Gunthorpe
Reviewed-by: Kevin Tian
Reviewed-by: Lu Baolu
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type
lity. Also remove adjacent error prints for
these soft failures, to prevent a kernel log spam, since -EMEDIUMTYPE is
clear enough to indicate an incompatability error.
Add kdocs describing this behavior.
Suggested-by: Jason Gunthorpe
Reviewed-by: Kevin Tian
Reviewed-by: Lu Baolu
Signed-off-by: Ni
-967750ddf...@arm.com/
So remove the check in VFIO for simplicity.
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 32 +++-
1 file changed, 11 insertions(+), 21 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_t
Gunthorpe
Reviewed-by: Kevin Tian
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 5992ee2345a0..5624bbf02ab7 10
: Jason Gunthorpe
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 333 +---
1 file changed, 180 insertions(+), 153 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 5624bbf02ab7..d3a4cedcd082 100644
--- a
From: Nicolin Chen
The SMMUv3 devices implemented in the Grace SoC support NVIDIA's custom
CMDQ-Virtualization (CMDQV) hardware. Like the new ECMDQ feature first
introduced in the ARM SMMUv3.3 specification, CMDQV adds multiple VCMDQ
interfaces to supplement the single architected SMMU_CM
w the "implementation infrastructure" design from the
arm-smmu driver, and add support for implementation defined
issue_cmdlist methods.
Signed-off-by: Nate Watterson
Signed-off-by: Nicolin Chen
---
MAINTAINERS | 2 +
drivers/iommu/arm/arm-smmu-v3/Makefi
From: Nate Watterson
Copy the arm-smmu driver's infrastructure for handling implementation
specific details outside the flow of architectural code.
Signed-off-by: Nate Watterson
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/Makefile | 2 +-
drivers/iommu/ar
time TLBs of the same VM.
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio.c | 13 +
include/uapi/linux/vfio.h | 26 ++
2 files changed, 39 insertions(+)
diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c
index 3c034fe14ccb..c17b25c127a2 100644
astructure
iommu/arm-smmu-v3: Add support for NVIDIA CMDQ-Virtualization hw
iommu/nvidia-smmu-v3: Add mdev interface support
Nicolin Chen (10):
iommu: Add set_nesting_vmid/get_nesting_vmid functions
vfio: add VFIO_IOMMU_GET_VMID and VFIO_IOMMU_SET_VMID
vfio: Document VMID control f
Now we have a pair of ->set_vmid() and ->get_vmid() function
pointers. This patch implements them, to exchange VMID value
between vfio container and vfio_iommu_type1.
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 25 +
1 file changed, 25 inse
to allow VFIO core
to get access of the VMID value in an IOMMU driver.
Signed-off-by: Nicolin Chen
---
drivers/iommu/iommu.c | 20
include/linux/iommu.h | 5 +
2 files changed, 25 insertions(+)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 3303d707bab4
We are adding NVIDIA implementation that will need a ->detach_dev()
callback along with the dev pointer to grab client information.
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/io
A VMID is generated in an IOMMU driver, being called from this
->attach_group() callback. So call ->get_vmid() right after it
creates a new VMID, and call ->set_vmid() before it, to let it
reuse the same VMID.
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio.c | 12
incl
ed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 65 +++--
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 +
2 files changed, 60 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v
The VFIO API was enhanced to support VMID control with two
new iotcls to set and get VMID between the kernel and the
virtual machine hypervisor. So updating the document.
Signed-off-by: Nicolin Chen
---
Documentation/driver-api/vfio.rst | 34 +++
1 file changed, 34
devices' iommu domains
calling newly added arm_smmu_set/get_nesting_vmid() functions.
This patch adds a pair of helpers to allocate and free VMID in
the bitmap.
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 ++
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
mdev ioctl interface to pass the VMID to the CMDQV
device model, then to the SMMUv3 device model, so that hypervisor
can set the same VMID to all IOMMU domains of passthrough devices
using the previous pathway via VFIO core back to SMMUv3 driver.
Signed-off-by: Nate Watterson
Sig
after it creates a VMID and add iommu_set_nesting_vmid before
it to let IOMMU driver reuse it.
Signed-off-by: Nicolin Chen
---
drivers/vfio/vfio_iommu_type1.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index
From: Nate Watterson
Follow arm-smmu driver's infrastructure for handling implementation
specific details outside the flow of architectural code.
Signed-off-by: Nate Watterson
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/Makefile | 2 +-
drivers/iommu/arm/arm
() every time.
This also helps NVIDIA implementation, which maintains its own cmdq
pointers and needs to redirect the cmdq pointer from arm_smmu->cmdq
pointer to its own, upon scanning the illegal commands by checking
the opcode of the cmdlist.
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-s
ver also.
Note that, for the current plan, the CMDQV driver only supports
ACPI configuration.
Signed-off-by: Nate Watterson
Signed-off-by: Nicolin Chen
---
MAINTAINERS | 2 +
drivers/iommu/arm/arm-smmu-v3/Makefile| 2 +-
.../iommu/arm/arm-smmu
Hi Kevin,
On Thu, Sep 02, 2021 at 10:27:06PM +, Tian, Kevin wrote:
> > Indeed, this looks like a flavour of the accelerated invalidation
> > stuff we've talked about already.
> >
> > I would see it probably exposed as some HW specific IOCTL on the iommu
> > fd to get access to the accelerated
The CMDQV extension in NVIDIA Grace SoC only supports CS_NONE in the
CS field of CMD_SYNC. So this patch adds a quirk flag to accommodate
that.
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 7 ++-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 4
2 files
From: Nicolin Chen
NVIDIA's Grace SoC has a CMDQ-Virtualization (CMDQV) hardware that
extends standard ARM SMMUv3 to support multiple command queues with
virtualization capabilities. Though this is similar to the ECMDQ in
SMMUv3.3, CMDQV provides additional V-Interfaces that allow VMs to
est kernel.
So instead of using the existing regval, this patch reads out the
register value explicitly to cache in vintf->cfg.
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 ++--
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 5 +--
.../arm/arm-smmu-v3/nvi
The CMDQV extension in NVIDIA Grace SoC resues the arm_smmu_cmdq
structure while the queue location isn't same as smmu->cmdq. So,
this patch adds a cmdq argument to arm_smmu_cmdq_init() function
and shares its define in the header for CMDQV driver to use.
Signed-off-by: Nicolin Chen
---
() every time.
This also helps CMDQV extension in NVIDIA Grace SoC, whose driver'd
maintain its own cmdq pointers and needs to redirect arm_smmu->cmdq
to that upon seeing a supported command by checking its opcode.
Signed-off-by: Nicolin Chen
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v
at for the current plan the CMDQV driver only supports
ACPI configuration.
Signed-off-by: Nate Watterson
Signed-off-by: Nicolin Chen
---
Changelog:
v2->v3:
* Replaced impl design with simpler "nvidia_grace_cmdqv" pointer
* Aligned all the namings to "nvidia_grace_cmdqv" or
nd" function.
Note that we already have "swgroup" being used for an unsigned
int type variable that is inside struct tegra_smmu_swgroup, so
it's not able to use "swgroup" but only something like "swgrp".
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-sm
This patch changes in struct tegra_smmu_group to use swgrp
pointer instead of swgroup, as a preparational change for
the "mappings" debugfs feature.
Acked-by: Thierry Reding
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-smmu.c | 12
1 file changed, 8 insert
p" as a cleanup.
Acked-by: Thierry Reding
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-smmu.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index c5fa8b8673b6..f874ee2600e5 100644
--- a/driver
92 ] | 0x7 | 0x0001025ea000 | 0xfffc
| 0x21000
}
}
Total PDEs: 1, total PTEs: 52
Note that the example above was output after I locally enabled
IOMMU_DOMAIN_DMA, which is not merged to mainline yet due to a
known framebuffer issue.
Signed-off-by: Nicolin Chen
---
drivers/i
The existing function tegra_smmu_find_group really finds group->soc
pointer, so naming it "find_group" might not be clear by looking at
it alone. This patch renames it to tegra_smmu_group_soc in order to
disambiguate the use of "group" in this driver.
Signed-off-by: Nic
tions together.
Acked-by: Thierry Reding
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-smmu.c | 94 +++---
1 file changed, 78 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index b0a04cc8f560..1fbb93215463 1
0932.GB29926@Asurada-Nvidia/T/
* Expanded mutex range to the entire function
* Added as->lock to protect pagetable walkthrough
* Replaced devm_kzalloc with devm_kcalloc for group_debug
* Added "PTE RANGE" and "SIZE" columns to group contiguous mappings
* Dropped as->count
On Wed, Dec 08, 2021 at 07:09:37PM +0300, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 08.12.2021 11:47, Nicolin Chen пишет:
> > static void tegra_smmu_attach_as(struct tegra_smmu *smmu,
> >
tions together.
Acked-by: Thierry Reding
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-smmu.c | 96 +++---
1 file changed, 80 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index 532c843eb631..454504aa6602 1
E RANGE" and "SIZE" columns to group contiguous mappings
* Dropped as->count check
* Added WARN_ON when as->count mismatches pd[pd_index]
v1: https://lkml.org/lkml/2020/9/26/70
Nicolin Chen (6):
iommu/tegra-smmu: Rename struct iommu_group *group to *grp
iommu/tegra-smmu: Ren
The existing function tegra_smmu_find_group really finds group->soc
pointer, so naming it "find_group" might not be clear by looking at
it alone. This patch renames it to tegra_smmu_group_soc in order to
disambiguate the use of "group" in this driver.
Signed-off-by: Nic
nd" function.
Note that we already have "swgroup" being used for an unsigned
int type variable that is inside struct tegra_smmu_swgroup, so
it's not able to use "swgroup" but only something like "swgrp".
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-sm
p" as a cleanup.
Acked-by: Thierry Reding
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-smmu.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index 8e906504882d..fd9ef08cb7d9 100644
--- a/driver
total PTEs: 52
Note that the example above was output after I locally enabled
IOMMU_DOMAIN_DMA, which is not merged to mainline yet due to a
known framebuffer issue.
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-smmu.c | 185 +
1 file changed, 185
This patch changes in struct tegra_smmu_group to use swgrp
pointer instead of swgroup, as a preparational change for
the "mappings" debugfs feature.
Acked-by: Thierry Reding
Signed-off-by: Nicolin Chen
---
drivers/iommu/tegra-smmu.c | 12
1 file changed, 8 insert
On Thu, Dec 09, 2021 at 05:49:09PM +0300, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 09.12.2021 10:38, Nicolin Chen пишет:
> > +static unsigned long pd_pt_index_iova(unsigned int pd_index, unsigned int
> > pt_index)
> >
On Thu, Dec 09, 2021 at 05:47:18PM +0300, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 09.12.2021 10:38, Nicolin Chen пишет:
> > @@ -545,6 +719,15 @@ static void tegra_smmu_detach_as(struct tegra_smmu
> > *smmu,
> >
On Thu, Dec 09, 2021 at 10:40:42PM +0300, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 09.12.2021 22:32, Nicolin Chen пишет:
> > On Thu, Dec 09, 2021 at 05:47:18PM +0300, Dmitry Osipenko wrote:
> >> External email: U
On Thu, Dec 09, 2021 at 10:44:25PM +0300, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 09.12.2021 22:24, Nicolin Chen пишет:
> > On Thu, Dec 09, 2021 at 05:49:09PM +0300, Dmitry Osipenko wrote:
> >> External email: U
On Thu, Dec 09, 2021 at 10:58:32PM +0300, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 09.12.2021 22:54, Nicolin Chen пишет:
> > On Thu, Dec 09, 2021 at 10:44:25PM +0300, Dmitry Osipenko wrote:
> >> External email: U
On Thu, Dec 09, 2021 at 10:58:15PM +0300, Dmitry Osipenko wrote:
> External email: Use caution opening links or attachments
>
>
> 09.12.2021 22:51, Nicolin Chen пишет:
> > On Thu, Dec 09, 2021 at 10:40:42PM +0300, Dmitry Osipenko wrote:
> >> External email: U
Hi Robin,
Thank you for the reply!
On Mon, Dec 20, 2021 at 06:42:26PM +, Robin Murphy wrote:
> On 2021-11-19 07:19, Nicolin Chen wrote:
> > From: Nate Watterson
> >
> > NVIDIA's Grace Soc has a CMDQ-Virtualization (CMDQV) hardware,
> > which extends the st
On Tue, Dec 21, 2021 at 06:55:20PM +, Robin Murphy wrote:
> External email: Use caution opening links or attachments
>
>
> On 2021-12-20 19:27, Nicolin Chen wrote:
> > Hi Robin,
> >
> > Thank you for the reply!
> >
> > On Mon, Dec 20, 2021 at 06:4
On Wed, Dec 22, 2021 at 12:32:29PM +, Robin Murphy wrote:
> External email: Use caution opening links or attachments
>
>
> On 2021-11-19 07:19, Nicolin Chen via iommu wrote:
> > When VCMDQs are assigned to a VINTF that is owned by a guest, not
> > hypervisor (HYP_OWN
On Thu, Dec 23, 2021 at 11:14:17AM +, Robin Murphy wrote:
> External email: Use caution opening links or attachments
>
>
> On 2021-12-22 22:52, Nicolin Chen wrote:
> > On Wed, Dec 22, 2021 at 12:32:29PM +, Robin Murphy wrote:
> > > External email: Use caution o
On Fri, Dec 24, 2021 at 12:13:57PM +, Robin Murphy wrote:
> > > > > > @@ -176,6 +177,24 @@ struct arm_smmu_cmdq
> > > > > > *nvidia_grace_cmdqv_get_cmdq(struct arm_smmu_device *smmu)
> > > > > > if (!FIELD_GET(VINTF_STATUS, vintf0->status))
> > > > > > return &smmu->cm
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